Method of forming an interconnection structure
    6.
    发明授权
    Method of forming an interconnection structure 失效
    形成互连结构的方法

    公开(公告)号:US5480836A

    公开(公告)日:1996-01-02

    申请号:US254085

    申请日:1994-06-03

    摘要: A semiconductor integrated circuit device has an interconnection structure in which multilayer aluminum interconnection layers are connected through connection holes. A first aluminum interconnection layer is formed on a main surface of the semiconductor substrate. The first aluminum interconnection layer has a surface layer which includes any of high melting point metal, high melting point metal compound, high melting point metal silicide, or amorphous silicon. An insulating layer is formed on the first aluminum interconnection layer, and has a through hole if formed extending to a surface of the first aluminum interconnection layer. A second aluminum interconnection layer is formed on the insulating layer and is electrically connected to the surface layer of the first aluminum interconnection layer through the through hole. The second aluminum interconnection layer includes a titanium layer, a titanium nitride layer and an aluminum alloy layer. The titanium layer is formed on the insulating layer to be in contact with the surface of the first aluminum interconnection layer through the through hole. The titanium nitride layer is formed on the titanium layer. The aluminum alloy layer is formed on the titanium nitride layer. An electrical contact resistance between the first and second aluminum interconnection layers is stabilized, and resistance against the electron-migration and stress-migration is improved in the interconnection structure.

    摘要翻译: 半导体集成电路器件具有通过连接孔连接多层铝互连层的互连结构。 第一铝互连层形成在半导体衬底的主表面上。 第一铝互连层具有包括高熔点金属,高熔点金属化合物,高熔点金属硅化物或非晶硅中的任何一种的表面层。 绝缘层形成在第一铝互连层上,并且如果形成为延伸到第一铝互连层的表面的通孔。 第二铝互连层形成在绝缘层上,并通过通孔与第一铝互连层的表面层电连接。 第二铝互连层包括钛层,氮化钛层和铝合金层。 在绝缘层上形成钛层,以通过贯通孔与第一铝互连层的表面接触。 在钛层上形成氮化钛层。 在氮化钛层上形成铝合金层。 第一和第二铝互连层之间的电接触电阻是稳定的,并且互连结构中电子迁移和应力迁移的抵抗力得到改善。

    Semiconductor device having a titanium and a titanium compound
multilayer interconnection structure
    7.
    发明授权
    Semiconductor device having a titanium and a titanium compound multilayer interconnection structure 失效
    具有钛和钛化合物多层互连结构的半导体器件

    公开(公告)号:US5341026A

    公开(公告)日:1994-08-23

    申请号:US842019

    申请日:1992-02-26

    摘要: A semiconductor integrated circuit device has an interconnection structure in which multilayer aluminum interconnection layers are connected through connection holes. A first aluminum interconnection layer is formed on a main surface of the semiconductor substrate. The first aluminum interconnection layer has a surface layer which includes any of high melting point metal, high melting point metal compound, high melting point metal silicide, or amorphous silicon. An insulating layer is formed on the first aluminum interconnection layer, and has a through hole if formed extending to a surface of the first aluminum interconnection layer. A second aluminum interconnection layer is formed on the insulating layer and is electrically connected to the surface layer of the first aluminum interconnection layer through the through hole. The second aluminum interconnection layer includes a titanium layer, a titanium nitride layer and an aluminum alloy layer. The titanium layer is formed on the insulating layer to be in contact with the surface of the first aluminum interconnection layer through the through hole. The titanium nitride layer is formed on the titanium layer. The aluminum alloy layer is formed on the titanium nitride layer. An electrical contact resistance between the first and second aluminum interconnection layers is stabilized, and resistance against the electron-migration and stress-migration is improved in the interconnection structure.

    摘要翻译: 半导体集成电路器件具有通过连接孔连接多层铝互连层的互连结构。 第一铝互连层形成在半导体衬底的主表面上。 第一铝互连层具有包括高熔点金属,高熔点金属化合物,高熔点金属硅化物或非晶硅中的任何一种的表面层。 绝缘层形成在第一铝互连层上,并且如果形成为延伸到第一铝互连层的表面的通孔。 第二铝互连层形成在绝缘层上,并通过通孔与第一铝互连层的表面层电连接。 第二铝互连层包括钛层,氮化钛层和铝合金层。 在绝缘层上形成钛层,以通过贯通孔与第一铝互连层的表面接触。 在钛层上形成氮化钛层。 在氮化钛层上形成铝合金层。 第一和第二铝互连层之间的电接触电阻是稳定的,并且互连结构中电子迁移和应力迁移的抵抗力得到改善。

    Electrostatic chucking system, and apparatus and method of manufacturing a semiconductor device using the electrostatic chucking system
    8.
    发明授权
    Electrostatic chucking system, and apparatus and method of manufacturing a semiconductor device using the electrostatic chucking system 失效
    静电夹持系统以及使用静电吸盘系统制造半导体器件的装置和方法

    公开(公告)号:US06778377B2

    公开(公告)日:2004-08-17

    申请号:US09732891

    申请日:2000-12-11

    申请人: Kimio Hagi

    发明人: Kimio Hagi

    IPC分类号: H01T2300

    摘要: A voltage is applied to an electrode of an electrostatic chuck for chucking a semiconductor substrate, and the application voltage is controlled stepwise by means of a voltage control section. In the electrostatic chucking system, a temperature sensor may be provided for detecting the temperature of the semiconductor substrate held by the electrostatic chuck, wherein a signal output from the temperature sensor is input to the voltage control section to thereby control the applied voltage.

    摘要翻译: 电压被施加到用于夹持半导体衬底的静电吸盘的电极,并且施加电压通过电压控制部分逐步控制。 在静电吸盘系统中,可以设置温度传感器,用于检测由静电卡盘保持的半导体衬底的温度,其中从温度传感器输出的信号被输入到电压控制部分,从而控制施加的电压。

    Semiconductor device capable of preventing disconnection in a through hole
    9.
    发明授权
    Semiconductor device capable of preventing disconnection in a through hole 失效
    能够防止贯通孔断开的半导体装置

    公开(公告)号:US06414395B1

    公开(公告)日:2002-07-02

    申请号:US09398475

    申请日:1999-09-17

    IPC分类号: H01L2348

    摘要: A through hole passes through an interlayer isolation film and an antireflection film, to partially expose a surface of a first wiring layer. A clearance filling member fills up a clearance under an inner edge of the antireflection film. A barrier metal film continuously covers the exposed surface of the first wiring layer, an inner wall surface of the through hole and a surface of the interlayer isolation film. Passing through the through hole, a second wiring layer is connected with the first wiring layer through the barrier metal film. Thus provided is a method of fabricating a semiconductor device improved to be capable of avoiding disconnection of a wire in a through hole.

    摘要翻译: 通孔穿过层间隔离膜和抗反射膜,以部分地暴露第一布线层的表面。 间隙填充构件在防反射膜的内缘下方填充间隙。 阻挡金属膜连续地覆盖第一布线层的露出表面,通孔的内壁表面和层间隔离膜的表面。 通过通孔,第二布线层通过阻挡金属膜与第一布线层连接。 因此,提供了一种制造半导体器件的方法,该半导体器件被改进以能够避免导线在通孔中断开。

    Semiconductor device including a main alignment mark having peripheral
minute alignment marks
    10.
    发明授权
    Semiconductor device including a main alignment mark having peripheral minute alignment marks 失效
    半导体装置包括具有周边微小对准标记的主对准标记

    公开(公告)号:US5859478A

    公开(公告)日:1999-01-12

    申请号:US797447

    申请日:1997-02-06

    申请人: Kimio Hagi

    发明人: Kimio Hagi

    摘要: In a semiconductor device having alignment marks formed on a semiconductor substrate, the alignment marks include a main convex or concave alignment mark formed on said semiconductor substrate; and a plurality of minute alignment marks formed on the periphery of the main alignment mark. In areas where the minute alignment marks are formed, even when a film of aluminum or its alloy is stacked on the semiconductor substrate by high temperature sputtering, grains will not grow so as to have a large diameter. Thus, the grains created on the periphery of the main alignment mark are not erroneously recognized as the main alignment mark, thereby realizing accurate alignment.

    摘要翻译: 在具有形成在半导体衬底上的对准标记的半导体器件中,对准标记包括形成在所述半导体衬底上的主凸起或凹形对准标记; 以及形成在主对准标记的周边上的多个微小对准标记。 在形成微小对准标记的区域中,即使通过高温溅射在半导体衬底上层叠铝或其合金膜,晶粒也不会生长,从而具有大的直径。 因此,在主对准标记的周围产生的晶粒不被错误地识别为主对准标记,从而实现精确的对准。