Apparatus and Methods for De-Embedding Through Substrate Vias
    1.
    发明申请
    Apparatus and Methods for De-Embedding Through Substrate Vias 有权
    通过基板通孔去嵌入的装置和方法

    公开(公告)号:US20130032799A1

    公开(公告)日:2013-02-07

    申请号:US13197602

    申请日:2011-08-03

    IPC分类号: H01L23/528 H01L21/66

    摘要: A method includes providing on a substrate having at least two through substrate vias (“TSVs”) a plurality of test structures for de-embedding the measurement of the intrinsic characteristics of a device under test (DUT) including at least two of the TSVs; measuring the intrinsic characteristics [L] for a first and a second test structure on the substrate including two pads coupled with a transmission line of length L; using simultaneous solutions of ABCD matrix or T matrix form equations, and the measured intrinsic characteristics, solving for the intrinsic characteristics of the pads and the transmission lines; de-embedding the measurements of the third and fourth test structures using the intrinsic characteristics of the pads and the transmission lines; and using simultaneous solutions of ABCD matrix or T matrix form equations for BM_L and BM_LX, and the measured intrinsic characteristics, solving for the intrinsic characteristics of the TSVs.

    摘要翻译: 一种方法包括在具有至少两个通过衬底通孔(TSV)的衬底上提供多个测试结构,用于对包括至少两个TSV的被测器件(DUT)的固有特性的测量进行解嵌入; 测量包括与长度为L的传输线耦合的两个焊盘的衬底上的第一和第二测试结构的固有特性[L] 使用ABCD矩阵或T矩阵形式方程的同时解,以及测量的固有特性,求解焊盘和传输线的固有特性; 使用焊盘和传输线的固有特性来解嵌第三和第四测试结构的测量; 并且对于BM_L和BM_LX使用ABCD矩阵或T矩阵形式方程的同时解,以及测量的固有特性,求解TSV的固有特性。

    Apparatus and methods for de-embedding through substrate vias
    2.
    发明授权
    Apparatus and methods for de-embedding through substrate vias 有权
    用于通过衬底通孔去嵌入的装置和方法

    公开(公告)号:US08809073B2

    公开(公告)日:2014-08-19

    申请号:US13197602

    申请日:2011-08-03

    IPC分类号: H01L21/66 G01R31/26

    摘要: A method includes providing on a substrate having at least two through substrate vias (“TSVs”) a plurality of test structures for de-embedding the measurement of the intrinsic characteristics of a device under test (DUT) including at least two of the TSVs; measuring the intrinsic characteristics [L] for a first and a second test structure on the substrate including two pads coupled with a transmission line of length L; using simultaneous solutions of ABCD matrix or T matrix form equations, and the measured intrinsic characteristics, solving for the intrinsic characteristics of the pads and the transmission lines; de-embedding the measurements of the third and fourth test structures using the intrinsic characteristics of the pads and the transmission lines; and using simultaneous solutions of ABCD matrix or T matrix form equations for BM_L and BM_LX, and the measured intrinsic characteristics, solving for the intrinsic characteristics of the TSVs.

    摘要翻译: 一种方法包括在具有至少两个通过衬底通孔(“TSV”)的衬底上提供多个测试结构,用于对包括至少两个TSV的待测器件(DUT)的固有特性的测量进行解嵌入; 测量包括与长度为L的传输线耦合的两个焊盘的衬底上的第一和第二测试结构的固有特性[L] 使用ABCD矩阵或T矩阵形式方程的同时解,以及测量的固有特性,求解焊盘和传输线的固有特性; 使用焊盘和传输线的固有特性来解嵌第三和第四测试结构的测量; 并且对于BM_L和BM_LX使用ABCD矩阵或T矩阵形式方程的同时解,以及测量的固有特性,求解TSV的固有特性。

    STRUCTURE AND METHOD FOR A HIGH-K TRANSFORMER WITH CAPACITIVE COUPLING
    7.
    发明申请
    STRUCTURE AND METHOD FOR A HIGH-K TRANSFORMER WITH CAPACITIVE COUPLING 有权
    具有电容耦合的高K变压器的结构和方法

    公开(公告)号:US20130099352A1

    公开(公告)日:2013-04-25

    申请号:US13280786

    申请日:2011-10-25

    IPC分类号: H01L23/48 H01L21/768

    摘要: The present disclosure provides a semiconductor device. The semiconductor device includes a semiconductor substrate having an integrated circuit (IC) device; an interconnect structure disposed on the semiconductor substrate and coupled with the IC device; and a transformer disposed on the semiconductor substrate and integrated in the interconnect structure. The transformer includes a first conductive feature; a second conductive feature inductively coupled with the first conductive feature; a third conductive feature electrically connected to the first conductive feature; and a fourth conductive feature electrically connected to the second conductive feature. The third and fourth conductive features are designed and configured to be capacitively coupled to increase a coupling coefficient of the transformer.

    摘要翻译: 本发明提供一种半导体器件。 半导体器件包括具有集成电路(IC)器件的半导体衬底; 布置在半导体衬底上并与IC器件耦合的互连结构; 以及设置在半导体衬底上并集成在互连结构中的变压器。 变压器包括第一导电特征; 与所述第一导电特征电感耦合的第二导电特征; 电连接到第一导电特征的第三导电特征; 以及电连接到第二导电特征的第四导电特征。 第三和第四导电特征被设计和配置为电容耦合以增加变压器的耦合系数。

    Integrated Antenna Structure
    9.
    发明申请
    Integrated Antenna Structure 有权
    集成天线结构

    公开(公告)号:US20140008773A1

    公开(公告)日:2014-01-09

    申请号:US13541937

    申请日:2012-07-05

    IPC分类号: H01L25/065 H01L21/50

    摘要: Some embodiments relate to a semiconductor module comprising an integrated antenna structure configured to wirelessly transmit signals. The integrated antenna structure has a lower metal layer and an upper metal layer. The lower metal layer is disposed on a lower die and is connected to a ground terminal. The upper metal layer is disposed on an upper die and is connected to a signal generator configured to generate a signal to be wirelessly transmitted. The upper die is stacked on the lower die and is connected to the lower die by way of an adhesion layer having one or more micro-bumps. By connecting the lower and upper die together by way of the adhesion layer, the lower and upper metal layers are separated from each other by a large spacing that provides for a good performance of the integrated antenna structure.

    摘要翻译: 一些实施例涉及包括被配置为无线传输信号的集成天线结构的半导体模块。 集成天线结构具有下金属层和上金属层。 下金属层设置在下模上并连接到接地端子。 上金属层设置在上模上并连接到被配置为产生要无线传输的信号的信号发生器。 上模具堆叠在下模上,并通过具有一个或多个微凸块的粘合层连接到下模。 通过将粘合层连接在一起,下部和上部金属层彼此间隔开大间隔,从而提供了集成天线结构的良好性能。