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    DEVICES AND METHODS TO MINIMIZE DIE SHIFT IN EMBEDDED HETEROGENEOUS ARCHITECTURES
    4.
    发明申请
    DEVICES AND METHODS TO MINIMIZE DIE SHIFT IN EMBEDDED HETEROGENEOUS ARCHITECTURES 有权

    公开(公告)号：US20230078395A1

    公开(公告)日：2023-03-16

    申请号：US17472048

    申请日：2021-09-10

    申请人： Intel Corporation

    发明人： Robin Mcree ,  Yosuke Kanaoka ,  Gang Duan ,  Jinhe Liu ,  Timothy A. Gosselin

    IPC分类号： H01L23/00 ,  H01L23/31

    摘要： Disclosed herein are embedded heterogeneous architectures having minimized die shift and methods for manufacturing the same. The architectures may include a substrate, a bridge, and a material attached to the substrate. The substrate may include a first subset of vias and a second subset of vias. The bridge may be located in between the first subset and the second subset of vias. The material may include a first portion located proximate the first subset of vias, and a second portion located proximate the second subset of vias. The first and second portions may define a partial boundary of a cavity formed within the substrate and the bridge may be located within the cavity.

    MICROELECTRONIC ASSEMBLIES INCLUDING BRIDGES
    7.
    发明申请
    MICROELECTRONIC ASSEMBLIES INCLUDING BRIDGES 有权

    公开(公告)号：US20230086691A1

    公开(公告)日：2023-03-23

    申请号：US17482681

    申请日：2021-09-23

    申请人： Intel Corporation

    发明人： Sriram Srinivasan ,  Sanka Ganesan ,  Timothy A. Gosselin

    IPC分类号： H01L23/538 ,  H01L21/48

    摘要： Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a microelectronic subassembly including a first bridge component in a first layer, the first bridge component having a first surface and an opposing second surface, and a die in a second layer, wherein the second layer is on the first layer, and the die is electrically coupled to the second surface of the first bridge component; a package substrate having a second bridge component embedded therein, wherein the second bridge component is electrically coupled to the first surface of the first bridge component; and a microelectronic component on the second surface of the package substrate and electrically coupled to the second bridge component, wherein the microelectronic component is electrically coupled to the die via the first and second bridge components.

    INORGANIC REDISTRIBUTION LAYER ON ORGANIC SUBSTRATE IN INTEGRATED CIRCUIT PACKAGES
    8.
    发明申请
    INORGANIC REDISTRIBUTION LAYER ON ORGANIC SUBSTRATE IN INTEGRATED CIRCUIT PACKAGES 有权

    公开(公告)号：US20220375844A1

    公开(公告)日：2022-11-24

    申请号：US17328034

    申请日：2021-05-24

    申请人： Intel Corporation

    发明人： Xavier Francois Brun ,  Sanka Ganesan ,  Holly Sawyer ,  Timothy A. Gosselin

    IPC分类号： H01L23/498 ,  H01L23/14 ,  H01L23/00 ,  H01L21/48

    摘要： An integrated circuit (IC) package, comprising a die having a first set of interconnects of a first pitch, and an interposer comprising an organic substrate having a second set of interconnects of a second pitch. The interposer also includes an inorganic layer over the organic substrate. The inorganic layer comprises conductive traces electrically coupling the second set of interconnects with the first set of interconnects. The die is attached to the interposer by the first set of interconnects. In some embodiments, the interposer further comprises an embedded die. The IC package further comprises a package support having a third set of interconnects of a third pitch, and a second inorganic layer over a surface of the interposer opposite to the die. The second inorganic layer comprises conductive traces electrically coupling the third set of interconnects with the second set of interconnects.