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1.发明授权公开(公告)号：US10833150B2
公开(公告)日：2020-11-10
申请号：US16032632
申请日：2018-07-11
发明人： Martin M. Frank , Kam-Leung Lee , Eduard A. Cartier , Vijay Narayanan , Jean Fompeyrine , Stefan Abel , Oleg Gluschenkov , Hemanth Jagannathan
摘要： A method for converting a dielectric material including a type IV transition metal into a crystalline material that includes forming a predominantly non-crystalline dielectric material including the type IV transition metal on a supporting substrate as a component of an electrical device having a scale of microscale or less; and converting the predominantly non-crystalline dielectric material including the type IV transition metal to a crystalline crystal structure by exposure to energy for durations of less than 100 milliseconds and, in some instances, less than 10 microseconds. The resultant material is fully or partially crystallized and contains a metastable ferroelectric phase such as the polar orthorhombic phase of space group Pca21 or Pmn21. During the conversion to the crystalline crystal structure, adjacently positioned components of the electrical devices are not damaged.
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公开(公告)号：US10361281B2
公开(公告)日：2019-07-23
申请号：US15911892
申请日：2018-03-05
发明人： Takashi Ando , Eduard A. Cartier , Kisik Choi , Vijay Narayanan
IPC分类号： H01L21/02 , H01L21/28 , H01L29/66 , H01L21/321 , H01L21/324 , H01L29/423 , H01L21/3205
摘要： A method of fabricating a replacement gate stack for a semiconductor device includes the following steps after removal of a dummy gate: growing a high-k dielectric layer over the area vacated by the dummy gate; depositing a thin metal layer over the high-k dielectric layer; depositing a sacrificial layer over the thin metal layer; performing a first rapid thermal anneal; removing the sacrificial layer; and depositing a metal layer of low resistivity metal for gap fill.
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3.发明授权公开(公告)号：US10211064B2
公开(公告)日：2019-02-19
申请号：US15176982
申请日：2016-06-08
IPC分类号： H01L27/11521 , H01L29/51 , H01L21/3115 , H01L29/49 , H01L21/8234 , H01L21/28 , H01L29/66 , H01L29/792 , G11C16/04 , H01L27/11568
摘要： A metal oxide semiconductor field effect transistors (MOSFET) memory array, including a complementary metal oxide semiconductor (CMOS) cell including an n-type MOSFET having a modified gate dielectric; and an n-type or p-type MOSFET having an unmodified gate dielectric layer, where the modified gate dielectric layer incorporates an oxygen scavenging species.
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公开(公告)号：US20180197972A1
公开(公告)日：2018-07-12
申请号：US15911892
申请日：2018-03-05
发明人： Takashi Ando , Eduard A. Cartier , Kisik Choi , Vijay Narayanan
IPC分类号： H01L29/66 , H01L21/02 , H01L21/3205 , H01L21/324 , H01L21/28 , H01L29/423 , H01L21/321
CPC分类号： H01L29/66795 , H01L21/02532 , H01L21/02592 , H01L21/02595 , H01L21/28017 , H01L21/28088 , H01L21/32055 , H01L21/321 , H01L21/324 , H01L29/4232 , H01L29/66 , H01L29/66545 , H01L29/6681
摘要： A method of fabricating a replacement gate stack for a semiconductor device includes the following steps after removal of a dummy gate: growing a high-k dielectric layer over the area vacated by the dummy gate; depositing a thin metal layer over the high-k dielectric layer; depositing a sacrificial layer over the thin metal layer; performing a first rapid thermal anneal; removing the sacrificial layer; and depositing a metal layer of low resistivity metal for gap fill.
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公开(公告)号：US09960252B2
公开(公告)日：2018-05-01
申请号：US15258597
申请日：2016-09-07
发明人： Takashi Ando , Eduard A. Cartier , Kisik Choi , Vijay Narayanan
IPC分类号： H01L21/3205 , H01L29/66 , H01L21/28 , H01L21/324 , H01L29/423 , H01L21/321 , H01L21/02
CPC分类号： H01L29/66545 , H01L21/02532 , H01L21/02592 , H01L21/02595 , H01L21/28017 , H01L21/28088 , H01L21/32055 , H01L21/321 , H01L21/324 , H01L29/4232 , H01L29/66 , H01L29/66795 , H01L29/6681
摘要： A method of fabricating a replacement gate stack for a semiconductor device includes the following steps after removal of a dummy gate: growing a high-k dielectric layer over the area vacated by the dummy gate; depositing a thin metal layer over the high-k dielectric layer; depositing a sacrificial layer over the thin metal layer; performing a first rapid thermal anneal; removing the sacrificial layer; and depositing a metal layer of low resistivity metal for gap fill.
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公开(公告)号：US20180006108A1
公开(公告)日：2018-01-04
申请号：US15198800
申请日：2016-06-30
CPC分类号： H01L28/75
摘要： A layered structure including a tri-stack dielectric layer and a plurality of metal layers insulated from each other by the tri-stack dielectric layer. The plurality of metal layers includes a set of first-type metal layers and a set of second-type metal layers. An adjacent pair of the plurality of metal layers includes a first-type metal layer and a second-type metal layer. The tri-stack dielectric layer includes a first tri-stack layer including Al2O3, a second tri-stack layer including HfO2; and a third tri-stack layer including Al2O3.
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7.发明申请公开(公告)号：US20170358587A1
公开(公告)日：2017-12-14
申请号：US15176982
申请日：2016-06-08
IPC分类号： H01L27/11521 , H01L29/51 , H01L29/49 , H01L29/788 , H01L21/3115 , H01L21/28 , H01L29/66 , H01L29/43
CPC分类号： H01L21/31155 , G11C16/0466 , H01L21/28282 , H01L21/823462 , H01L27/11568 , H01L29/4966 , H01L29/517 , H01L29/66833 , H01L29/792
摘要： A metal oxide semiconductor field effect transistors (MOSFET) memory array, including a complementary metal oxide semiconductor (CMOS) cell including an n-type MOSFET having a modified gate dielectric; and an n-type or p-type MOSFET having an unmodified gate dielectric layer, where the modified gate dielectric layer incorporates an oxygen scavenging species.
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公开(公告)号：US09599656B2
公开(公告)日：2017-03-21
申请号：US14553863
申请日：2014-11-25
CPC分类号： G01R31/14 , G01R31/2879
摘要： At least one method and system disclosed herein involves testing of integrated circuits. A device having at least one transistor and at least one dielectric layer is provided. A first voltage is provided during a first time period for performing a stress test upon the device. A second voltage is provided during a second time period for discharging at least a portion of the charge built-up as a result of the first voltage. The second voltage is of an opposite polarity of the first voltage. A sense function is provided during a third time period for determining a result of the stress test. Data relating to a breakdown of the dielectric layer based upon the result of the stress test is acquired, stored and/or transmitted.
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公开(公告)号：US09299802B2
公开(公告)日：2016-03-29
申请号：US13662505
申请日：2012-10-28
CPC分类号： H01L29/66545 , H01L21/28176 , H01L21/28185 , H01L21/2855 , H01L21/28556 , H01L21/3003 , H01L21/30625 , H01L21/324 , H01L29/4966 , H01L29/518 , H01L29/66795 , H01L29/785
摘要： A method of fabricating a gate stack for a semiconductor device includes the following steps after removal of a dummy gate: growing a high-k dielectric layer over an area vacated by the dummy gate; depositing a thin metal layer over the high-k dielectric layer; annealing the replacement gate structure in an ambient atmosphere containing hydrogen; and depositing a gap fill layer.
摘要翻译： 制造用于半导体器件的栅极堆叠的方法包括在去除伪栅极之后的以下步骤：在由虚拟栅极腾出的区域上生长高k电介质层; 在高k电介质层上沉积薄金属层; 在包含氢的环境气氛中退火替代栅极结构; 以及沉积间隙填充层。
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公开(公告)号：US20150243762A1
公开(公告)日：2015-08-27
申请号：US14699843
申请日：2015-04-29
发明人： Takashi Ando , Eduard A. Cartier , Kisik Choi , Vijay Narayanan
IPC分类号： H01L29/66 , H01L21/321 , H01L21/28
CPC分类号： H01L29/66545 , H01L21/02532 , H01L21/02592 , H01L21/02595 , H01L21/28017 , H01L21/28088 , H01L21/32055 , H01L21/321 , H01L21/324 , H01L29/4232 , H01L29/66 , H01L29/66795 , H01L29/6681
摘要： A method of fabricating a replacement gate stack for a semiconductor device includes the following steps after removal of a dummy gate: growing a high-k dielectric layer over the area vacated by the dummy gate; depositing a thin metal layer over the high-k dielectric layer; depositing a sacrificial layer over the thin metal layer; performing a first rapid thermal anneal; removing the sacrificial layer; and depositing a metal layer of low resistivity metal for gap fill.
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