公开(公告)号：US07432177B2

公开(公告)日：2008-10-07

申请号：US11154211

申请日：2005-06-15

申请人： James S. Papanu ,  Han-Wen Chen ,  Brian J. Brown ,  Steven Verhaverbeke

发明人： James S. Papanu ,  Han-Wen Chen ,  Brian J. Brown ,  Steven Verhaverbeke

IPC分类号： H01L21/04

CPC分类号： H01L21/02057 ,  Y10S438/906 ,  Y10S438/907 ,  Y10S438/908 ,  Y10S438/928

摘要： A combination of a dry oxidizing, wet etching, and wet cleaning processes are used to remove particle defects from a wafer after ion implantation, as part of a wafer bonding process to fabricate a SOI wafer. The particle defects on the topside and the backside of the wafer are oxidized, in a dry strip chamber, with an energized gas. In a wet clean chamber, the backside of the wafer is treated with an etchant solution to remove completely or partially a thermal silicon oxide layer, followed by exposure of the topside and the backside to a cleaning solution. The cleaning solution contains ammonium hydroxide, hydrogen peroxide, DI water, and optionally a chelating agent, and a surfactant. The wet clean chamber is integrated with the dry strip chamber and contained in a single wafer processing system.

摘要翻译： 干法氧化，湿蚀刻和湿法清洗工艺的组合被用于在离子注入之后从晶片去除颗粒缺陷，作为制造SOI晶片的晶片接合工艺的一部分。 晶片顶面和背面的颗粒缺陷在干燥条带室中被激发的气体氧化。 在湿式清洁室中，用蚀刻剂溶液处理晶片的背面以完全或部分地去除热氧化硅层，随后将顶侧和背面暴露于清洁溶液中。 清洗液含有氢氧化铵，过氧化氢，去离子水，任选的螯合剂和表面活性剂。 湿式清洁室与干燥条带室一体化，并包含在单个晶片处理系统中。

公开(公告)号：US07914623B2

公开(公告)日：2011-03-29

申请号：US11977701

申请日：2007-10-24

申请人： James S. Papanu ,  Han-Wen Chen ,  Brian J. Brown ,  Steven Verhaverbeke

发明人： James S. Papanu ,  Han-Wen Chen ,  Brian J. Brown ,  Steven Verhaverbeke

IPC分类号： H01L21/461

CPC分类号： H01L21/02057 ,  Y10S438/906 ,  Y10S438/907 ,  Y10S438/908 ,  Y10S438/928

摘要： A combination of a dry oxidizing, wet etching, and wet cleaning processes are used to remove particle defects from a wafer after ion implantation, as part of a wafer bonding process to fabricate a SOI wafer. The particle defects on the topside and the backside of the wafer are oxidized, in a dry strip chamber, with an energized gas. In a wet clean chamber, the backside of the wafer is treated with an etchant solution to remove completely or partially a thermal silicon oxide layer, followed by exposure of the topside and the backside to a cleaning solution. The cleaning solution contains ammonium hydroxide, hydrogen peroxide, DI water, and optionally a chelating agent, and a surfactant. The wet clean chamber is integrated with the dry strip chamber and contained in a single wafer processing system.

摘要翻译： 干法氧化，湿蚀刻和湿法清洗工艺的组合被用于在离子注入之后从晶片去除颗粒缺陷，作为制造SOI晶片的晶片接合工艺的一部分。 晶片顶面和背面的颗粒缺陷在干燥条带室中被激发的气体氧化。 在湿式清洁室中，用蚀刻剂溶液处理晶片的背面以完全或部分地去除热氧化硅层，随后将顶侧和背面暴露于清洁溶液中。 清洗液含有氢氧化铵，过氧化氢，去离子水，任选的螯合剂和表面活性剂。 湿式清洁室与干燥条带室一体化，并包含在单个晶片处理系统中。

公开(公告)号：US07718009B2

公开(公告)日：2010-05-18

申请号：US10931093

申请日：2004-08-30

申请人： Steven Verhaverbeke ,  Jianshe Tang ,  Roman Gouk ,  Brian J. Brown ,  Han-Wen Chen ,  Ching-Hwa Weng ,  James S. Papanu ,  Dennis Yost

发明人： Steven Verhaverbeke ,  Jianshe Tang ,  Roman Gouk ,  Brian J. Brown ,  Han-Wen Chen ,  Ching-Hwa Weng ,  James S. Papanu ,  Dennis Yost

IPC分类号： C23G1/02

CPC分类号： H01L21/02074 ,  B08B3/08 ,  B08B3/12 ,  C11D7/08 ,  C11D11/0047 ,  C11D11/007 ,  H01L21/02063 ,  H01L21/02071 ,  H01L21/0209 ,  H01L21/67051 ,  H01L21/76808 ,  H01L21/76814

摘要： Cleaning solutions and cleaning methods targeted to particular substrates and structures in semiconductor fabrication are described. A method of cleaning fragile structures having a dimension less than 0.15 um with a cleaning solution formed of a solvent having a surface tension less than water while applying acoustic energy to the substrate on which the structures are formed is described. Also, a method of cleaning copper with several different cleaning solutions, and in particular an aqueous sulfuric acid and HF cleaning solution, is described. Also, methods of cleaning both sides of a substrate at the same time with different cleaning solutions applied to the top and the bottom are described.

摘要翻译： 描述了针对半导体制造中的特定衬底和结构的清洁溶液和清洁方法。 描述了一种使用表面张力小于水的溶剂形成的清洁溶液清洁尺寸小于0.15μm的脆弱结构的方法，同时向其上形成结构的基底施加声能。 此外，还描述了用几种不同的清洁溶液，特别是硫酸水溶液和HF清洗溶液清洗铜的方法。 此外，还描述了使用不同的清洁溶液同时清洁基板的两侧的方法，所述清洗溶液应用于顶部和底部。

公开(公告)号：US20100104953A1

公开(公告)日：2010-04-29

申请号：US12258271

申请日：2008-10-24

申请人： James S. Papanu ,  Roman Gouk ,  Han-Wen Chen ,  Phillip Peters

发明人： James S. Papanu ,  Roman Gouk ,  Han-Wen Chen ,  Phillip Peters

IPC分类号： G03F1/00

CPC分类号： G03F7/168 ,  G03F1/82 ,  G03F7/427

摘要： A H2O vapor based dry plasma process for pre-treating and strip-cleaning a reticle, a three layer gas distribution plate (GDP) assembly to control the heat load to the reticle during the plasma process, and a modified hole pattern for the GDP that further enhances stripping of resist from the edges of the reticle are disclosed.

摘要翻译： 基于H 2 O蒸汽的干法等离子体处理，用于预处理和剥离掩模版，三层气体分配板（GDP）组件，用于控制等离子体工艺期间对掩模版的热负荷，以及改进的孔模式用于GDP， 公开了进一步增强抗蚀剂从掩模版的边缘的剥离。

公开(公告)号：US20080078424A1

公开(公告)日：2008-04-03

申请号：US11536292

申请日：2006-09-28

申请人： Roman Gouk ,  Phillip Peters ,  Han-Wen Chen ,  James S. Papanu

发明人： Roman Gouk ,  Phillip Peters ,  Han-Wen Chen ,  James S. Papanu

IPC分类号： B08B3/00

CPC分类号： H01L21/67028 ,  G03F7/423 ,  H01L21/67051 ,  H01L21/67057 ,  H01L21/6708

摘要： Embodiments of methods for decreasing the process time for photoresist stripping from photomasks are herein disclosed. In some embodiments, a stripping solution and a cleaning solution are consecutively applied in an alternating manner to a photomask to remove photoresist from the mask. The stripping solution and the cleaning solution can each be applied between 6 and 12 times. The stripping solution and the cleaning solution can be applied in a predetermined time interval from about 30 seconds to about 120 seconds and from about 8 seconds to about 30 seconds, respectively. The process can include a finishing process which can include a final cleaning operation, a rinsing operation and a drying operation.

摘要翻译： 本文公开了用于降低光致抗蚀剂从光掩模剥离的处理时间的方法的实施方案。 在一些实施方案中，剥离溶液和清洁溶液以交替方式连续施加到光掩模以从掩模中除去光致抗蚀剂。 剥离溶液和清洗溶液各自可以施加6-12次。 剥离溶液和清洁溶液可以分别以约30秒至约120秒和约8秒至约30秒的预定时间间隔施加。 该方法可以包括可以包括最终清洁操作，漂洗操作和干燥操作的精加工过程。

公开(公告)号：US08318589B2

公开(公告)日：2012-11-27

申请号：US12748780

申请日：2010-03-29

申请人： Valery V. Komin ,  Hien-Minh Huu Le ,  David Tanner ,  James S. Papanu ,  Philip A. Greene ,  Suresh M. Shrauti ,  Roman Gouk ,  Steven Verhaverbeke

发明人： Valery V. Komin ,  Hien-Minh Huu Le ,  David Tanner ,  James S. Papanu ,  Philip A. Greene ,  Suresh M. Shrauti ,  Roman Gouk ,  Steven Verhaverbeke

IPC分类号： H01L21/20

CPC分类号： C23C14/086 ,  C23C14/5806 ,  C23C14/5873 ,  H01L31/022466 ,  H01L31/0236 ,  H01L31/02366 ,  H01L31/03682 ,  H01L31/03685 ,  H01L31/03762 ,  H01L31/03921 ,  H01L31/056 ,  H01L31/075 ,  H01L31/077 ,  H01L31/1864 ,  H01L31/1884 ,  Y02E10/52 ,  Y02E10/545 ,  Y02E10/546 ,  Y02E10/548 ,  Y02P70/521

摘要： Embodiments disclosed herein generally relate to a process of depositing a transparent conductive oxide layer over a substrate. The transparent oxide layer is sometimes deposited onto a substrate for later use in a solar cell device. The transparent conductive oxide layer may be deposited by a “cold” sputtering process. In other words, during the sputtering process, a plasma is ignited in the processing chamber which naturally heats the substrate. No additional heat is provided to the substrate during deposition such as from the susceptor. After the transparent conductive oxide layer is deposited, the substrate may be annealed and etched, in either order, to texture the transparent conductive oxide layer. In order to tailor the shape of the texturing, different wet etch chemistries may be utilized. The different etch chemistries may be used to shape the surface of the transparent conductive oxide and the etch rate.

摘要翻译： 本文公开的实施例通常涉及在衬底上沉积透明导电氧化物层的工艺。 透明氧化物层有时沉积在衬底上，以供以后用于太阳能电池器件中。 可以通过冷溅射工艺沉积透明导电氧化物层。 换句话说，在溅射过程中，在处理室中点燃等离子体，其自然地加热基板。 在诸如从感受器的沉积期间不会向衬底提供额外的热量。 在沉积透明导电氧化物层之后，可以以任何顺序对衬底进行退火和蚀刻，以对透明导电氧化物层进行纹理化。 为了调整纹理的形状，可以使用不同的湿蚀刻化学物质。 可以使用不同的蚀刻化学物质来形成透明导电氧化物的表面和蚀刻速率。

公开(公告)号：US20100311204A1

公开(公告)日：2010-12-09

申请号：US12748790

申请日：2010-03-29

申请人： VALERY V. KOMIN ,  Hien-Minh Huu Le ,  David Tanner ,  James S. Papanu ,  Philip A. Greene ,  Suresh M. Shrauti ,  Roman Gouk ,  Steven Verhaverbeke

发明人： VALERY V. KOMIN ,  Hien-Minh Huu Le ,  David Tanner ,  James S. Papanu ,  Philip A. Greene ,  Suresh M. Shrauti ,  Roman Gouk ,  Steven Verhaverbeke

IPC分类号： H01L31/18 ,  H01L21/283

CPC分类号： C23C14/086 ,  C23C14/541 ,  C23C14/56 ,  C23C14/5846 ,  H01L31/022466 ,  H01L31/022483 ,  H01L31/02366 ,  H01L31/03921 ,  H01L31/056 ,  H01L31/075 ,  H01L31/1884 ,  Y02E10/52 ,  Y02E10/548

摘要： Embodiments disclosed herein generally relate to a process of depositing a transparent conductive oxide layer over a substrate. The transparent oxide layer is sometimes deposited onto a substrate for later use in a solar cell device. The transparent conductive oxide layer may be deposited by a “cold” sputtering process. In other words, during the sputtering process, a plasma is ignited in the processing chamber which naturally heats the substrate. No additional heat is provided to the substrate during deposition such as from the susceptor. After the transparent conductive oxide layer is deposited, the substrate may be annealed and etched, in either order, to texture the transparent conductive oxide layer. In order to tailor the shape of the texturing, different wet etch chemistries may be utilized. The different etch chemistries may be used to shape the surface of the transparent conductive oxide and the etch rate.

摘要翻译： 本文公开的实施例通常涉及在衬底上沉积透明导电氧化物层的工艺。 透明氧化物层有时沉积在衬底上，以供以后用于太阳能电池器件中。 可以通过“冷”溅射工艺沉积透明导电氧化物层。 换句话说，在溅射过程中，在处理室中点燃等离子体，其自然地加热基板。 在诸如从感受器的沉积期间不会向衬底提供额外的热量。 在沉积透明导电氧化物层之后，可以以任何顺序对衬底进行退火和蚀刻，以对透明导电氧化物层进行纹理化。 为了调整纹理的形状，可以使用不同的湿蚀刻化学物质。 可以使用不同的蚀刻化学物质来形成透明导电氧化物的表面和蚀刻速率。

公开(公告)号：US08361835B2

公开(公告)日：2013-01-29

申请号：US12748790

申请日：2010-03-29

申请人： Valery V. Komin ,  Hien-Minh Huu Le ,  David Tanner ,  James S. Papanu ,  Philip A. Greene ,  Suresh M. Shrauti ,  Roman Gouk ,  Steven Verhaverbeke

发明人： Valery V. Komin ,  Hien-Minh Huu Le ,  David Tanner ,  James S. Papanu ,  Philip A. Greene ,  Suresh M. Shrauti ,  Roman Gouk ,  Steven Verhaverbeke

IPC分类号： H01L21/00

CPC分类号： C23C14/086 ,  C23C14/541 ,  C23C14/56 ,  C23C14/5846 ,  H01L31/022466 ,  H01L31/022483 ,  H01L31/02366 ,  H01L31/03921 ,  H01L31/056 ,  H01L31/075 ,  H01L31/1884 ,  Y02E10/52 ,  Y02E10/548

摘要： Embodiments disclosed herein generally relate to a process of depositing a transparent conductive oxide layer over a substrate. The transparent oxide layer is sometimes deposited onto a substrate for later use in a solar cell device. The transparent conductive oxide layer may be deposited by a “cold” sputtering process. In other words, during the sputtering process, a plasma is ignited in the processing chamber which naturally heats the substrate. No additional heat is provided to the substrate during deposition such as from the susceptor. After the transparent conductive oxide layer is deposited, the substrate may be annealed and etched, in either order, to texture the transparent conductive oxide layer. In order to tailor the shape of the texturing, different wet etch chemistries may be utilized. The different etch chemistries may be used to shape the surface of the transparent conductive oxide and the etch rate.

摘要翻译： 本文公开的实施例通常涉及在衬底上沉积透明导电氧化物层的工艺。 透明氧化物层有时沉积在衬底上，以供以后用于太阳能电池器件中。 可以通过冷溅射工艺沉积透明导电氧化物层。 换句话说，在溅射过程中，在处理室中点燃等离子体，其自然地加热基板。 在诸如从感受器的沉积期间不会向衬底提供额外的热量。 在沉积透明导电氧化物层之后，可以以任何顺序对衬底进行退火和蚀刻，以对透明导电氧化物层进行纹理化。 为了调整纹理的形状，可以使用不同的湿蚀刻化学物质。 可以使用不同的蚀刻化学物质来形成透明导电氧化物的表面和蚀刻速率。

公开(公告)号：US20100311228A1

公开(公告)日：2010-12-09

申请号：US12748780

申请日：2010-03-29

申请人： VALERY V. KOMIN ,  Hien-Minh Huu Le ,  David Tanner ,  James S. Papanu ,  Philip A. Greene ,  Suresh M. Shrauti ,  Roman Gouk ,  Steven Verhaverbeke

发明人： VALERY V. KOMIN ,  Hien-Minh Huu Le ,  David Tanner ,  James S. Papanu ,  Philip A. Greene ,  Suresh M. Shrauti ,  Roman Gouk ,  Steven Verhaverbeke

IPC分类号： H01L21/3213 ,  H01L21/20

CPC分类号： C23C14/086 ,  C23C14/5806 ,  C23C14/5873 ,  H01L31/022466 ,  H01L31/0236 ,  H01L31/02366 ,  H01L31/03682 ,  H01L31/03685 ,  H01L31/03762 ,  H01L31/03921 ,  H01L31/056 ,  H01L31/075 ,  H01L31/077 ,  H01L31/1864 ,  H01L31/1884 ,  Y02E10/52 ,  Y02E10/545 ,  Y02E10/546 ,  Y02E10/548 ,  Y02P70/521

摘要： Embodiments disclosed herein generally relate to a process of depositing a transparent conductive oxide layer over a substrate. The transparent oxide layer is sometimes deposited onto a substrate for later use in a solar cell device. The transparent conductive oxide layer may be deposited by a “cold” sputtering process. In other words, during the sputtering process, a plasma is ignited in the processing chamber which naturally heats the substrate. No additional heat is provided to the substrate during deposition such as from the susceptor. After the transparent conductive oxide layer is deposited, the substrate may be annealed and etched, in either order, to texture the transparent conductive oxide layer. In order to tailor the shape of the texturing, different wet etch chemistries may be utilized. The different etch chemistries may be used to shape the surface of the transparent conductive oxide and the etch rate.

公开(公告)号：US09281244B1

公开(公告)日：2016-03-08

申请号：US14490598

申请日：2014-09-18

申请人： Jungrae Park ,  Wei-Sheng Lei ,  James S. Papanu ,  Brad Eaton ,  Ajay Kumar

发明人： Jungrae Park ,  Wei-Sheng Lei ,  James S. Papanu ,  Brad Eaton ,  Ajay Kumar

IPC分类号： H01L21/02 ,  H01L21/78 ,  H01L21/308 ,  H01L21/3065 ,  H01L21/67 ,  H01J37/32 ,  B23K26/36

CPC分类号： H01L21/78 ,  B23K26/364 ,  H01J37/32889 ,  H01J2237/335 ,  H01L21/3065 ,  H01L21/3086 ,  H01L21/67207

摘要： Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves forming a mask above the semiconductor wafer, the mask composed of a layer covering and protecting the integrated circuits. The mask is then patterned with an adaptive optics-controlled laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then plasma etched through the gaps in the patterned mask to singulate the integrated circuits.

摘要翻译： 对具有多个集成电路的每个晶片进行切割的半导体晶片的方法进行了说明。 在一个例子中，对具有多个集成电路的半导体晶片进行切割的方法包括在半导体晶片上形成掩模，该掩模由覆盖并保护集成电路的层组成。 然后用自适应光学控制激光划线工艺对掩模进行构图，以提供具有间隙的图案化掩模，暴露集成电路之间的半导体晶片的区域。 然后通过图案化掩模中的间隙对半导体晶片进行等离子体蚀刻，以对集成电路进行分离。