摘要:
Enhanced efficiency solar cells and methods of manufacture of such cells are described herein. In an illustrative example, the solar cell includes at least one or more collector lens bars each of which extend on sides of front contacts and positioned over a respective active area of one or more active areas in such as position as to guide light onto the one or more active areas. A protective layer covers the at least one or more collector lens bars.
摘要:
Enhanced efficiency solar cells and methods of manufacture of such cells are described herein. In an illustrative example, the solar cell includes at least one or more collector lens bars each of which extend on sides of front contacts and positioned over a respective active area of one or more active areas in such as position as to guide light onto the one or more active areas. A protective layer covers the at least one or more collector lens bars.
摘要:
A design structure embodied in a machine readable medium used in a design process includes a first dielectric layer disposed on an intermediary layer, a first conductive pad portion and a first interconnect portion disposed on the first dielectric layer, a second dielectric layer disposed on the first dielectric layer, a first capping layer disposed on the first interconnect portion and a portion of the first conductive pad portion, a second capping layer disposed on the first capping layer and a portion of the second dielectric layer, an n-type doped silicon layer disposed on the second capping layer and the first conductive pad portion, an intrinsic silicon layer disposed on the n-type doped silicon layer, and a p-type doped silicon layer disposed on the intrinsic silicon layer.
摘要:
A plurality of image sensor structures and a plurality of methods for fabricating the plurality of image sensor structures provide for inhibited cracking and delamination of a lens capping layer with respect to a planarizing layer within the plurality of image sensor structures. Particular image sensor structures and related methods include at least one dummy lens layer of different dimensions than active lens layer located over a circuitry portion of a substrate within the particular image sensor structures. Additional particular image sensor structures include at least one of an aperture within the planarizing layer and a sloped endwall of the planarizing layer located over a circuitry portion within the particular image sensor structures.
摘要:
An imaging system for use in a digital camera or cell phone utilizes one chip for logic and one chip for image processing. The chips are interconnected using around-the-edge or through via conductors extending from bond pads on the active surface of the imaging chip to backside metallurgy on the imaging chip. The backside metallurgy of the imaging chip is connected to metallurgy on the active surface of the logic chip using an array of solder bumps in BGA fashion. The interconnection arrangement provides a CSP which matches the space constraints of a cell phone, for example. The arrangement also utilizes minimal wire lengths for reduced noise. Connection of the CSP to a carrier package may be either by conductive through vias or wire bonding. The CSP is such that the imaging chip may readily be mounted across an aperture in the wall of a cell phone, for example, so as to expose the light sensitive pixels on the active surface of said imaging chip to light.
摘要:
An imaging system for use in a digital camera or cell phone utilizes one chip for logic and one chip for image processing. The chips are interconnected using around-the-edge or through via conductors extending from bond pads on the active surface of the imaging chip to backside metallurgy on the imaging chip. The backside metallurgy of the imaging chip is connected to metallurgy on the active surface of the logic chip using an array of solder bumps in BGA fashion. The interconnection arrangement provides a CSP which matches the space constraints of a cell phone, for example. The arrangement also utilizes minimal wire lengths for reduced noise. Connection of the CSP to a carrier package may be either by conductive through vias or wire bonding. The CSP is such that the imaging chip may readily be mounted across an aperture in the wall of a cell phone, for example, so as to expose the light sensitive pixels on the active surface of said imaging chip to light.
摘要:
An image sensor array and method of fabrication wherein the sensor includes Copper (Cu) metallization levels allowing for incorporation of a thinner interlevel dielectric stack with improved thickness uniformity to result in a pixel array exhibiting increased light sensitivity. In the sensor array, each Cu metallization level includes a Cu metal wire structure formed at locations between each array pixel and, a barrier material layer is formed on top each Cu metal wire structure that traverses the pixel optical path. By implementing a single mask or self-aligned mask methodology, a single etch is conducted to completely remove the interlevel dielectric and barrier layers that traverse the optical path. The etched opening is then refilled with dielectric material. Prior to depositing the refill dielectric, a layer of either reflective or absorptive material is formed along the sidewalls of the etched opening to improve sensitivity of the pixels by either reflecting light to the underlying photodiode or by eliminating light reflections.
摘要:
An integrated circuit (IC), design structure, and a method of making the same. In one embodiment, the IC includes: a substrate; a dielectric layer disposed on the substrate; a set of wire components disposed on the dielectric layer, the set of wire components including a first wire component disposed proximate a second wire component; a bond pad disposed on the first wire component, the bond pad including an exposed portion; a passivation layer disposed on the dielectric layer about a portion of the bond pad and the set of wire components, the passivation layer defining a wire structure via connected to the second wire component; and a wire structure disposed on the passivation layer proximate the bond pad and connected to the second wire component through the wire structure via.
摘要:
An integrated circuit (IC), design structure, and a method of making the same. In one embodiment, the IC includes: a substrate; a dielectric layer disposed on the substrate; a set of wire components disposed on the dielectric layer, the set of wire components including a first wire component disposed proximate a second wire component; a bond pad disposed on the first wire component, the bond pad including an exposed portion; a passivation layer disposed on the dielectric layer about a portion of the bond pad and the set of wire components, the passivation layer defining a wire structure via connected to the second wire component; and a wire structure disposed on the passivation layer proximate the bond pad and connected to the second wire component through the wire structure via.
摘要:
A plurality of image sensor structures and a plurality of methods for fabricating the plurality of image sensor structures provide for inhibited cracking and delamination of a lens capping layer with respect to a planarizing layer within the plurality of image sensor structures. Particular image sensor structures and related methods include at least one dummy lens layer of different dimensions than active lens layer located over a circuitry portion of a substrate within the particular image sensor structures. Additional particular image sensor structures include at least one of an aperture within the planarizing layer and a sloped endwall of the planarizing layer located over a circuitry portion within the particular image sensor structures.