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1.发明授权公开(公告)号：US08207450B2
公开(公告)日：2012-06-26
申请号：US12382360
申请日：2009-03-13
Applicant: Jin Yong An , Jae Joon Lee
Inventor： Jin Yong An , Jae Joon Lee
IPC: H05K1/11
CPC classification number: H05K3/4007 , H01L21/4857 , H01L23/49811 , H01L23/49822 , H01L2221/68345 , H01L2924/0002 , H05K3/108 , H05K3/205 , H05K3/4682 , H05K2201/0367 , H05K2203/0228 , H05K2203/0376 , H05K2203/054 , Y10T29/49126 , Y10T29/49165 , H01L2924/00
Abstract: Disclosed herein is a printed circuit board, including: an upper circuit layer including connection pads made of a conductive metal and buried in an insulation layer; and metal bumps, each having a constant diameter, which are integrated with the connection pads and protrude over the insulation layer.
Abstract translation: 这里公开了一种印刷电路板，包括：上电路层，包括由导电金属制成的并埋在绝缘层中的连接焊盘; 和金属凸块，每个具有恒定的直径，其与连接焊盘成一体并突出在绝缘层上。
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公开(公告)号：US09021693B2
公开(公告)日：2015-05-05
申请号：US13477407
申请日：2012-05-22
Applicant: Jin Yong An , Jae Joon Lee
Inventor： Jin Yong An , Jae Joon Lee
CPC classification number: H05K3/4007 , H01L21/4857 , H01L23/49811 , H01L23/49822 , H01L2221/68345 , H01L2924/0002 , H05K3/108 , H05K3/205 , H05K3/4682 , H05K2201/0367 , H05K2203/0228 , H05K2203/0376 , H05K2203/054 , Y10T29/49126 , Y10T29/49165 , H01L2924/00
Abstract: A method of manufacturing a printed circuit board, including: applying a dry film on a carrier and then patterning the dry film to form holes for forming metal bumps; forming an upper circuit layer including metal bumps charged in the holes and connection pads on the dry film; forming an insulation layer on the dry film; forming a build-up layer including a lower circuit layer on the insulation layer; removing the carrier; and removing the dry film.
Abstract translation: 一种制造印刷电路板的方法，包括：在载体上涂覆干膜，然后对干膜图案形成用于形成金属凸块的孔; 形成包含填充在孔中的金属凸块和干膜上的连接焊盘的上电路层; 在干膜上形成绝缘层; 在所述绝缘层上形成包括下电路层的堆积层; 移除载体; 并除去干膜。
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3.发明申请Printed circuit board comprising metal bump and method of manufacturing the same 有权包括金属凸块的印刷电路板及其制造方法公开(公告)号：US20100139964A1
公开(公告)日：2010-06-10
申请号：US12382360
申请日：2009-03-13
Applicant: Jin Yong An , Jae Joon Lee
Inventor： Jin Yong An , Jae Joon Lee
CPC classification number: H05K3/4007 , H01L21/4857 , H01L23/49811 , H01L23/49822 , H01L2221/68345 , H01L2924/0002 , H05K3/108 , H05K3/205 , H05K3/4682 , H05K2201/0367 , H05K2203/0228 , H05K2203/0376 , H05K2203/054 , Y10T29/49126 , Y10T29/49165 , H01L2924/00
Abstract: Disclosed herein is a printed circuit board, including: an upper circuit layer including connection pads made of a conductive metal and buried in an insulation layer; and metal bumps, each having a constant diameter, which are integrated with the connection pads and protrude over the insulation layer.
Abstract translation: 这里公开了一种印刷电路板，包括：上电路层，包括由导电金属制成的并埋在绝缘层中的连接焊盘; 和金属凸块，每个具有恒定的直径，其与连接焊盘成一体并突出在绝缘层上。
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公开(公告)号：US20100024212A1
公开(公告)日：2010-02-04
申请号：US12588259
申请日：2009-10-08
Applicant: Shuhichi Okabe , Je Gwang Yoo , Chang Sup Ryu , Myung Sam Kang , Jung Hyun Park , Ji Hong Jo , Jin Yong An , Soon Oh Jung
Inventor： Shuhichi Okabe , Je Gwang Yoo , Chang Sup Ryu , Myung Sam Kang , Jung Hyun Park , Ji Hong Jo , Jin Yong An , Soon Oh Jung
CPC classification number: H05K3/205 , H05K3/062 , H05K3/108 , H05K3/462 , H05K2201/09509 , H05K2201/09563 , H05K2203/0369 , H05K2203/061 , H05K2203/0733 , H05K2203/1476 , Y10T29/49126 , Y10T29/49128 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165
Abstract: A method of fabricating a multilayer printed circuit board, which enables the formation of a micro circuit able to be realized through a semi-additive process using the CTE and rigidity of a metal carrier on a thin substrate which is difficult to convey.
Abstract translation: 一种制造多层印刷电路板的方法，其能够形成能够通过使用CTE的半添加工艺和难以传送的薄基板上的金属载体的刚性来实现的微电路。
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公开(公告)号：US20110318480A1
公开(公告)日：2011-12-29
申请号：US13137631
申请日：2011-08-30
Applicant: Ki Hwan Kim , Jin Yong An , Myung Sam Kang
Inventor： Ki Hwan Kim , Jin Yong An , Myung Sam Kang
IPC: H05K3/00
CPC classification number: H05K3/0097 , H05K3/0052 , H05K3/20 , H05K3/4644 , H05K3/4682 , H05K2203/0156 , H05K2203/1536
Abstract: A method of manufacturing a substrate using a carrier, that includes preparing a carrier having a releasing layer, and insulating layers and metal layers sequentially disposed on both sides of the releasing layer; patterning the metal layers to form base circuit layers; forming buildup layers on the base circuit layers; executing a routing process to separate the insulating layers from the releasing layer; and forming solder resist layers on the buildup layers and forming openings in the solder resist layers and the insulating layers to expose pads.
Abstract translation: 使用载体制造衬底的方法，其包括制备具有释放层的载体，以及顺序地设置在释放层两侧的绝缘层和金属层; 图案化金属层以形成基极电路层; 在基极电路层上形成积层; 执行布线过程以将绝缘层与释放层分离; 以及在堆积层上形成阻焊层，并在阻焊层和绝缘层中形成开口以露出焊盘。
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Patent Agency Ranking
公开(公告)号：US20090056119A1
公开(公告)日：2009-03-05
申请号：US12005610
申请日：2007-12-28
Applicant: Shuhichi Okabe , Je Gwang Yoo , Chang Sup Ryu , Myung Sam Kang , Jung Hyun Park , Ji Hong Jo , Jin Yong An , Soon Oh Jung
Inventor： Shuhichi Okabe , Je Gwang Yoo , Chang Sup Ryu , Myung Sam Kang , Jung Hyun Park , Ji Hong Jo , Jin Yong An , Soon Oh Jung
IPC: H05K3/00
CPC classification number: H05K3/205 , H05K3/062 , H05K3/108 , H05K3/462 , H05K2201/09509 , H05K2201/09563 , H05K2203/0369 , H05K2203/061 , H05K2203/0733 , H05K2203/1476 , Y10T29/49126 , Y10T29/49128 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165
Abstract: Disclosed is a method of fabricating a multilayer printed circuit board, which enables the formation of a micro circuit able to be realized through a semi-additive process using the CTE and rigidity of a metal carrier on a thin substrate which is difficult to convey.
Abstract translation: 公开了一种制造多层印刷电路板的方法，其能够形成能够通过使用CTE的半添加工艺和难以传送的薄基板上的金属载体的刚性来实现的微电路。
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公开(公告)号：US08677618B2
公开(公告)日：2014-03-25
申请号：US13137631
申请日：2011-08-30
Applicant: Ki Hwan Kim , Jin Yong An , Myung Sam Kang
Inventor： Ki Hwan Kim , Jin Yong An , Myung Sam Kang
CPC classification number: H05K3/0097 , H05K3/0052 , H05K3/20 , H05K3/4644 , H05K3/4682 , H05K2203/0156 , H05K2203/1536
Abstract: A method of manufacturing a substrate using a carrier, that includes preparing a carrier having a releasing layer, and insulating layers and metal layers sequentially disposed on both sides of the releasing layer; patterning the metal layers to form base circuit layers; forming buildup layers on the base circuit layers; executing a routing process to separate the insulating layers from the releasing layer; and forming solder resist layers on the buildup layers and forming openings in the solder resist layers and the insulating layers to expose pads.
Abstract translation: 使用载体制造衬底的方法，其包括制备具有释放层的载体，以及顺序地设置在释放层两侧的绝缘层和金属层; 图案化金属层以形成基极电路层; 在基极电路层上形成积层; 执行布线过程以将绝缘层与释放层分离; 以及在堆积层上形成阻焊层，并在阻焊层和绝缘层中形成开口以露出焊盘。
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公开(公告)号：US20110079349A1
公开(公告)日：2011-04-07
申请号：US12654360
申请日：2009-12-17
Applicant: Suk Hyeon Cho , Chang Sup Ryu , Jin Yong An , Soon Oh Jung , Sung Won Jeong , Byung Moon Kim , Dong Ju Jeon , Seok Kyu Lee , Jin Ho Kim
Inventor： Suk Hyeon Cho , Chang Sup Ryu , Jin Yong An , Soon Oh Jung , Sung Won Jeong , Byung Moon Kim , Dong Ju Jeon , Seok Kyu Lee , Jin Ho Kim
CPC classification number: H05K3/4682 , H05K3/0035 , H05K3/0052 , H05K3/007 , H05K3/0097 , H05K3/28 , H05K2203/066 , H05K2203/1536
Abstract: The present invention provides a method of manufacturing a printed circuit board including the steps of: preparing a pair of raw materials, each formed by sequentially stacking a release film and a first insulating layer, and an adhesive layer, respectively; embedding the pair of raw materials, which are opposed to each other, in the adhesive layer while disposing the release films toward an inner layer; forming a second insulating layer, which has a via formed therethrough and a circuit pattern formed on an upper surface to be connected to the via, on the first insulating layer; cutting edge portions of the second and first insulating layers, the release film, and the adhesive layer; and removing the release film from the first insulating layer.
Abstract translation: 本发明提供一种制造印刷电路板的方法，包括以下步骤：制备分别通过依次堆叠隔离膜和第一绝缘层而形成的一对原材料和粘合剂层; 在粘合剂层中嵌入彼此相对的一对原料，同时将释放膜设置在内层上; 在所述第一绝缘层上形成第二绝缘层，所述第二绝缘层具有穿过其形成的通孔和形成在与所述通孔连接的上表面上的电路图案; 第二和第一绝缘层，剥离膜和粘合剂层的切割边缘部分; 以及从所述第一绝缘层移除所述脱模膜。
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9.发明申请Carrier used in the manufacture of substrate and method of manufacturing substrate using the carrier 审中-公开用于制造基板的载体和使用载体制造基板的方法公开(公告)号：US20100147559A1
公开(公告)日：2010-06-17
申请号：US12382359
申请日：2009-03-13
Applicant: Ki Hwan Kim , Jin Yong An , Myung Sam Kang
Inventor： Ki Hwan Kim , Jin Yong An , Myung Sam Kang
CPC classification number: H05K3/0097 , H05K3/0052 , H05K3/20 , H05K3/4644 , H05K3/4682 , H05K2203/0156 , H05K2203/1536
Abstract: The invention relates to a carrier used in the manufacture of a substrate and a method of manufacturing a substrate using the carrier, the method including (A) preparing a carrier comprising a releasing layer, and insulating layers and metal layers sequentially disposed on both sides of the releasing layer; (B) patterning the metal layers to form base circuit layers; (C) forming buildup layers on the base circuit layers; (D) executing a routing process to separate the insulating layers from the releasing layer; and (E) forming solder-resist layers on the buildup layers and forming openings in-the solder-resist layers and the insulating layers to expose pads.
Abstract translation: 本发明涉及用于制造基板的载体和使用该载体制造基板的方法，该方法包括：（A）制备包括释放层的载体，以及顺序地设置在两侧的绝缘层和金属层 释放层; （B）图案化金属层以形成基极电路层; （C）在基极电路层上形成积层; （D）执行路由处理以将绝缘层与释放层分离; 和（E）在积层上形成阻焊层，并在阻焊层和绝缘层中形成开口以露出焊盘。
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公开(公告)号：US08209860B2
公开(公告)日：2012-07-03
申请号：US12552957
申请日：2009-09-02
Applicant: Jin Yong An , Seok Kyu Lee
Inventor： Jin Yong An , Seok Kyu Lee
IPC: H01R9/00
CPC classification number: H05K3/4007 , H05K3/0097 , H05K3/4682 , H05K2201/0367 , Y10T29/49126 , Y10T29/49144 , Y10T29/49147 , Y10T29/49149 , Y10T29/49165 , Y10T29/49213 , Y10T428/24917
Abstract: Disclosed herein are a printed circuit board having metal bumps which have uniform diameter and are formed at fine pitch, and a method of manufacturing the printed circuit board.
Abstract translation: 这里公开了具有均匀直径并以细间距形成的金属凸块的印刷电路板，以及制造印刷电路板的方法。
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