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    LOW LOSS SUBSTRATE FOR INTEGRATED PASSIVE DEVICES
    7.
    发明申请
    LOW LOSS SUBSTRATE FOR INTEGRATED PASSIVE DEVICES 有权
    用于集成无源器件的低损耗基板

    公开(公告)号：US20100140714A1

    公开(公告)日：2010-06-10

    申请号：US12328325

    申请日：2008-12-04

    申请人： Xiaowei Ren ,  Wayne R. Burger ,  Colin Kerr ,  Mark A. Bennett

    发明人： Xiaowei Ren ,  Wayne R. Burger ,  Colin Kerr ,  Mark A. Bennett

    IPC分类号： H01L29/78 ,  H01L21/76 ,  H01L27/00

    CPC分类号： H01L27/08 ,  H01L21/763 ,  H01L27/0207 ,  H01L27/0617 ,  H01L27/0629 ,  H01L28/10

    摘要： Electronic elements (44, 44′, 44″) having an active device region (46) and integrated passive device (IPD) region (60) on a common substrate (45) preferably include a composite dielectric region (62, 62′, 62″) in the IPD region underlying the IPD (35) to reduce electromagnetic (E-M) (33) coupling to the substrate (45). Mechanical stress created by plain dielectric regions (36′) and its deleterious affect on performance, manufacturing yield and occupied area may be avoided by providing electrically isolated inclusions (65, 65′, 65″) in the composite dielectric region (62, 62′, 62″) of a material having a thermal expansion coefficient (TEC) less than that of the dielectric material (78, 78′, 78″) in the composite dielectric region (62, 62′, 62″). For silicon substrates (45), non-single crystal silicon is suitable for the inclusions (65, 65′, 65″) and silicon oxide for the dielectric material (78, 78′, 78″). The inclusions (65, 65′, 65″) preferably have a blade-like shape separated by and enclosed within the dielectric material (78, 78′, 78″).

    摘要翻译： 在共用衬底（45）上具有有源器件区域（46）和集成无源器件（IPD）区域（60）的电子元件（44,44'，44“）优选地包括复合电介质区域（62,62'，62 “）在IPD（IP）（35）下方的IPD区域中以减少耦合到衬底（45）的电磁（EM）（33）。 可以通过在复合介电区域（62,62'）中提供电隔离的夹杂物（65,65'，65“）来避免由平坦介电区域（36'）产生的机械应力及其对性能，制造产量和占用面积的有害影响， ，62“）具有比所述复合介电区域（62,62'，62”）中的电介质材料（78,78'，78“）的热膨胀系数小的热膨胀系数（TEC）的材料。 对于硅衬底（45），非单晶硅适用于电介质材料（78,78'，78“）的夹杂物（65,65'，65”）和氧化硅。 夹杂物（65,65'，65“）优选具有由电介质材料（78,78'，78”）分隔开并封闭在其中的刀片形状。

    Integrated circuits including integrated passive devices and methods of manufacture thereof
    8.
    发明授权
    Integrated circuits including integrated passive devices and methods of manufacture thereof 有权
    集成电路，包括集成无源器件及其制造方法

    公开(公告)号：US08906773B2

    公开(公告)日：2014-12-09

    申请号：US13712051

    申请日：2012-12-12

    申请人： Xiaowei Ren ,  Wayne R. Burger

    发明人： Xiaowei Ren ,  Wayne R. Burger

    IPC分类号： H01L21/20 ,  H01L27/108

    CPC分类号： H01L23/5223 ,  H01L28/75 ,  H01L28/84 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Embodiments of integrated passive devices (e.g., metal insulator metal, or MIM, capacitors) and methods of their formation include depositing a composite electrode over a semiconductor substrate (e.g., on a dielectric layer above the substrate surface), and depositing an insulator layer over the composite electrode. The composite electrode includes an underlying electrode and an overlying electrode deposited on a top surface of the underlying electrode. The underlying electrode is formed from a first conductive material (e.g., AlCuW), and the overlying electrode is formed from a second, different conductive material (e.g., AlCu). The top surface of the underlying electrode may have a relatively rough surface morphology, and the top surface of the overlying electrode may have a relatively smooth surface morphology. For high frequency, high power applications, both the composite electrode and the insulator layer may be thicker than in some conventional integrated passive devices.

    摘要翻译： 集成无源器件（例如，金属绝缘体金属或MIM，电容器）的实施例及其形成方法包括在半导体衬底（例如，在衬底表面上方的电介质层上）沉积复合电极，以及将绝缘体层沉积在 复合电极。 复合电极包括底层电极和沉积在下面电极的顶表面上的上覆电极。 底层电极由第一导电材料（例如，AlCuW）形成，并且上覆电极由第二不同的导电材料（例如AlCu）形成。 底层电极的顶表面可能具有相对粗糙的表面形态，并且上覆电极的顶表面可具有相对平滑的表面形态。 对于高频，高功率应用，复合电极和绝缘体层可能比一些传统的集成无源器件更厚。

    Lateral bipolar transistor
    9.
    发明授权
    Lateral bipolar transistor 失效
    侧面双极晶体管

    公开(公告)号：US5358883A

    公开(公告)日：1994-10-25

    申请号：US105490

    申请日：1993-08-12

    申请人： Wayne R. Burger ,  Yee-Chaung See

    发明人： Wayne R. Burger ,  Yee-Chaung See

    IPC分类号： H01L21/331 ,  H01L29/732 ,  H01L29/735 ,  H01L21/265

    CPC分类号： H01L29/6625 ,  H01L29/7322 ,  H01L29/735 ,  Y10S148/096 ,  Y10S148/124

    摘要： A lateral bipolar transistor (10) includes a retrograde doping profile (21) that is formed within a substrate (11) to form the transistor's (10) collector region (14). A base region (16) that includes an inactive base area and an active base area (17) is formed in the collector region (14). An emitter (18) is formed within the active base area (17) wherein current (22) flows through the emitter (18) through the active base area (17) and through the collector region (14). The base region, the emitter, and a collector contact region are all formed by driving dopants from an overlying polysilicon layer.

    摘要翻译： 横向双极晶体管（10）包括形成在衬底（11）内以形成晶体管（10）集电极区域（14）的逆向掺杂分布（21）。 在收集器区域（14）中形成包括非活性基区和有源基区（17）的基区（16）。 发射极（18）形成在有源基极区域（17）内，其中电流（22）通过有源基极区域（17）流过发射极（18）并通过集电极区域（14）。 基极区域，发射极和集电极接触区域都是通过驱动来自上覆多晶硅层的掺杂剂形成的。