公开(公告)号：US07045900B2

公开(公告)日：2006-05-16

申请号：US10797018

申请日：2004-03-11

申请人： Junichi Hikita ,  Goro Nakatani ,  Nobuhisa Kumamoto ,  Katsumi Sameshima ,  Kazutaka Shibata ,  Shigeyuki Ueda

发明人： Junichi Hikita ,  Goro Nakatani ,  Nobuhisa Kumamoto ,  Katsumi Sameshima ,  Kazutaka Shibata ,  Shigeyuki Ueda

IPC分类号： H01L23/48 ,  H01L23/52

CPC分类号： H01L24/81 ,  H01L23/49575 ,  H01L23/552 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/28 ,  H01L24/31 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/05599 ,  H01L2224/05644 ,  H01L2224/05669 ,  H01L2224/10135 ,  H01L2224/10165 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/16145 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73207 ,  H01L2224/81136 ,  H01L2224/81139 ,  H01L2224/81141 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81801 ,  H01L2224/85399 ,  H01L2225/06513 ,  H01L2225/06593 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01021 ,  H01L2924/01022 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/181 ,  H01L2924/3011 ,  H01L2924/3511 ,  H01L2924/01031 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/013

摘要： A semiconductor chip having a functional bump provided on a surface of a semiconductor substrate thereof for electrical connection between an internal circuit thereof and a solid device, and a dummy bump not serving for the electrical connection between the internal circuit and the solid device. The dummy bump may be a stress relieving bump for relieving stresses exerted thereon. The dummy bump may be connected to a low impedance portion. The functional bump and the dummy bump may be provided on a surface protective film. In this case, the dummy bump is provided on a recess formed in the surface protective film.

摘要翻译： 具有设置在其半导体衬底的表面上的用于在其内部电路和固体器件之间进行电连接的功能性凸块的半导体芯片和不用于内部电路和固体器件之间的电连接的虚拟凸起。 虚拟凸块可以是用于减轻施加在其上的应力的应力消除凸块。 虚拟凸块可以连接到低阻抗部分。 可以在表面保护膜上设置功能性凸块和虚设凸块。 在这种情况下，在形成在表面保护膜上的凹部上设置虚拟凸块。

公开(公告)号：US06724084B1

公开(公告)日：2004-04-20

申请号：US09499384

申请日：2000-02-07

申请人： Junichi Hikita ,  Goro Nakatani ,  Nobuhisa Kumamoto ,  Katsumi Sameshima ,  Kazutaka Shibata ,  Shigeyuki Ueda

发明人： Junichi Hikita ,  Goro Nakatani ,  Nobuhisa Kumamoto ,  Katsumi Sameshima ,  Kazutaka Shibata ,  Shigeyuki Ueda

IPC分类号： H01L2348

CPC分类号： H01L24/81 ,  H01L23/49575 ,  H01L23/552 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/28 ,  H01L24/31 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/05599 ,  H01L2224/05644 ,  H01L2224/05669 ,  H01L2224/10135 ,  H01L2224/10165 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/16145 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73207 ,  H01L2224/81136 ,  H01L2224/81139 ,  H01L2224/81141 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81801 ,  H01L2224/85399 ,  H01L2225/06513 ,  H01L2225/06593 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01021 ,  H01L2924/01022 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/181 ,  H01L2924/3011 ,  H01L2924/3511 ,  H01L2924/01031 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/013

摘要： A semiconductor chip having a functional bump provided on a surface of a semiconductor substrate thereof for electrical connection between an internal circuit thereof and a solid device, and a dummy bump not serving for the electrical connection between the internal circuit and the solid device. The dummy bump may be a stress relieving bump for relieving stresses exerted thereon. The dummy bump may be connected to a low impedance portion. The functional bump and the dummy bump may be provided on a surface protective film. In this case, the dummy bump is provided on a recess formed in the surface protective film.

公开(公告)号：US07589415B2

公开(公告)日：2009-09-15

申请号：US10119936

申请日：2002-04-11

申请人： Junichi Hikita ,  Kazutaka Shibata ,  Shigeyuki Ueda

发明人： Junichi Hikita ,  Kazutaka Shibata ,  Shigeyuki Ueda

IPC分类号： H01L23/04

CPC分类号： H01J9/142 ,  H01J9/146 ,  H01J29/076 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/02 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/04042 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06572 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/19041 ,  H01L2924/19043

摘要： A semiconductor chip in which a through hole penetrating through its surface and reverse surface is formed in a scribe line region in the vicinity of an active region where a functional device is formed, and a conductive member is arranged in the through portion. The through portion may be a groove opening sideward on a sidewall surface of the semiconductor chip. The through portion may be a through hole blocked from a side part of the semiconductor chip. The semiconductor chip may further include wiring for electrically connecting an internal circuit formed in the active region and the conductive member to each other.

公开(公告)号：US06376915B1

公开(公告)日：2002-04-23

申请号：US09512337

申请日：2000-02-24

申请人： Junichi Hikita ,  Kazutaka Shibata ,  Shigeyuki Ueda

发明人： Junichi Hikita ,  Kazutaka Shibata ,  Shigeyuki Ueda

IPC分类号： H01L2348

CPC分类号： H01L23/295 ,  H01L23/10 ,  H01L23/49575 ,  H01L2224/16145 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/00 ,  H01L2224/0401

摘要： A semiconductor device having a semiconductor chip bonded to the surface of a solid body (another semiconductor chip or wiring board). A hollow enclosed space surrounding a connection member is formed between the solid body surface and the surface of the semiconductor chip opposite thereto. The enclosed space may be formed by a surrounding wall disposed around the circumference of the semiconductor chip. The enclosed space may alternatively be formed by an encapsulating resin for packaging.

摘要翻译： 一种半导体器件，其具有与固体本体（另一半导体芯片或布线基板）的表面接合的半导体芯片。 在固体表面和与其相对的半导体芯片的表面之间形成围绕连接构件的中空封闭空间。 封闭空间可以由围绕半导体芯片的圆周设置的周围壁形成。 封闭空间可替代地由用于包装的封装树脂形成。

公开(公告)号：US07009294B2

公开(公告)日：2006-03-07

申请号：US10748327

申请日：2003-12-31

申请人： Junichi Hikita ,  Kazutaka Shibata ,  Shigeyuki Ueda

发明人： Junichi Hikita ,  Kazutaka Shibata ,  Shigeyuki Ueda

IPC分类号： H01L23/48

CPC分类号： H01L24/11 ,  H01L21/6835 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05572 ,  H01L2224/11003 ,  H01L2224/11334 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10329 ,  H01L2924/19043 ,  H01L2224/05666 ,  H01L2924/00014 ,  H01L2224/05684 ,  H01L2224/05124

摘要： A production process for a semiconductor device having a metal electrode on a semiconductor substrate thereof. A metal electrode portion is formed on a surface of another substrate for electrode transfer. Then, the metal electrode portion is transferred from the electrode transfer substrate onto the semiconductor substrate by pressing together the electrode transfer substrate and the semiconductor substrate. The electrode transfer substrate has, for example, a seed film provided on the surface thereof, and the formation of the metal electrode portion on the electrode transfer substrate may be achieved by depositing a material for the metal electrode on the seed film by plating. The electrode transfer substrate may have an insulating film which covers a surface of the seed film except a portion thereof on which the metal electrode portion is to be formed.

摘要翻译： 一种在其半导体衬底上具有金属电极的半导体器件的制造方法。 金属电极部分形成在用于电极转移的另一基板的表面上。 然后，通过将电极转移衬底和半导体衬底压在一起，将金属电极部分从电极转移衬底转移到半导体衬底上。 电极转移基板具有例如设置在其表面上的种子膜，并且可以通过电镀在种子膜上沉积金属电极材料来实现电极转移基板上的金属电极部分的形成。 电极转移基板可以具有覆盖除了要形成金属电极部分的部分之外的种子膜的表面的绝缘膜。

公开(公告)号：US06696347B1

公开(公告)日：2004-02-24

申请号：US09511800

申请日：2000-02-23

申请人： Junichi Hikita ,  Kazutaka Shibata ,  Shigeyuki Ueda

发明人： Junichi Hikita ,  Kazutaka Shibata ,  Shigeyuki Ueda

IPC分类号： H01L2176

CPC分类号： H01L24/11 ,  H01L21/6835 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05572 ,  H01L2224/11003 ,  H01L2224/11334 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10329 ,  H01L2924/19043 ,  H01L2224/05666 ,  H01L2924/00014 ,  H01L2224/05684 ,  H01L2224/05124

摘要： A production process for a semiconductor device having a metal electrode on a semiconductor substrate thereof. A metal electrode portion is formed on a surface of another substrate for electrode transfer. Then, the metal electrode portion is transferred from the electrode transfer substrate onto the semiconductor substrate by pressing together the electrode transfer substrate and the semiconductor substrate. The electrode transfer substrate has, for example, a seed film provided on the surface thereof, and the formation of the metal electrode portion on the electrode transfer substrate may be achieved by depositing a material for the metal electrode on the seed film by plating. The electrode transfer substrate may have an insulating film which covers a surface of the seed film except a portion thereof on which the metal electrode portion is to be formed.

公开(公告)号：US06391685B1

公开(公告)日：2002-05-21

申请号：US09511106

申请日：2000-02-23

申请人： Junichi Hikita ,  Kazutaka Shibata ,  Shigeyuki Ueda

发明人： Junichi Hikita ,  Kazutaka Shibata ,  Shigeyuki Ueda

IPC分类号： H01L2144

CPC分类号： H01J9/142 ,  H01J9/146 ,  H01J29/076 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/02 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/04042 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06572 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/19041 ,  H01L2924/19043

摘要： A semiconductor chip in which a through hole penetrating through its surface and reverse surface is formed in a scribe line region in the vicinity of an active region where a functional device is formed, and a conductive member is arranged in the through portion. The through portion may be a groove opening sideward on a sidewall surface of the semiconductor chip. The through portion may be a through hole blocked from a side part of the semiconductor chip. The semiconductor chip further includes wiring for electrically connecting an internal circuit formed in the active region and the conductive member to each other.

摘要翻译： 在形成有功能元件的有源区域附近的划线区域形成贯通其表面和反面的通孔的半导体芯片，并且在贯通部配置导电部件。 贯通部分可以是在半导体芯片的侧壁表面上的侧向槽的开口。 贯通部分可以是从半导体芯片的侧部阻挡的通孔。 半导体芯片还包括用于将形成在有源区域中的内部电路和导电构件彼此电连接的布线。

公开(公告)号：US06635962B2

公开(公告)日：2003-10-21

申请号：US09950058

申请日：2001-09-12

申请人： Kazutaka Shibata ,  Shigeyuki Ueda ,  Toshio Enami

发明人： Kazutaka Shibata ,  Shigeyuki Ueda ,  Toshio Enami

IPC分类号： H01L2348

CPC分类号： H01L25/0652 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/05124 ,  H01L2224/05184 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05644 ,  H01L2224/16145 ,  H01L2224/45144 ,  H01L2924/01322 ,  H01L2924/00 ,  H01L2224/05139 ,  H01L2924/00014 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05171

摘要： In the case where a plurality of second semiconductor chips (2a and 2b) are bonded to the surface side of a first semiconductor chip (1) via bump electrodes (11 and 21), an interconnection (9) for directly connecting electrode terminals (22a and 22b) of the two second semiconductor chips (2a and 2b) is formed on the surface of a passivation film (17) of the first semiconductor chip (1). As a result, a semiconductor device of a COC type in which a plurality of second semiconductor chips are mounted, while obtaining generalization of the first semiconductor chip, a signal can be transmitted/received between the second semiconductor chips without changing the design of the semiconductor device in the first semiconductor chip and a method for manufacturing the semiconductor device can be provided.

摘要翻译： 在通过凸块电极（11和21）将多个第二半导体芯片（2a和2b）接合到第一半导体芯片（1）的表面侧的情况下，用于直接连接电极端子（22a）的互连 和第二半导体芯片（2a和2b）的表面形成在第一半导体芯片（1）的钝化膜（17）的表面上。 结果，在获得第一半导体芯片的泛化的同时，在安装了多个第二半导体芯片的COC型半导体器件中，可以在不改变半导体的设计的情况下在第二半导体芯片之间发送/接收信号 可以提供第一半导体芯片中的器件和半导体器件的制造方法。

公开(公告)号：US06399419B1

公开(公告)日：2002-06-04

申请号：US09604747

申请日：2000-06-28

申请人： Kazutaka Shibata ,  Shigeyuki Ueda

发明人： Kazutaka Shibata ,  Shigeyuki Ueda

IPC分类号： H01L2144

CPC分类号： H01L24/81 ,  H01L2224/13144 ,  H01L2224/16 ,  H01L2224/81801 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/00

摘要： A method of opposing and joining a surface of a solid device and a surface of a semiconductor chip. A metal electrode portion formed in a raised state on the surface of the solid device and a metal electrode portion formed in a raised state on the surface of the semiconductor chip are directly abutted and pressed against each other. In the state, ultrasonic vibration is transmitted to the metal electrode portions which are pressed against each other, to join the metal electrode portions to each other.

摘要翻译： 一种将固体器件的表面和半导体芯片的表面相对并接合的方法。 在固体器件的表面上形成为升高状态的金属电极部分和在半导体芯片的表面上形成为升高状态的金属电极部分直接抵接并相互压靠。 在该状态下，超声波振动被传递到彼此压靠的金属电极部分，以将金属电极部分彼此接合。

公开(公告)号：US06204564B1

公开(公告)日：2001-03-20

申请号：US09196884

申请日：1998-11-20

申请人： Osamu Miyata ,  Kazutaka Shibata ,  Shigeyuki Ueda

发明人： Osamu Miyata ,  Kazutaka Shibata ,  Shigeyuki Ueda

IPC分类号： H01L2348

CPC分类号： H01L23/544 ,  H01L21/563 ,  H01L23/556 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/83 ,  H01L24/97 ,  H01L29/0657 ,  H01L2223/54406 ,  H01L2223/54473 ,  H01L2223/5448 ,  H01L2224/11334 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/29399 ,  H01L2224/32057 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48465 ,  H01L2224/49175 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83101 ,  H01L2224/8319 ,  H01L2224/83385 ,  H01L2224/838 ,  H01L2224/83951 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/0781 ,  H01L2924/07811 ,  H01L2924/10158 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A semiconductor device comprising a film substrate and a semiconductor chip bonded to an upper surface of the film substrate is provided. The semiconductor chip has a main surface formed with a plurality of terminal pads. The film substrate has a lower surface formed with a plurality of external terminal portions in a matrix pattern, and an upper surface formed with a plurality of wiring patterns for respectively connecting with the external terminal portions. The wiring patterns formed in the upper surface of the film substrate are respectively connected to the terminal pads formed on the main surface of the semiconductor chip.

摘要翻译： 提供一种半导体器件，其包括膜基片和与该基片的上表面接合的半导体芯片。 半导体芯片具有形成有多个端子焊盘的主表面。 薄膜基板具有以矩阵图形形成有多个外部端子部的下表面，以及形成有分别与外部端子部连接的多个布线图案的上表面。 形成在薄膜基板的上表面上的布线图案分别连接到形成在半导体芯片的主表面上的端子焊盘。