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公开(公告)号：US06887560B2
公开(公告)日：2005-05-03
申请号：US10363165
申请日：2002-07-03
CPC分类号： H05K3/4658 , H05K1/0393 , H05K3/20 , H05K3/281 , H05K3/4038 , H05K3/4602 , H05K3/4617 , H05K3/4635 , H05K3/4652 , H05K2201/0305 , H05K2201/09536 , H05K2203/0425 , Y10S428/901 , Y10T428/24917
摘要： A multilayer flexible wired circuit board that can provide high density wiring and also can provide reduction in thickness and size, and a producing method thereof. A four-layered flexible wired circuit board is produced by preparing a double-sided substrate in which a first conductor layer and a second conductor layer are laminated on both sides of a first insulating layer; preparing a first single-sided substrate in which a third conductor layer is laminated on one surface of a second insulating layer and a second single-sided substrate in which a fourth conductor layer is laminated on one surface of a third insulating layer; bonding the first conductor layer and the third conductor layer to each other through a first thermosetting adhesive layer; and bonding the second conductor layer and the fourth conductor layer to each other through a second thermosetting adhesive layer.
摘要翻译： 一种可提供高密度布线并且还可以提供厚度和尺寸的减小的多层柔性布线电路板及其制造方法。 通过制备在第一绝缘层的两侧上层叠有第一导体层和第二导体层的双面基板来制造四层柔性布线电路板; 制备其中在第二绝缘层的一个表面上层叠第三导体层的第一单面基板和在第三绝缘层的一个表面上层叠第四导体层的第二单面基板; 通过第一热固性粘合剂层将第一导体层和第三导体层彼此接合; 以及通过第二热固性粘合剂层将所述第二导体层和所述第四导体层彼此接合。
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公开(公告)号：US20050079652A1
公开(公告)日：2005-04-14
申请号：US10959108
申请日：2004-10-07
申请人： Mineyoshi Hasegawa , Kei Nakamura , Toshikazu Baba
发明人： Mineyoshi Hasegawa , Kei Nakamura , Toshikazu Baba
CPC分类号： H05K3/0038 , H05K1/0393 , H05K3/386 , H05K3/427 , H05K3/429 , H05K3/4626 , H05K3/4635 , H05K3/4652 , H05K3/4655 , H05K2201/0195
摘要： A method of producing a multilayer wired circuit board that can suppress making gouge in an adhesive layer when a hole is formed by irradiation with a laser beam, to provide a smoothened inside surface of the hole so as to provide enhanced reliability of electrical connection. A first substrate 4 having the structure wherein a first metal foil 2 and a second metal foil 3 are formed on both sides of a first insulating layer 1 and a second substrate 7 having the structure wherein a third metal foil 6 is formed on a single side of a second insulating layer 5 are prepared, separately. Then, the first metal foil 2 of the first substrate 4 and the second insulating layer 5 of the second substrate 7 are bonded together through an adhesive layer 8. Thereafter, the resultant laminate is irradiated with a laser beam emitting from the first substrate 4 side toward the second substrate 7 side, to form a through hole 9. When the through hole 9 is formed, the adhesive layer 8 is irradiated with the laser beam decayed in energy after applied to the second metal foil 3 and the first metal foil 2. Hence, the adhesive layer can be prevented from being gouged by thermal decomposition, and as such can permit a smoothened inside surface of the through hole 9.
摘要翻译： 一种制造多层布线电路板的方法，该多层布线电路板可以通过用激光束照射形成孔而能够抑制在粘合剂层中产生气泡，从而提供孔的光滑的内表面，从而提高电连接的可靠性。 具有这样的结构的第一基板4，其中在第一绝缘层1和第二基板7的两侧形成有第一金属箔2和第二金属箔3，第二基板7具有在第一金属箔6的单侧上形成第三金属箔6 分别制备第二绝缘层5。 然后，第一基板4的第一金属箔2和第二基板7的第二绝缘层5通过粘合层8接合在一起。然后，用从第一基板4侧发射的激光束照射所得到的层压体 朝向第二基板7侧形成通孔9.当形成通孔9时，在施加到第二金属箔3和第一金属箔2上之后，用能量衰减的激光束照射粘合剂层8。 因此，可以防止粘合剂层因热分解而被破坏，因此能够使通孔9的内表面平滑化。
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公开(公告)号：US06851599B2
公开(公告)日：2005-02-08
申请号：US10363167
申请日：2002-07-03
申请人： Kei Nakamura , Satoshi Tanigawa , Shinya Oota
发明人： Kei Nakamura , Satoshi Tanigawa , Shinya Oota
CPC分类号： H05K3/462 , H05K3/4038 , H05K3/4623 , H05K2201/0305 , H05K2201/09536 , H05K2203/0425 , Y10T156/10
摘要： A method of producing a multilayer wired circuit board that can provide sufficient adhesion strength of the interface between a conductor layer and a thermosetting adhesive layer laminated, to provide improvement in connection strength between the conductor layers and thus improvement in reliability. In this method, after a thermosetting adhesive layer is formed on a first conductor layer, an opening is formed in the thermosetting adhesive layer and solder powders are charged in the opening at normal temperature. Sequentially, a second conductor layer is formed on the thermosetting adhesive layer including the opening filled with the solder powders. Thereafter, the solder powders are melted by heating, to electrically connect between the first conductor layer and the second conductor layer.
摘要翻译： 一种多层布线电路板的制造方法，其能够提供层叠的导体层和热固性粘合层之间的界面的充分的粘合强度，以提高导体层之间的连接强度，从而提高可靠性。 在该方法中，在第一导体层上形成热固性粘合剂层之后，在热固性粘合剂层中形成开口，并且在常温下在开口中填充焊料粉末。 接着，在包含填充有焊料粉末的开口的热固性粘合剂层上形成第二导体层。 此后，通过加热熔化焊料粉末，以电连接第一导体层和第二导体层之间。
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公开(公告)号：US08452138B2
公开(公告)日：2013-05-28
申请号：US13361230
申请日：2012-01-30
申请人： Ryusuke Naito , Emiko Tani , Masayuki Hodono , Yusuke Shimizu , Kei Nakamura
发明人： Ryusuke Naito , Emiko Tani , Masayuki Hodono , Yusuke Shimizu , Kei Nakamura
CPC分类号： G02B6/423
摘要： An optical sensor module is provided in which an engagement portion of a board unit is fitted in a groove of an optical waveguide unit and, even with the single engagement portion, the board unit is stably supported. An optical sensor module includes an optical waveguide unit, and a board unit mounted with an optical element and coupled to the optical waveguide unit. The optical waveguide unit includes a single edge extension portion axially extending along one side edge of an over-cladding layer, a board unit engagement groove provided in the single edge extension portion, and a projection provided on a side wall of the vertical groove and kept in abutment against an engagement portion of the board unit. The board unit includes an engagement portion fitted in the vertical groove, which abuts against the projection within the vertical groove.
摘要翻译： 提供一种光传感器模块，其中板单元的接合部分装配在光波导单元的凹槽中，并且即使具有单个接合部分，板单元也被稳定地支撑。 光传感器模块包括光波导单元和安装有光学元件并耦合到光波导单元的板单元。 光波导单元包括沿着上包层的一个侧边缘轴向延伸的单个边缘延伸部分，设置在单个边缘延伸部分中的基板单元接合槽，以及设置在垂直槽的侧壁上并保持的突起 与基板单元的接合部抵接。 板单元包括装配在垂直槽中的接合部分，其垂直于垂直槽内的突起。
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公开(公告)号：US20090192153A1
公开(公告)日：2009-07-30
申请号：US12067780
申请日：2006-09-21
申请人： Kazuki Hashimoto , Tomoaki Nakamura , Kei Nakamura , Ayumu Kurimoto , Yoshiaki Isobe , Haruhisa Ogita , Ian Millichip , Thomas Mcinally , Roger Bonnert
发明人： Kazuki Hashimoto , Tomoaki Nakamura , Kei Nakamura , Ayumu Kurimoto , Yoshiaki Isobe , Haruhisa Ogita , Ian Millichip , Thomas Mcinally , Roger Bonnert
IPC分类号： A61K31/5377 , C07D473/34 , A61K31/522 , A61P37/08
CPC分类号： C07D473/18
摘要： An adenine compound or its pharmaceutically acceptable salt as a medicament as shown following formula (1): wherein R1 is optionally substituted alkyl group, etc., X is oxygen atom, etc., A is 4 to 8 membered optionally substituted saturated or unsaturated heterocyclic group containing 1 to 2 hetero atoms selected from 1 to 3 nitrogen atoms, 0 to 1 oxygen atom and 0 to 1 sulfur atom, L1 and L2 are independently straight or branched chain alkylene, or a single bond, R2 is optionally substituted alkyl group, etc.
摘要翻译： 腺嘌呤化合物或其药学上可接受的盐作为如下式（1）所示的药物：其中R 1是任选取代的烷基等，X是氧原子等，A是4至8元任选取代的饱和或不饱和杂环 含有1至2个选自1至3个氮原子，0至1个氧原子和0至1个硫原子的杂原子的基团，L1和L2独立地为直链或支链亚烷基或单键，R2为任选取代的烷基， 等等
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公开(公告)号：US06333469B1
公开(公告)日：2001-12-25
申请号：US09353385
申请日：1999-07-15
IPC分类号： H05K116
CPC分类号： H01L24/94 , H01L23/3114 , H01L23/4985 , H01L2224/05571 , H01L2224/05573 , H01L2224/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01057 , H01L2924/01061 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/12042 , H01L2924/15311 , H01L2924/00 , H01L2224/05599
摘要： A wafer-scale package structure in which a circuit board for rearranging electrode pads of a wafer is laminated on the wafer integrally. The circuit board can be divided into individual chip-size packages (CSPS) and which includes a layer of polyimide resin, and connection between the wafer and the circuit board is performed by solder bump, while the circuit board is stuck on the wafer with an adhesive.
摘要翻译： 一种晶片级封装结构，其中用于重新排列晶片的电极焊盘的电路板一体地层压在晶片上。 电路板可分为单个芯片尺寸封装（CSPS），其中包含一层聚酰亚胺树脂，晶圆与电路板之间的连接由焊锡凸块进行，而电路板则以 胶粘剂。
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公开(公告)号：US06310391B1
公开(公告)日：2001-10-30
申请号：US09334631
申请日：1999-06-17
IPC分类号： H01L23053
CPC分类号： H05K3/462 , H01L23/142 , H01L23/3677 , H01L23/5385 , H01L2224/16 , H01L2924/00014 , H01L2924/01019 , H01L2924/01078 , H01L2924/01079 , H01L2924/10253 , H05K1/0206 , H05K1/0207 , H05K3/28 , H05K3/4038 , H05K3/445 , H05K3/4623 , H05K3/4641 , H05K2201/0305 , H05K2201/068 , H05K2201/09536 , H05K2201/096 , H05K2201/10674 , H01L2924/00 , H01L2224/0401
摘要： The present invention provides a mounted structure of circuit board which can be prepared by a simple method and exhibits a good heat dissipation from chip and undergoes relaxed heat stress and a multi-layer circuit board to be incorporated in the mounted structure. A novel mounted structure of circuit board is provided comprising a core material embedded in an insulating layer, said core material having a metal layer with a heat conductivity of not less than 100 W/m·K provided on at least one side of an Ni—Fe alloy foil, said insulating layer comprising a wire conductor provided and a semiconductor element mounted on at least one side thereof, characterized in that a solder metal member for heat conduction is provided interposed between said semiconductor element and said core material so that said semiconductor element and said core material are connected to each other. The mounted structure of circuit board comprises a 6-layer circuit board 2 having a laminate of three sheets of double-sided circuit boards 1 and a chip 13 connected to a circuit 5 on the uppermost layer. The core material 3 embedded in the intraboard insulating layer 4 in various double-sided circuit board 1 comprises a copper layer 3a having a heat conductivity of 393 W/·K provided on at least one side of an Ni—Fe alloy foil 25. The chip 13 and the underlying core material 3 are connected to each other with a solder metal member 10. The core material 3 on the horizontally adjacent double-sided circuit boards 1 are similarly connected to each other with the solder metal member 10.
摘要翻译： 本发明提供了一种电路板的安装结构，其可以通过简单的方法制备，并且显示出来自芯片的良好散热并经受松弛的热应力，并且将多层电路板并入安装的结构中。 提供一种电路板的新型安装结构，其包括嵌入绝缘层中的芯材，所述芯材具有设置在Ni-Fe合金的至少一侧上的导热率不小于100W / mK的金属层 箔，所述绝缘层包括设置的导线导体和安装在其至少一侧上的半导体元件，其特征在于，设置用于导热的焊料金属构件插入在所述半导体元件和所述芯材之间，使得所述半导体元件和所述 芯材彼此连接。 电路板的安装结构包括具有三片双面电路板1和连接到最上层电路5的芯片13的叠层的6层电路板2。 在各种双面电路板1中嵌入在内部绝缘层4中的芯材3包括设置在Ni-Fe合金箔25的至少一侧上的导热率为393W / K.的铜层3a。 芯片13和下面的芯材3通过焊料金属部件10彼此连接。水平相邻的双面电路板1上的芯材3类似地用焊料金属部件10彼此连接。
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公开(公告)号：US06258449B1
公开(公告)日：2001-07-10
申请号：US09328485
申请日：1999-06-09
IPC分类号： B32B300
CPC分类号： H01L23/5385 , H01L23/3735 , H01L23/5384 , H01L2924/0002 , H05K1/056 , H05K1/09 , H05K3/4614 , H05K3/462 , H05K3/4623 , H05K2201/0154 , H05K2201/0338 , H05K2201/09536 , Y10S428/901 , Y10T428/24917 , H01L2924/00
摘要： A low-thermal expansion circuit board comprising an insulating layer made of an organic polymer having thereon a wiring conductor for bare chip mounting, wherein the wiring conductor is an iron-nickel-based alloy layer having a copper layer on at least one side thereof; and a low-thermal expansion multilayer circuit board having a plurality of the low-thermal expansion circuit boards via an adhesive layer, the adhesive layer having through-holes filled with solder to connect the circuits layers.
摘要翻译： 一种低热膨胀电路板，包括由有机聚合物制成的绝缘层，其上具有用于裸芯片安装的布线导体，其中所述布线导体是在其至少一侧上具有铜层的铁镍基合金层; 以及通过粘合剂层具有多个低热膨胀电路板的低热膨胀多层电路板，所述粘合剂层具有填充有焊料的通孔，以连接电路层。
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9.发明授权公开(公告)号：US08330054B2
公开(公告)日：2012-12-11
申请号：US12771500
申请日：2010-04-30
申请人： Mitsuru Honjo , Daisuke Yamauchi , Kei Nakamura
发明人： Mitsuru Honjo , Daisuke Yamauchi , Kei Nakamura
IPC分类号： H05K1/16
CPC分类号： G11B5/4846 , G11B5/484 , H05K1/0245 , H05K1/189 , H05K3/0061 , H05K2201/09236 , H05K2201/09318 , H05K2201/10674 , H05K2201/2009
摘要： A plurality of wiring traces are formed on a base insulating layer, and a metal layer is formed on the opposite surface of the base insulating layer. Two adjacent wiring traces constitute a transmission line pair. The width of the wiring trace is set to not more than 250 μm, and the distance between the adjacent wiring traces is set to not less than 8 μm. The thickness of the base insulating layer is selected to cause differential impedance of the transmission line pair to be not less than 10 Ω and not more than 50 Ω.
摘要翻译： 在基底绝缘层上形成多个布线迹线，并且在基底绝缘层的相对表面上形成金属层。 两个相邻的布线迹线构成传输线对。 布线迹线的宽度设定为不大于250μm，并且相邻布线迹线之间的距离设定为不小于8μm。 选择基极绝缘层的厚度使传输线对的差分阻抗不小于10Ω; 不超过50个
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10.发明申请公开(公告)号：US20100277835A1
公开(公告)日：2010-11-04
申请号：US12771500
申请日：2010-04-30
申请人： Mitsuru Honjo , Daisuke Yamauchi , Kei Nakamura
发明人： Mitsuru Honjo , Daisuke Yamauchi , Kei Nakamura
CPC分类号： G11B5/4846 , G11B5/484 , H05K1/0245 , H05K1/189 , H05K3/0061 , H05K2201/09236 , H05K2201/09318 , H05K2201/10674 , H05K2201/2009
摘要： A plurality of wiring traces are formed on a base insulating layer, and a metal layer is formed on the opposite surface of the base insulating layer. Two adjacent wiring traces constitute a transmission line pair. The width of the wiring trace is set to not more than 250 μm, and the distance between the adjacent wiring traces is set to not less than 8 μm. The thickness of the base insulating layer is selected to cause differential impedance of the transmission line pair to be not less than 10Ω and not more than 50Ω.
摘要翻译： 在基底绝缘层上形成多个布线迹线，并且在基底绝缘层的相对表面上形成金属层。 两个相邻的布线迹线构成传输线对。 布线迹线的宽度设定为不大于250μm，并且相邻布线迹线之间的距离设定为不小于8μm。 选择基极绝缘层的厚度使传输线对的差分阻抗不小于10Ω; 不超过50个
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