公开(公告)号：US4146906A

公开(公告)日：1979-03-27

申请号：US762128

申请日：1977-01-24

申请人： Kenji Miyata ,  Mitsuru Ura ,  Takuzo Ogawa

发明人： Kenji Miyata ,  Mitsuru Ura ,  Takuzo Ogawa

IPC分类号： H01L29/73 ,  H01L21/225 ,  H01L21/331 ,  H01L29/04 ,  H01L29/74 ,  H01L29/861

CPC分类号： H01L29/861 ,  H01L21/2257 ,  H01L29/04 ,  H01L29/74 ,  Y10S148/122

摘要： A semiconductor device has one layer of a diode formed by diffusion of an impurity from a polycrystalline layer portion formed on a region in which the layer is to be formed. The polycrystalline layer portion is composed of two layers, the resistivity of the polycrystalline layer closer to the above-mentioned one layer of the diode being higher than that of the other polycrystalline layer.

公开(公告)号：US4164436A

公开(公告)日：1979-08-14

申请号：US925792

申请日：1978-07-18

申请人： Mitsuru Ura ,  Kenji Miyata ,  Takaya Suzuki ,  Takuzo Ogawa

发明人： Mitsuru Ura ,  Kenji Miyata ,  Takaya Suzuki ,  Takuzo Ogawa

IPC分类号： H01L21/22 ,  H01L21/205 ,  H01L21/225 ,  H01L29/04 ,  H01L29/08 ,  H01L29/866

CPC分类号： H01L29/866 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/2257 ,  H01L29/04 ,  H01L29/0834 ,  Y10S148/122 ,  Y10S438/983

摘要： A semiconductor substrate having a single crystal semiconductor layer of one conductivity type exposed to the surface thereof is maintained at a temperature lower than the temperature at which the semiconductors is precipitated from the gas phase. In this state, a gas of a starting material of a semiconductor, a gas containing impurities capable of forming a semiconductor of the other conductivity type and a carrier gas therefore are fed onto the semiconductor substrate. Then, the semiconductor substrate is heated to form an amorphous or polycrystalline semiconductor layer of the other conductivity type on the semiconductor substrate. Simultaneously, the impurities of the other conductivity type are diffused from the amorphous or polycrystal semiconductor layer into the substrate which has a single crystal semiconductor layer of one conductivity type, to form a single crystal semiconductor layer having a p-n junction just below the amorphous or polycrystal semiconductor layer between the amorphous or polycrystalline semiconductor layer and the single crystal semiconductor layer of one conductivity type.In a p-n junction to be formed according to this process, the distribution of the concentration of impurities can be controlled precisely, and the step-like distribution of the concentration of impurities can be attained very well.

摘要翻译： 具有暴露于其表面的一种导电类型的单晶半导体层的半导体衬底保持在比从气相中半导体析出的温度低的温度。 在这种状态下，半导体衬底上的半导体原料气体，含能够形成其它导电类型的半导体的气体和载气的气体被馈送到半导体衬底上。 然后，半导体衬底被加热以在半导体衬底上形成另一导电类型的非晶或多晶半导体层。 同时，其他导电类型的杂质从非晶或多晶半导体层扩散到具有一种导电类型的单晶半导体层的衬底中，以形成具有刚好在无定形或多晶的下面的pn结的单晶半导体层 非晶或多晶半导体层与一种导电类型的单晶半导体层之间的半导体层。

公开(公告)号：US4100310A

公开(公告)日：1978-07-11

申请号：US648943

申请日：1976-01-14

申请人： Mitsuru Ura ,  Takuzo Ogawa ,  Takaya Suzuki ,  Yosuke Inoue ,  Masayoshi Nomura

发明人： Mitsuru Ura ,  Takuzo Ogawa ,  Takaya Suzuki ,  Yosuke Inoue ,  Masayoshi Nomura

IPC分类号： C30B31/18 ,  H01L21/00 ,  H01L21/205 ,  H01L21/22 ,  H01L21/223 ,  H01L21/31 ,  H01L21/316 ,  B05D5/12

CPC分类号： H01L21/31625 ,  C30B31/18 ,  H01L21/00 ,  H01L21/02129 ,  H01L21/02271 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/0262 ,  Y10S118/90 ,  Y10S148/006 ,  Y10S148/043 ,  Y10S148/057

摘要： In a method of doping impurities comprising mixing a carrier gas, a semiconductor compound gas and a doping gas and leading the mixed gas to a reaction chamber to form a semiconductor layer or a semiconductor oxide layer doped with impurities on a substrate inside the chamber, a part of the doping gas before mixing the doping gas with the other gases is taken and led to a gas analyzer and impurity concentration in the doping gas is monitored to control the impurity concentration in the doping gas.

摘要翻译： 在掺杂杂质的方法中，包括混合载气，半导体化合物气体和掺杂气体，并将混合气体导引到反应室，以形成在腔室内的衬底上掺杂有杂质的半导体层或半导体氧化物层， 将掺杂气体与其他气体混合之前的一部分掺杂气体被引导到气体分析器，并且监测掺杂气体中的杂质浓度以控制掺杂气体中的杂质浓度。

公开(公告)号：US4200877A

公开(公告)日：1980-04-29

申请号：US860118

申请日：1977-12-13

申请人： Takaya Suzuki ,  Mitsuru Ura ,  Takuzo Ogawa

发明人： Takaya Suzuki ,  Mitsuru Ura ,  Takuzo Ogawa

IPC分类号： H01L29/864 ,  H01L29/04 ,  H01L29/866 ,  H01L29/90

CPC分类号： H01L29/866 ,  H01L29/04 ,  H01L29/861

摘要： Disclosed is a temperature-compensated voltage reference diode comprising a breakdown PN junction for establishing the zener breakdown voltage, a PN junction for temperature compensation having a temperature coefficient opposite to that of the breakdown PN junction, the breakdown PN junction and the temperature-compensating PN junction being integrally formed in a semiconductor substrate in a laminated fashion with these PN junctions connected in inverse series with each other, and a semiconductor region interposed between the breakdown PN junction and the temperature compensating PN junction for substantially preventing a transistor action from taking place between the respective PN junctions, wherein the semiconductor region is formed of at least one of a polycrystalline semiconductor layer and a single crystal semiconductor layer having an impurity concentration of higher than about 5.times.10.sup.18 atoms/cm.sup.3.

摘要翻译： 公开了一种温度补偿电压参考二极管，其包括用于建立齐纳击穿电压的击穿PN结，用于温度补偿的PN结具有与击穿PN结相反的温度系数，击穿PN结和温度补偿PN 其中所述PN结以彼此反向串联连接的这些PN结一体地形成在半导体衬底中，以及插入在击穿PN结和温度补偿PN结之间的半导体区域，用于基本上防止晶体管的作用在 各个PN结，其中半导体区域由多晶半导体层和杂质浓度高于约5×1018原子/ cm3的单晶半导体层中的至少一个形成。

公开(公告)号：US4223328A

公开(公告)日：1980-09-16

申请号：US911311

申请日：1978-06-01

申请人： Yoshio Terasawa ,  Kenji Miyata ,  Masayoshi Naito ,  Takuzo Ogawa ,  Masahiro Okamura

发明人： Yoshio Terasawa ,  Kenji Miyata ,  Masayoshi Naito ,  Takuzo Ogawa ,  Masahiro Okamura

IPC分类号： H01L29/80 ,  H01L29/08 ,  H01L29/10 ,  H01L29/167 ,  H01L29/74 ,  H01L29/744

CPC分类号： H01L29/744 ,  H01L29/0834 ,  H01L29/1066 ,  H01L29/167

摘要： A field controlled thyristor is disclosed which comprises a first emitter region exposed to one main surface of a semiconductor substrate and having a first conductivity type, a second emitter region exposed to the other main surface of the substrate and having a second conductivity type, a base region connecting the first and the second emitter region, and a gate region provided in the base region. The gate region consists of a slab-like first portion disposed parallel to both the emitter and a second portion connecting the first slab-like portion with one of the main surfaces of the semiconductor substrate. The impurity concentration of the base region is higher in the portion of the base region nearer to the emitter region having the same conductivity type as that of the base region than in the portion of the base region nearer to the emitter region having the opposite conductivity type to that of the base region. The field controlled thyristor has a high forward blocking voltage gain (anode-cathode voltage/gate bias voltage), a large current rating, and a high switching power capability and its switching time is very short.

摘要翻译： 公开了一种场控晶闸管，其包括暴露于半导体衬底的一个主表面并具有第一导电类型的第一发射极区域，暴露于衬底的另一个主表面并具有第二导电类型的第二发射极区域， 连接第一和第二发射极区域的区域，以及设置在基极区域中的栅极区域。 栅极区域由平行于发射极的板状第一部分和将第一板状部分与半导体衬底的主表面中的一个连接的第二部分组成。 基极区域的杂质浓度比基极区域具有与基极区域相同的导电类型的发射极区域的部分比在具有相反导电类型的发射极区域更靠近的部分的基极区域更高 到基地区。 场控晶闸管具有高正向阻断电压增益（阳极 - 阴极电压/栅极偏置电压），大额定电流和高开关功率能力，其开关时间非常短。

公开(公告)号：US4354121A

公开(公告)日：1982-10-12

申请号：US284794

申请日：1981-07-10

申请人： Yoshio Terasawa ,  Kenji Miyata ,  Saburo Oikawa ,  Susumu Murakami ,  Masahiro Okamura ,  Takuzo Ogawa

发明人： Yoshio Terasawa ,  Kenji Miyata ,  Saburo Oikawa ,  Susumu Murakami ,  Masahiro Okamura ,  Takuzo Ogawa

IPC分类号： H01L27/08 ,  H01L29/739 ,  H02M1/08 ,  H03K17/04 ,  H03K17/12 ,  H03K17/72 ,  H03K17/73 ,  H03K17/60

CPC分类号： H01L29/7392 ,  H01L27/0817 ,  H02M1/08 ,  H03K17/0406 ,  H03K17/125 ,  H03K17/72

摘要： A switching control circuit includes a first field controlled thyristor having a gate and a cathode between which a backward bias voltage source and a second field controlled thyristor are connected in series. Conduction of the second field controlled thyristor is controlled by controlling a voltage applied across the gate and the cathode, thereby to control conduction of the first field controlled thyristor. A large load current can be positively and safely turned on and off by a relatively small control current or voltage.

摘要翻译： 开关控制电路包括具有栅极和阴极的第一场控制晶闸​​管，在其间串联连接反向偏置电压源和第二场控制晶闸​​管。 通过控制施加在栅极和阴极两端的电压来控制第二场控晶闸管的导通，从而控制第一场控制晶闸​​管的导通。 通过相对较小的控制电流或电压可以正确安全地打开和关闭大负载电流。

公开(公告)号：US4290830A

公开(公告)日：1981-09-22

申请号：US85234

申请日：1979-10-16

申请人： Yasuhiro Mochizuki ,  Sadao Okano ,  Takuzo Ogawa

发明人： Yasuhiro Mochizuki ,  Sadao Okano ,  Takuzo Ogawa

IPC分类号： C30B31/02 ,  H01L21/225

CPC分类号： C30B31/02 ,  H01L21/2254 ,  Y10S148/012 ,  Y10S148/015 ,  Y10S148/028 ,  Y10S148/033 ,  Y10S438/92

摘要： A method of diffusing selectively aluminium into a single crystal silicon semiconductor substrate for fabricating a semiconductor device comprises the steps of forming a diffusion source layer of aluminium having a predetermined thickness on at least one of the major surfaces of the substrate in a predetermined pattern, forming an oxide film of a predetermined thickness through oxidation over the surface of the diffusion source layer and the exposed surface of the substrate, and heating the substrate inclusive of the exposed surface thereof and the diffusion source layer thereby to diffuse aluminium into the substrate. The thickness of the oxide film is so selected as to suppress vaporization of the aluminium and at the same time to be used as a diffusion mask without giving rise to crystallization into a cristobalite structure. The method allows the pattern of boundary between the diffused regions and non-diffused regions as well as concentration profile of the diffused region to be controlled in a desired manner with a high accuracy.

摘要翻译： 选择性地将铝扩散到用于制造半导体器件的单晶硅半导体衬底中的方法包括以下步骤：以预定图案在衬底的至少一个主表面上形成具有预定厚度的铝的扩散源层，形成 通过在扩散源层的表面和基板的暴露表面上的氧化形成预定厚度的氧化膜，并且加热包括其暴露表面的基板和扩散源层，从而将铝扩散到基板中。 氧化膜的厚度被选择为抑制铝的蒸发，同时用作扩散掩模，而不会导致结晶成方英石结构。 该方法允许扩散区域和非扩散区域之间的边界图案以及扩散区域的浓度分布以期望的方式以高精度被控制。

公开(公告)号：US4079405A

公开(公告)日：1978-03-14

申请号：US589675

申请日：1975-06-24

申请人： Hirobumi Ohuchi ,  Masahiro Okamura ,  Sumio Kawakami ,  Takuzo Ogawa

发明人： Hirobumi Ohuchi ,  Masahiro Okamura ,  Sumio Kawakami ,  Takuzo Ogawa

IPC分类号： H01L31/00 ,  H01L31/06 ,  H01L29/48

CPC分类号： H01L31/00 ,  H01L31/06 ,  Y02E10/50

摘要： A semiconductor photodetector comprising a first semiconductor layer having N-type conductivity; a second semiconductor layer having N-type conductivity, disposed in the vicinity of the first semiconductor layer and having a resistivity higher than that of the first semiconductor layer; a third region having P-type conductivity, disposed in the vicinity of the second semiconductor layer and having a thickness smaller than that of the second semiconductor layer; a first main electrode kept in ohmic contact with the first semiconductor layer; and a second main electrode kept in ohmic contact with a portion of the third region, the surface of the third region serving as a light receiving surface.

摘要翻译： 一种半导体光电检测器，包括具有N型导电性的第一半导体层; 具有N型导电性的第二半导体层，设置在所述第一半导体层附近并具有比所述第一半导体层的电阻率高的电阻率; 具有P型导电性的第三区域，设置在所述第二半导体层附近，并且具有比所述第二半导体层的厚度小的厚度; 与第一半导体层保持欧姆接触的第一主电极; 以及与第三区域的一部分欧姆接触的第二主电极，第三区域的表面用作光接收表面。

公开(公告)号：US3943550A

公开(公告)日：1976-03-09

申请号：US534373

申请日：1974-12-19

申请人： Nobutake Konishi ,  Tsutomu Yatsuo ,  Tatsuya Kamei ,  Masahiro Okamura ,  Takuzo Ogawa

发明人： Nobutake Konishi ,  Tsutomu Yatsuo ,  Tatsuya Kamei ,  Masahiro Okamura ,  Takuzo Ogawa

IPC分类号： H01L31/111 ,  H01L29/74

CPC分类号： H01L31/1113

摘要： A light-activated semiconductor-controlled rectifier device comprising four layers of PNPN is disclosed in which a part of the edges of the PN junction formed between the intermediate P-type layer and the intermediate N-type layer is exposed on the same side on which the outer P-type layer is exposed, so that a photo-trigger signal is radiated on that exposed part of the edges of the PN junction.

摘要翻译： 公开了一种包括四层PNPN的光激活半导体控制整流器件，其中形成在中间P型层和中间N型层之间的PN结的边缘的一部分暴露在同一侧上， 暴露外部P型层，使得在PN结的边缘的暴露部分上照射触发信号。

公开(公告)号：US4193826A

公开(公告)日：1980-03-18

申请号：US931399

申请日：1978-08-07

申请人： Yasuhiro Mochizuki ,  Hiroaki Hachino ,  Yasumichi Yasuda ,  Yutaka Misawa ,  Takuzo Ogawa

发明人： Yasuhiro Mochizuki ,  Hiroaki Hachino ,  Yasumichi Yasuda ,  Yutaka Misawa ,  Takuzo Ogawa

IPC分类号： H01L21/223 ,  H01L21/28

CPC分类号： H01L21/223

摘要： A method of fabricating a semiconductor device through selective diffusion of aluminum vapor into a silicon substrate by heating a sealed tube in which the silicon substrate and an aluminum source are disposed. The diffusion is effected with a low concentration of aluminum smaller than about 10.sup.17 atoms/cm.sup.3, thereby making it possible to use a silicon oxide film as a diffusion mask for the selective diffusion of aluminum at predetermined region of the silicon substrate.

摘要翻译： 一种制造半导体器件的方法，该方法通过加热其中设置有硅衬底和铝源的密封管将铝蒸气选择性地扩散到硅衬底中。 扩散是用小于约1017原子/ cm3的低浓度铝进行的，从而可以使用氧化硅膜作为扩散掩模，用于在硅衬底的预定区域选择性扩散铝。