Method of diffusing aluminum into silicon substrate for manufacturing
semiconductor device
    3.
    发明授权
    Method of diffusing aluminum into silicon substrate for manufacturing semiconductor device 失效
    将铝扩散到硅衬底中用于制造半导体器件的方法

    公开(公告)号:US4154632A

    公开(公告)日:1979-05-15

    申请号:US931390

    申请日:1978-08-07

    IPC分类号: H01L21/225

    CPC分类号: H01L21/2254 Y10S148/033

    摘要: An aluminum diffusion source layer is formed by vacuum evaporation on a major surface of a silicon substrate. The silicon substrate is heated to form an aluminum-silicon alloy layer, an aluminum doped silicon recrystallization layer and an aluminum diffusion layer. Thereafter, the aluminum-silicon alloy layer is removed from the major surface of the silicon substrate. Drive-in diffusion is performed so as to diffuse, aluminum included in the silicon recrystallization layer and the aluminum diffusion layer, into the silicon substrate. As a result, the aluminum diffusion concentration of 10.sup.16 -10.sup.19 atoms/cm.sup.3 can be obtained.

    摘要翻译: 通过在硅衬底的主表面上真空蒸发形成铝扩散源层。 加热硅衬底以形成铝 - 硅合金层,铝掺杂硅再结晶层和铝扩散层。 此后,从硅衬底的主表面去除铝 - 硅合金层。 进行驱入扩散,以将包含在硅再结晶层中的铝和铝扩散层扩散到硅衬底中。 结果,可以获得1016-1019原子/ cm3的铝扩散浓度。

    Semiconductor device and fabrication method thereof
    5.
    发明授权
    Semiconductor device and fabrication method thereof 失效
    半导体器件及其制造方法

    公开(公告)号:US4651191A

    公开(公告)日:1987-03-17

    申请号:US880942

    申请日:1986-06-25

    摘要: Disclosed is a semiconductor device constructed such that among elements forming a brazing material for bonding an electrode on a semiconductor substrate to an external electrode, the amounts of those elements which react with the material of the electrode or external electrode and form a compound harder and more brittle than the electrode material are smaller on the portion coming into contact with the electrode or external electrode than at the other portions. A fabrication method of such a semiconductor device is also disclosed, which method involving the steps of laminating and depositing an at least two-layered metallic layer on the surface of the electrode on the semiconductor substrate or on the surface of the external electrode, bringing the electrodes of the at least two-layered metallic layer into intimate contact with each other while opposing one another, and bonding them together in the presence of the force of pressure applied to both electrodes while they are being heated to a temperature close to an eutectic temperature of an alloy consisting of the metals of the uppermost layer and subsequent layer, immediately therebelow, of the metallic layer.

    摘要翻译: 公开了一种半导体器件,其被构造成使得在形成用于将半导体衬底上的电极接合到外部电极的钎焊材料的元素中,与电极或外部电极的材料反应并形成复合物的那些元素的量更多 比与其他部分相比,与电极或外部电极接触的部分比电极材料脆。 还公开了一种这样的半导体器件的制造方法,该方法包括以下步骤:在半导体衬底或外部电极的表面上的电极表面上层叠和沉积至少两层的金属层, 所述至少两层金属层的电极彼此相对地彼此紧密接触,并且在施加到两个电极的压力的存在下将它们结合在一起,同时将它们加热到接近共晶温度的温度 由最上层的金属和紧邻的金属层的后续层组成的合金。

    pn Junction device with glass moats and a channel stopper region of
greater depth than the base pn junction depth
    8.
    发明授权
    pn Junction device with glass moats and a channel stopper region of greater depth than the base pn junction depth 失效
    pn具有玻璃护城河的结点装置和比基底pn结深度更深的通道阻挡区域

    公开(公告)号:US4484214A

    公开(公告)日:1984-11-20

    申请号:US332713

    申请日:1981-12-21

    摘要: A semiconductor device is provided having a semiconductor substrate which has an annular moat formed in one major surface thereof and includes a pn junction terminating at an inner inclined side surface of the moat. In order to provide a high blocking voltage of the pn junction, the moat is filled or coated with glass material having a surface charge capable of inducing, in a semiconductor layer of one conductivity type in contact with the bottom of the moat, carriers having a polarity opposite to the above-mentioned conductivity type. An annular, highly-doped channel stopper region of the above-mentioned conductivity type is provided at the outside of the moat in a manner to be kept in contact with the moat, and the depth of the channel stopper region from the major surface is preferably made greater than the depth of the pn junction from the major surface.

    摘要翻译: 提供一种半导体器件,其具有半导体衬底,该半导体衬底在其一个主表面上形成有环形沟槽,并且包括终止于护城河的内倾斜侧表面处的pn结。 为了提供pn结的高阻挡电压,护城河被填充或涂覆有玻璃材料,该玻璃材料具有表面电荷能够在与护城河底部接触的一种导电类型的半导体层中引入,载体具有 极性与上述导电类型相反。 上述导电类型的环状高掺杂通道阻挡区域以与护城河保持接触的方式设置在护城河的外侧,并且沟槽阻挡区域与主表面的深度优选为 大于从主表面的pn结的深度。

    Semiconductor pressure sensor having plural pressure sensitive
diaphragms and method
    10.
    发明授权
    Semiconductor pressure sensor having plural pressure sensitive diaphragms and method 失效
    具有多个压敏膜的半导体压力传感器及方法

    公开(公告)号:US4322980A

    公开(公告)日:1982-04-06

    申请号:US170663

    申请日:1979-11-08

    摘要: A semiconductor pressure sensor having plural pressure sensitive diaphragms and capable of producing electric signals of at least two pressures.A semiconductor pressure sensor has a semiconductor single crystal chip (1) on which two diaphragms (12a, 12b) are shaped, pairs of strain gauges (13a and 14a, and 13b and 14b), each of which pairs are constructed on each pressure sensitive diaphragm, electrodes (15a and 16a, and 15b and 16b) which are provided for electrical connections of these strain gauges on the semiconductor single crystal, and an insulating substrate of borosilicate glass, the thermal expansion coefficient is substantially equal tol that of said semiconductor single-crystal chip, wherein the semiconductor single-crystal chip (1) and the glass substrate (2) are bonded to each other by an Anodic Bonding method, thereby being able to obtain a semiconductor pressure sensor which scarcely producing errors outputs.

    摘要翻译: 一种半导体压力传感器,具有多个压敏光阑,并能产生至少两个压力的电信号。 半导体压力传感器具有半导体单晶芯片(1),其上形成有两个隔膜(12a,12b),成对的应变计(13a和14a和13b和14b),每个压敏传感器在每个压敏敏感元件 隔膜,用于半导体单晶上的这些应变计的电连接的电极(15a和16a,15b和16b)和硼硅酸盐玻璃的绝缘基板,热膨胀系数基本上等于所述半导体单晶 晶体芯片,其中半导体单晶芯片(1)和玻璃基板(2)通过阳极接合方法彼此接合,从而能够获得几乎不产生误差输出的半导体压力传感器。