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1.发明授权Method for depositing silicon films and related materials by a glow discharge in a disiland or higher order silane gas 失效通过辉光放电在不均匀或高级硅烷气体中沉积硅膜和相关材料的方法
公开(公告)号：US4363828A
公开(公告)日：1982-12-14
申请号：US102814
申请日：1979-12-12
申请人： Marc H. Brodsky , Bruce A. Scott
发明人： Marc H. Brodsky , Bruce A. Scott
IPC分类号： H01L31/04 , C23C16/06 , C23C16/24 , C23C16/32 , C23C16/34 , C23C16/40 , H01L21/205 , H01L21/314 , H01L21/316 , H01L21/318 , C23C11/00
CPC分类号： H01L21/02164 , C23C16/06 , C23C16/24 , C23C16/32 , C23C16/34 , C23C16/402 , H01L21/02112 , H01L21/02167 , H01L21/02211 , H01L21/02274 , H01L21/0242 , H01L21/02532 , H01L21/02579 , H01L21/0262 , H01L21/314 , H01L21/31612 , H01L21/3185
摘要： Disilane (Si.sub.2 H.sub.6), trisilane (Si.sub.3 H.sub.8) or a higher order silane is applied in a glow discharge process to rapidly and efficiently form a film of hydrogenated amorphous silicon on a substrate. An inductively coupled RF glow discharge apparatus, a capacitively coupled glow discharge apparatus or a DC glow discharge apparatus may be employed to deposit the amorphous silicon on a conducting or non-conducting substrate. The disilane or higher order silanes may also be combined in a glow discharge process with gases which contain elements such as nitrogen or oxygen to rapidly deposit corresponding compound films.
摘要翻译： 在辉光放电过程中施加二硅烷（Si 2 H 6），丙硅烷（Si 3 H 8）或高级硅烷，以快速且有效地在衬底上形成氢化非晶硅的膜。 可以使用电感耦合RF辉光放电装置，电容耦合的辉光放电装置或DC辉光放电装置，以将非晶硅沉积在导电或非导电衬底上。 乙硅烷或高级硅烷也可以在辉光放电过程中与含有诸如氮或氧的元素的气体组合以快速沉积相应的化合物膜。
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公开(公告)号：US5151383A
公开(公告)日：1992-09-29
申请号：US307154
申请日：1989-02-06
CPC分类号： H01L33/18 , C23C16/24 , C23C16/46 , C23C16/463 , H01L33/0012 , H01L33/0033 , H01L33/0058
摘要： A method is described for fabricating electroluminescent devices exhibiting visible electroluminescence at room temperature, where the devices include at least one doped layer of amorphous hydrogenated silicon (a-Si:H). The a-Si:H layer is deposited on a substrate by homogeneous chemical vapor deposition (H-CVD) in which the substrate is held at a temperature lower than about 200.degree. C. and the a-Si:H layer is doped in-situ during deposition, the amount of hydrogen incorporated in the deposited layer being 12-50 atomic percent. The bandgap of the a-Si:H layer is between 1.6 and 2.6 eV, and in preferrable embodiments is between 2.0 and 2.6 eV. The conductivity of the a-Si:H layer is chosen in accordance with device requirements, and can be 10.sup.16 -10.sup.19 carriers/cm.sup.2. The bandgap of the a-Si:H layer depends at least in part on the temperature of the substrate on which the layer is deposited, and can be "tuned" by changing the substrate temperature.
摘要翻译： 描述了一种用于制造在室温下显示可见电致发光的电致发光器件的方法，其中器件包括至少一个非晶氢化硅掺杂层（a-Si：H）。 通过均匀化学气相沉积（H-CVD）将a-Si：H层沉积在衬底上，其中衬底保持在低于约200℃的温度，并且a-Si：H层被掺杂在 在沉积期间原位，沉积层中掺入的氢的量为12-50原子％。 a-Si：H层的带隙在1.6和2.6eV之间，优选的实施方案是在2.0和2.6eV之间。 a-Si：H层的电导率根据器件要求选择，可以为1016-1019载体/ cm2。 a-Si：H层的带隙至少部分取决于沉积该层的衬底的温度，并且可以通过改变衬底温度“调谐”。
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公开(公告)号：US06479847B2
公开(公告)日：2002-11-12
申请号：US09306509
申请日：1999-05-07
IPC分类号： H01L2975
CPC分类号： H01L49/003 , H01L21/8238
摘要： A method of manufacturing an integrated circuit device includes forming a laminated structure having a first side and a second side, the first side includes a first type Mott channel layer and the second side includes a second type Mott channel layer. A first source region and a first drain region is formed on the first side, a second source region and a second drain region is formed on the second side, a first gate region is formed on the second side, opposite the first source region and the first drain region and a second gate region is formed on the first side, opposite the second source region and the second drain region. The first source, the first drain and the first gate comprise a first type field effect transistor and the second source, the second drain and the second gate comprise a second type field effect transistor.
摘要翻译： 一种集成电路器件的制造方法包括：形成具有第一侧面和第二侧面的层叠结构体，第一面包括第一类型的Mott沟道层，第二面包括第二类型的Mott沟道层。 第一源区和第一漏区形成在第一侧上，第二源区和第二漏区形成在第二侧上，第一栅极区形成在与第一源区相对的第二侧上， 第一漏区和第二栅区形成在与第二源区和第二漏区相对的第一侧上。 第一源极，第一漏极和第一栅极包括第一类型场效应晶体管，第二源极，第二漏极和第二栅极包括第二类型场效应晶体管。
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公开(公告)号：US4592933A
公开(公告)日：1986-06-03
申请号：US626504
申请日：1984-06-29
IPC分类号： H01L21/205 , C23C16/44 , C23C16/455 , C30B25/14 , C23C16/00 , C23C16/30
CPC分类号： C23C16/4557 , C23C16/45514 , C23C16/4558 , C30B25/14
摘要： A technique and apparatus for homogeneous chemical vapor deposition (HCVD), wherein a heated carrier gas is mixed with a source gas in a location close to a substrate on which deposition is to occur. The heated carrier gas transfers heat to the source gas in order to decompose it, producing the intermediate species necessary for deposition onto the substrate. Thus, the source gas is not subjected to heating above its pyrolysis temperature prior to being transported to the immediate vicinity of the substrate. This HCVD apparatus includes a heat source for heating the carrier gas, a tube for bringing the heated carrier gas to a location close to the substrate, and another tube for bringing the reactive source gas to the aforementioned location where it is mixed with the hot carrier gas to cause decomposition of the source gas close to the substrate. The substrate temperature is decoupled from the hot gas temperature and is significantly colder than the hot gas temperature. Simultaneous deposition onto a plurality of substrates is possible, and the system can be scaled-up to provide deposition over a large area.
摘要翻译： 一种用于均匀化学气相沉积（HCVD）的技术和装置，其中将加热的载气与源气体混合在靠近其上沉积的基底的位置。 加热的载气将热量转移到源气体以便分解，产生沉积到基底上所需的中间物质。 因此，在将其输送到基板的紧邻附近之前，源气体不经受高于其热解温度的加热。 该HCVD装置包括用于加热载气的热源，用于将加热的载气引导到靠近基板的位置的管，以及用于将反应源气体引导到与热载体混合的上述位置的另一管 气体导致源气体靠近基板的分解。 衬底温度与热气体温度分离，并且比热气体温度明显更冷。 同时沉积到多个基板上是可能的，并且该系统可以放大以在大面积上提供沉积。
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5.发明授权Process for fabricating a field-effect transistor with a buried Mott material oxide channel 失效用埋置的Mott材料氧化物沟道制造场效晶体管的工艺公开(公告)号：US06555393B2
公开(公告)日：2003-04-29
申请号：US09938392
申请日：2001-08-24
IPC分类号： H01L2100
CPC分类号： H01L49/003
摘要： A structure and method of forming an integrated circuit (e.g., field effect transistor) having a buried Mott-insulated oxide channel includes depositing source and drain electrodes over a substrate forming a Mott transition channel layer over the substrate and electrodes, forming an insulator layer over the Mott transition channel layer, forming source and drain contacts through the insulator layer (such that the source and drain contacts are electrically connected to the Mott transition channel layer) and forming a gate electrode over the insulator layer between the source and drain contacts.
摘要翻译： 形成具有掩埋的Mott绝缘氧化物沟道的集成电路（例如，场效应晶体管）的结构和方法包括在衬底上形成基底和电极上形成Mott过渡沟道层的衬底上沉积源极和漏极，形成绝缘体层 Mott过渡沟道层，通过绝缘体层形成源极和漏极触点（使得源极和漏极触点电连接到Mott过渡沟道层），并在源极和漏极触点之间的绝缘体层上形成栅电极。
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公开(公告)号：US06333543B1
公开(公告)日：2001-12-25
申请号：US09268633
申请日：1999-03-16
IPC分类号： H01L1912
CPC分类号： H01L49/003
摘要： A structure and method of forming an integrated circuit (e.g., field effect transistor) having a buried Mott-insulated oxide channel includes depositing source and drain electrodes over a substrate forming a Mott transition channel layer over the substrate and electrodes, forming an insulator layer over the Mott transition channel layer, forming source and drain contacts through the insulator layer (such that the source and drain contacts are electrically connected to the Mott transition channel layer) and forming a gate electrode over the insulator layer between the source and drain contacts.
摘要翻译： 形成具有掩埋的Mott绝缘氧化物沟道的集成电路（例如，场效应晶体管）的结构和方法包括在衬底上形成基底和电极上形成Mott过渡沟道层的衬底上沉积源极和漏极，形成绝缘体层 Mott过渡沟道层，通过绝缘体层形成源极和漏极触点（使得源极和漏极触点电连接到Mott过渡沟道层），并在源极和漏极触点之间的绝缘体层上形成栅电极。
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公开(公告)号：US4684542A
公开(公告)日：1987-08-04
申请号：US895119
申请日：1986-08-11
CPC分类号： C23C16/42 , H01L21/28061
摘要： A process for preparing tungsten silicide films using low pressure, low temperature chemical vapor deposition to deposit silicon-rich tungsten silicide films. As a source of silicon, higher order silanes, such as disilane and trisilane, are used. The gaseous tungsten source is WF.sub.6. The substrate temperature range is less than about 370.degree. C., while the total pressure range is in the range 0.05-1 Torr. WF.sub.6 flow rates are generally less than 25 sccm, while the higher order silane flow rates are generally less than about 400 sccm.
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公开(公告)号：US4360583A
公开(公告)日：1982-11-23
申请号：US216341
申请日：1980-12-15
CPC分类号： G11B7/244 , G03F7/004 , G11B7/253 , Y10S430/126 , Y10S430/146
摘要： The invention relates to high resolution video storage disks comprising a substrate having disposed thereon a film of a monofunctionalized substituted tetraheterofulvalene compound and a halocarbon. The tetraheterofulvalene compound can have the molecular formula ##STR1## where X can be S and/or Se R can be an alkyl group having from about 1 to about 8 carbon atoms or a benzyl group wherein said benzyl group can be a part of a polymer chain;and Y can be either an ester or an ether.
摘要翻译： 本发明涉及高分辨率视频存储盘，其包括其上设置有单官能取代的四异氟代戊烯化合物和卤代烃的膜的基底。 四元富瓦烯化合物可以具有其中X可以是S的分子式“IMA”，和/或SeR可以是具有约1至约8个碳原子的烷基或苄基，其中所述苄基可以是聚合物的一部分 链; Y可以是酯或醚。
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