公开(公告)号：US07915737B2

公开(公告)日：2011-03-29

申请号：US11957030

申请日：2007-12-14

申请人： Mayumi Nakasato ,  Yoshio Okayama ,  Ryosuke Usui

发明人： Mayumi Nakasato ,  Yoshio Okayama ,  Ryosuke Usui

IPC分类号： H01L23/48

CPC分类号： H01L23/3114 ,  H01L23/525 ,  H01L24/11 ,  H01L24/12 ,  H01L2224/0231 ,  H01L2224/02313 ,  H01L2224/02319 ,  H01L2224/02333 ,  H01L2224/0401 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/13147 ,  H01L2224/16 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/351 ,  H01L2924/00

摘要： A manufacturing technology is provided capable of improving the reliability of a semiconductor module having a via contact connected to an electrode part of a semiconductor component. The semiconductor module includes: a semiconductor component provided with an electrode part on a mounting surface; an insulating layer provided on the mounting surface of the semiconductor component; a wiring layer formed on the insulating layer; a first conductor part which is embedded in the insulating layer and which is in contact with the electrode part; and a second conductor part which is formed in an aperture provided in the insulating layer above the first conductor part and which electrically connects the first conductor part and the wiring layer.

摘要翻译： 提供一种制造技术，其能够提高具有连接到半导体部件的电极部分的通孔接触的半导体模块的可靠性。 半导体模块包括：在安装表面上设置有电极部分的半导体部件; 设置在所述半导体部件的安装面上的绝缘层; 形成在所述绝缘层上的布线层; 第一导体部，其嵌入绝缘层中并与电极部接触; 以及第二导体部，其形成在设置在所述第一导体部分上方的所述绝缘层中的孔中，并且将所述第一导体部和所述布线层电连接。

公开(公告)号：US20080157338A1

公开(公告)日：2008-07-03

申请号：US11957030

申请日：2007-12-14

申请人： Mayumi Nakasato ,  Kiyoshi Shibata ,  Yoshio Okayama ,  Ryosuke Usui ,  Hideki Mizuhara

发明人： Mayumi Nakasato ,  Kiyoshi Shibata ,  Yoshio Okayama ,  Ryosuke Usui ,  Hideki Mizuhara

IPC分类号： H01L21/50 ,  H01L23/52

CPC分类号： H01L23/3114 ,  H01L23/525 ,  H01L24/11 ,  H01L24/12 ,  H01L2224/0231 ,  H01L2224/02313 ,  H01L2224/02319 ,  H01L2224/02333 ,  H01L2224/0401 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/13147 ,  H01L2224/16 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/351 ,  H01L2924/00

摘要： A manufacturing technology is provided capable of improving the reliability of a semiconductor module having a via contact connected to an electrode part of a semiconductor device. A conductive bump is formed on an insulating layer such that the end of the conductive bump is in contact with an electrode of a semiconductor substrate. By pressure-molding the assembly using a press machine, the semiconductor substrate, the conductive bump, and the insulating layer are integrated. With this, the conductive bump is allowed to embed itself in the insulating layer while maintaining contact with the electrode. The insulating layer is subject to laser irradiation from above so as to form an aperture exposing the conductive bump. Subsequently, the upper surface of the insulating layer and the interior surface of the aperture are plated with copper by electroless plating and electroplating so as to form a copper plating layer, and a via contact is formed in the aperture so as to coat the inner wall of the aperture.

摘要翻译： 提供了能够提高具有连接到半导体器件的电极部分的通孔接触的半导体模块的可靠性的制造技术。 导电凸块形成在绝缘层上，使得导电凸块的端部与半导体衬底的电极接触。 通过使用压制机对组件进行加压成型，将半导体衬底，导电凸块和绝缘层集成。 由此，允许导电凸块自身嵌入绝缘层中，同时保持与电极的接触。 绝缘层从上方经受激光照射，以形成露出导电凸块的孔。 随后，绝缘层的上表面和孔的内表面通过无电解电镀和电镀电镀铜，以形成镀铜层，并且在孔中形成通孔接触以涂覆内壁 的孔径。

公开(公告)号：US08438724B2

公开(公告)日：2013-05-14

申请号：US12900175

申请日：2010-10-07

申请人： Kouichi Saitou ,  Yoshio Okayama ,  Yoh Takano ,  Mayumi Nakasato

发明人： Kouichi Saitou ,  Yoshio Okayama ,  Yoh Takano ,  Mayumi Nakasato

IPC分类号： H05K3/30 ,  H01L21/82

CPC分类号： H05K3/4647 ,  H01L21/486 ,  H01L23/3114 ,  H01L23/48 ,  H01L23/49827 ,  H01L23/525 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0231 ,  H01L2224/02319 ,  H01L2224/0401 ,  H01L2224/13099 ,  H01L2224/81208 ,  H01L2224/81801 ,  H01L2224/81894 ,  H01L2224/83101 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/351 ,  H05K3/4652 ,  H05K2203/0369 ,  Y10T29/4913 ,  Y10T29/49156 ,  H01L2924/00

摘要： Methods for producing a substrate for mounting a device and for producing a semiconductor module are provided. The methods comprise preparing a metal plate on one major surface of which a plurality of projected electrodes are provided. An insulating resin layer is formed on the major surface so as to cover the top surface of the projected electrodes. The top surface of at least one of the plurality of projected electrodes is exposed by removing the insulating resin layer so that a major surface of the insulating resin layer opposite to the metal plate is level. A plurality of counter electrodes is arranged having a counterface to face the top face of the plurality of projected electrodes or a semiconductor device having a plurality of device electrodes is arranged to face the top face of the plurality of projected electrodes. The at least one of the plurality of projected electrodes, the top surface of which is exposed, is electrically connected with at least one of the plurality of counter electrodes facing the projected electrodes, by pressure-bonding the metal plate with the counter electrode. A wiring layer is formed by selectively removing the metal plate.

摘要翻译： 提供了用于制造用于安装装置的基板和用于制造半导体模块的方法。 所述方法包括在一个主表面上准备金属板，其上设置有多个突起电极。 在主表面上形成绝缘树脂层以覆盖突起电极的顶表面。 通过去除绝缘树脂层使多个突起电极中的至少一个的顶表面暴露，使得与金属板相对的绝缘树脂层的主表面水平。 多个相对电极被布置成具有面对多个突出电极的顶面的相对面，或者具有多个器件电极的半导体器件被布置成面对多个突出电极的顶面。 通过将金属板与对电极压接，多个突出电极中的至少一个突出电极的顶表面被暴露，与多个对置电极中的至少一个面向突出的电极电连接。 通过选择性地去除金属板形成布线层。

公开(公告)号：US20110027945A1

公开(公告)日：2011-02-03

申请号：US12900175

申请日：2010-10-07

申请人： Kouichi Saitou ,  Yoshio Okayama ,  Yoh Takano ,  Mayumi Nakasato

发明人： Kouichi Saitou ,  Yoshio Okayama ,  Yoh Takano ,  Mayumi Nakasato

IPC分类号： H01L21/50 ,  H05K3/02

CPC分类号： H05K3/4647 ,  H01L21/486 ,  H01L23/3114 ,  H01L23/48 ,  H01L23/49827 ,  H01L23/525 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0231 ,  H01L2224/02319 ,  H01L2224/0401 ,  H01L2224/13099 ,  H01L2224/81208 ,  H01L2224/81801 ,  H01L2224/81894 ,  H01L2224/83101 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/351 ,  H05K3/4652 ,  H05K2203/0369 ,  Y10T29/4913 ,  Y10T29/49156 ,  H01L2924/00

摘要： A substrate for mounting a device comprises: an insulating resin layer; a plurality of projected electrodes that are connected electrically to a wiring layer provided on one major surface of the insulating resin layer, and that project toward the insulating resin layer from the wiring layer; and a counter electrode provided at a position corresponding to each of the plurality of projected electrodes on the other major surface of the insulating resin layer. Among the projected electrodes, a projected length of part of the projected electrodes is smaller than that of the other projected electrodes; and the projected electrode and the counter electrode corresponding thereto are capacitively-coupled, and the projected electrode and the counter electrode are connected electrically.

摘要翻译： 用于安装装置的基板包括：绝缘树脂层; 多个突起电极，其电连接到设置在所述绝缘树脂层的一个主表面上的布线层，并且从所述布线层向所述绝缘树脂层突出; 以及设置在与绝缘树脂层的另一个主表面上的多个突出电极中的每一个对应的位置处的对置电极。 在投影电极中，部分投影电极的投影长度小于其他投射电极的投影长度; 并且对应于其的投影电极和对电极电容耦合，并且投影电极和对电极电连接。

公开(公告)号：US08338946B2

公开(公告)日：2012-12-25

申请号：US12961171

申请日：2010-12-06

申请人： Yasuyuki Yanase ,  Yoshio Okayama ,  Kiyoshi Shibata ,  Yasunori Inoue ,  Hideki Mizuhara ,  Ryosuke Usui ,  Tetsuya Yamamoto ,  Masurao Yoshii

发明人： Yasuyuki Yanase ,  Yoshio Okayama ,  Kiyoshi Shibata ,  Yasunori Inoue ,  Hideki Mizuhara ,  Ryosuke Usui ,  Tetsuya Yamamoto ,  Masurao Yoshii

IPC分类号： H01L23/48 ,  H01L29/40

CPC分类号： H01L24/11 ,  H01L23/3114 ,  H01L23/525 ,  H01L24/94 ,  H01L2221/6834 ,  H01L2221/68359 ,  H01L2224/0231 ,  H01L2224/02319 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05647 ,  H01L2224/1132 ,  H01L2224/114 ,  H01L2224/116 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/274 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01059 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/351 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/00014

摘要： An electrode for a semiconductor device is formed on the mounting surface (particularly, the outer periphery thereof) of a semiconductor substrate in a semiconductor module. In order to secure a large gap between the electrodes, an insulating layer is formed on the electrode. Also formed are a plurality of bumps penetrating the insulating layer and connected to the electrode, and a rewiring pattern integrally formed with the bumps. The rewiring pattern includes a bump area and a wiring area extending contiguously with the bump area. The insulating layer is formed to have a concave upper surface in an interval between the bumps, and the wiring area of the rewiring pattern is formed to fit that upper surface. The wiring area of the rewiring pattern is formed to be depressed toward the semiconductor substrate in relation to the bump area of the rewiring pattern.

摘要翻译： 在半导体模块中的半导体衬底的安装表面（特别是其外周）上形成用于半导体器件的电极。 为了确保电极之间的大间隙，在电极上形成绝缘层。 还形成有穿过绝缘层并连接到电极的多个凸块，以及与凸块一体形成的重新布线图案。 重新布线图案包括凸起区域和与凸起区域相邻延伸的布线区域。 绝缘层形成为具有在凸起之间的间隔中的凹的上表面，并且重新布线图案的布线区域形成为适合该上表面。 重布线图案的布线区域相对于重新布线图案的凸起区域形成为朝向半导体基板压下。

公开(公告)号：US20080217769A1

公开(公告)日：2008-09-11

申请号：US12022865

申请日：2008-01-30

申请人： Yasuyuki Yanase ,  Yoshio Okayama ,  Kiyoshi Shibata ,  Yasunori Inoue ,  Hideki Mizuhara ,  Ryosuke Usui ,  Tetsuya Yamamoto ,  Masurao Yoshii

发明人： Yasuyuki Yanase ,  Yoshio Okayama ,  Kiyoshi Shibata ,  Yasunori Inoue ,  Hideki Mizuhara ,  Ryosuke Usui ,  Tetsuya Yamamoto ,  Masurao Yoshii

IPC分类号： H01L23/48 ,  H01L21/44

CPC分类号： H01L24/11 ,  H01L23/3114 ,  H01L23/525 ,  H01L24/94 ,  H01L2221/6834 ,  H01L2221/68359 ,  H01L2224/0231 ,  H01L2224/02319 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05647 ,  H01L2224/1132 ,  H01L2224/114 ,  H01L2224/116 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/274 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01059 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/351 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/00014

摘要： An electrode for a semiconductor device is formed on the mounting surface (particularly, the outer periphery thereof) of a semiconductor substrate in a semiconductor module. In order to secure a large gap between the electrodes, an insulating layer is formed on the electrode. Also formed are a plurality of bumps penetrating the insulating layer and connected to the electrode, and a rewiring pattern integrally formed with the bumps. The rewiring pattern includes a bump area and a wiring area extending contiguously with the bump area.The insulating layer is formed to have a concave upper surface in an interval between the bumps, and the wiring area of the rewiring pattern is formed to fit that upper surface. The wiring area of the rewiring pattern is formed to be depressed toward the semiconductor substrate in relation to the bump area of the rewiring pattern.

摘要翻译： 在半导体模块中的半导体衬底的安装表面（特别是其外周）上形成用于半导体器件的电极。 为了确保电极之间的大间隙，在电极上形成绝缘层。 还形成有穿过绝缘层并连接到电极的多个凸块，以及与凸块一体形成的重新布线图案。 重新布线图案包括凸起区域和与凸起区域相邻延伸的布线区域。 绝缘层形成为具有在凸起之间的间隔中的凹的上表面，并且重新布线图案的布线区域形成为适合该上表面。 重布线图案的布线区域相对于重新布线图案的凸起区域形成为朝向半导体基板压下。

公开(公告)号：US08362611B2

公开(公告)日：2013-01-29

申请号：US12679595

申请日：2008-09-25

申请人： Yasuyuki Yanase ,  Yoshio Okayama ,  Ryosuke Usui

发明人： Yasuyuki Yanase ,  Yoshio Okayama ,  Ryosuke Usui

IPC分类号： H01L23/488

CPC分类号： H01L24/11 ,  H01L2224/0231 ,  H01L2224/02313 ,  H01L2224/02319 ,  H01L2224/02333 ,  H01L2224/0236 ,  H01L2224/024 ,  H01L2224/0401 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2224/29099 ,  H01L2924/00

摘要： A semiconductor module is of a structure such that a wiring layer, an insulating resin layer and a semiconductor device are stacked in this order by bonding them together with compression. In the wiring layer, bump electrodes each having a base and a tip portion are provided in positions corresponding respectively to device electrodes of the semiconductor device. The bump electrodes penetrate the insulating resin layer and are electrically coupled to the corresponding device electrodes.

摘要翻译： 半导体模块具有这样的结构，使得布线层，绝缘树脂层和半导体器件通过将它们压缩在一起而依次堆叠。 在布线层中，各自具有基底和尖端部分的凸起电极设置在分别对应于半导体器件的器件电极的位置。 凸块电极穿透绝缘树脂层并电耦合到相应的器件电极。

公开(公告)号：US07855452B2

公开(公告)日：2010-12-21

申请号：US12022865

申请日：2008-01-30

申请人： Yasuyuki Yanase ,  Yoshio Okayama ,  Kiyoshi Shibata ,  Yasunori Inoue ,  Hideki Mizuhara ,  Ryosuke Usui ,  Tetsuya Yamamoto ,  Masurao Yoshii

发明人： Yasuyuki Yanase ,  Yoshio Okayama ,  Kiyoshi Shibata ,  Yasunori Inoue ,  Hideki Mizuhara ,  Ryosuke Usui ,  Tetsuya Yamamoto ,  Masurao Yoshii

IPC分类号： H01L23/48 ,  H01L29/40

CPC分类号： H01L24/11 ,  H01L23/3114 ,  H01L23/525 ,  H01L24/94 ,  H01L2221/6834 ,  H01L2221/68359 ,  H01L2224/0231 ,  H01L2224/02319 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05647 ,  H01L2224/1132 ,  H01L2224/114 ,  H01L2224/116 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/274 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01059 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/351 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/00014

摘要： An electrode for a semiconductor device is formed on the mounting surface (particularly, the outer periphery thereof) of a semiconductor substrate in a semiconductor module. In order to secure a large gap between the electrodes, an insulating layer is formed on the electrode. Also formed are a plurality of bumps penetrating the insulating layer and connected to the electrode, and a rewiring pattern integrally formed with the bumps. The rewiring pattern includes a bump area and a wiring area extending contiguously with the bump area.The insulating layer is formed to have a concave upper surface in an interval between the bumps, and the wiring area of the rewiring pattern is formed to fit that upper surface. The wiring area of the rewiring pattern is formed to be depressed toward the semiconductor substrate in relation to the bump area of the rewiring pattern.

摘要翻译： 在半导体模块中的半导体衬底的安装表面（特别是其外周）上形成用于半导体器件的电极。 为了确保电极之间的大间隙，在电极上形成绝缘层。 还形成有穿过绝缘层并连接到电极的多个凸块，以及与凸块一体形成的重新布线图案。 重新布线图案包括凸起区域和与凸起区域相邻延伸的布线区域。 绝缘层形成为具有在凸起之间的间隔中的凹的上表面，并且重新布线图案的布线区域形成为适合该上表面。 重布线图案的布线区域相对于重新布线图案的凸起区域形成为朝向半导体基板压下。

公开(公告)号：US20080128903A1

公开(公告)日：2008-06-05

申请号：US11928368

申请日：2007-10-30

申请人： Yoshio Okayama ,  Ryosuke Usui ,  Yasunori Inoue

发明人： Yoshio Okayama ,  Ryosuke Usui ,  Yasunori Inoue

IPC分类号： H01L23/488 ,  H01L21/60

CPC分类号： H01L24/11 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/94 ,  H01L2224/0231 ,  H01L2224/02319 ,  H01L2224/02333 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05647 ,  H01L2224/114 ,  H01L2224/116 ,  H01L2224/13099 ,  H01L2224/274 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00014

摘要： Connection reliability in electrode portions of a semiconductor module is improved. A semiconductor wafer is prepared where a plurality of semiconductor substrates each having an electrode and a protective film at the surface is formed in a matrix shape. Next, at the surface of the semiconductor wafer (semiconductor substrate) a insulation layer is held between the semiconductor substrate and a copper sheet (metal sheet) formed integrally with a bump containing a plastic region on a tip part. With the insulating held between them, the semiconductor substrate, the insulating layer and the copper sheet are press-formed by a press machine into a single block. The bump penetrates the insulating layer, and the plastic region on the tip part is plastic deformed at a contact surface with an electrode, so that the bump and the electrode are electrically connected together.

摘要翻译： 提高了半导体模块的电极部分的连接可靠性。 制备半导体晶片，其中在表面上形成具有电极和保护膜的多个半导体衬底形成为矩阵形状。 接下来，在半导体晶片（半导体基板）的表面，绝缘层保持在半导体基板与与包含尖端部分上的塑料区域的凸块整体形成的铜片（金属片）之间。 在它们之间保持绝缘体的情况下，通过冲压机将半导体衬底，绝缘层和铜片压制成单块。 凸块穿透绝缘层，并且尖端部分上的塑料区域在与电极的接触表面处塑性变形，使得凸块和电极电连接在一起。

公开(公告)号：US07492045B2

公开(公告)日：2009-02-17

申请号：US11928368

申请日：2007-10-30

申请人： Yoshio Okayama ,  Ryosuke Usui ,  Yasunori Inoue

发明人： Yoshio Okayama ,  Ryosuke Usui ,  Yasunori Inoue

IPC分类号： H01L23/48

CPC分类号： H01L24/11 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/94 ,  H01L2224/0231 ,  H01L2224/02319 ,  H01L2224/02333 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05647 ,  H01L2224/114 ,  H01L2224/116 ,  H01L2224/13099 ,  H01L2224/274 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00014

摘要： Connection reliability in electrode portions of a semiconductor module is improved. A semiconductor wafer is prepared where a plurality of semiconductor substrates each having an electrode and a protective film at the surface is formed in a matrix shape. Next, at the surface of the semiconductor wafer (semiconductor substrate) a insulation layer is held between the semiconductor substrate and a copper sheet (metal sheet) formed integrally with a bump containing a plastic region on a tip part. With the insulating held between them, the semiconductor substrate, the insulating layer and the copper sheet are press-formed by a press machine into a single block. The bump penetrates the insulating layer, and the plastic region on the tip part is plastic deformed at a contact surface with an electrode, so that the bump and the electrode are electrically connected together.

摘要翻译： 提高了半导体模块的电极部分的连接可靠性。 制备半导体晶片，其中在表面上形成具有电极和保护膜的多个半导体衬底形成为矩阵形状。 接下来，在半导体晶片（半导体基板）的表面，绝缘层保持在半导体基板与与包含尖端部分上的塑料区域的凸块整体形成的铜片（金属片）之间。 在它们之间保持绝缘体的情况下，通过冲压机将半导体衬底，绝缘层和铜片压制成单块。 凸块穿透绝缘层，并且尖端部分上的塑料区域在与电极的接触表面处塑性变形，使得凸块和电极电连接在一起。