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公开(公告)号:US09530819B2
公开(公告)日:2016-12-27
申请号:US14797099
申请日:2015-07-11
发明人: Kazuyoshi Maekawa
IPC分类号: H01L21/00 , H01L27/146
CPC分类号: H01L27/14687 , H01L27/14621 , H01L27/14623 , H01L27/14627 , H01L27/14636 , H01L27/1464 , H01L27/14645 , H01L27/14685
摘要: A solid-state imaging element has problems of occurrence of dark current due to influences of an interface state at an interface between a semiconductor and an insulating film, e.g., between silicon and silicon oxide, and of charges generated in a device manufacturing process, which leads to signal noise, thereby degrading the function of a device, specifically, the imaging quality. The outline of the invention in the present application relates to a manufacturing method of a semiconductor integrated circuit device with a surface-irradiation type image sensor, which includes irradiating a main surface of a semiconductor wafer with photodiodes formed therein, with far-ultraviolet ray after forming a lowermost wiring layer of a multi-layer wiring and before forming a color filter layer, and then applying a heat treatment to the wafer.
摘要翻译: 固态成像元件由于半导体和绝缘膜之间的界面(例如硅和氧化硅之间)和在器件制造过程中产生的电荷的界面状态的影响而产生暗电流的问题,其中 导致信号噪声,从而降低设备的功能,特别是成像质量。 本申请的发明内容涉及一种具有表面照射型图像传感器的半导体集成电路器件的制造方法,该半导体集成电路器件包括用形成于其中的光电二极管照射半导体晶片的主表面的远紫外线 形成多层布线的最下布线层,然后形成滤色器层,然后对晶片进行热处理。
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公开(公告)号:US09406628B2
公开(公告)日:2016-08-02
申请号:US14210375
申请日:2014-03-13
CPC分类号: H01L24/05 , C22C21/12 , H01L22/32 , H01L24/03 , H01L24/06 , H01L24/45 , H01L24/48 , H01L24/85 , H01L2224/02126 , H01L2224/02166 , H01L2224/0346 , H01L2224/03464 , H01L2224/0347 , H01L2224/0392 , H01L2224/04042 , H01L2224/05083 , H01L2224/05124 , H01L2224/05147 , H01L2224/05155 , H01L2224/05171 , H01L2224/05553 , H01L2224/05554 , H01L2224/05556 , H01L2224/05582 , H01L2224/05644 , H01L2224/05647 , H01L2224/05664 , H01L2224/29339 , H01L2224/45144 , H01L2224/45147 , H01L2224/48227 , H01L2224/48247 , H01L2224/48463 , H01L2224/48644 , H01L2224/48664 , H01L2224/48844 , H01L2224/48864 , H01L2224/78301 , H01L2224/85045 , H01L2224/85203 , H01L2224/85205 , H01L2224/85207 , H01L2924/01322 , H01L2924/1306 , H01L2924/351 , H01L2924/00 , H01L2924/0105 , H01L2924/01079 , H01L2924/00014 , H01L2924/20305 , H01L2924/01029 , H01L2924/01015 , H01L2924/013 , H01L2924/00013
摘要: A semiconductor device in which reliability of a bonding pad to which a conductive wire is bonded is achieved. A bonding pad having an OPM structure is formed of an Al—Cu alloy film having a Cu concentration of 2 wt % or more. By increasing the Cu concentration, the Al—Cu alloy film forming the bonding pad is hardened. Therefore, the bonding pad is difficult to be deformed by impact in bonding of a Cu wire, and deformation of an OPM film as following the deformation of the bonding pad can be reduced. In this manner, concentration of a stress on the OPM film caused by the impact from the Cu wire can be reduced, and therefore, the breakage of the OPM film can be prevented.
摘要翻译: 实现了其中结合有导线的接合焊盘的可靠性的半导体器件。 具有OPM结构的焊盘由Cu浓度为2重量%以上的Al-Cu合金膜形成。 通过提高Cu浓度,形成接合焊盘的Al-Cu合金膜变硬。 因此,通过在Cu线的接合中的冲击,接合焊盘难以变形,并且能够降低接合焊盘变形后的OPM膜的变形。 以这种方式,可以减少由Cu丝的冲击引起的对OPM膜的应力集中,因此可以防止OPM膜的破损。
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公开(公告)号:US10665502B2
公开(公告)日:2020-05-26
申请号:US16592869
申请日:2019-10-04
IPC分类号: H01L23/48 , H01L23/52 , H01L21/4763 , H01L21/768 , H01L23/528 , H01L23/532 , C23C14/06 , C23C14/16 , C23C14/34 , H01L21/285
摘要: Performance of a semiconductor device is improved. In one embodiment, for example, deposition time is increased from 4.6 sec to 6.9 sec. In other words, in one embodiment, thickness of a tantalum nitride film is increased by increasing the deposition time. Specifically, in one embodiment, deposition time is increased such that a tantalum nitride film provided on the bottom of a connection hole to be coupled to a wide interconnection has a thickness within a range from 5 to 10 nm.
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公开(公告)号:US20170372996A1
公开(公告)日:2017-12-28
申请号:US15621745
申请日:2017-06-13
IPC分类号: H01L23/498 , H01L23/13 , H01L23/00
CPC分类号: H01L23/49838 , H01L23/13 , H01L23/3171 , H01L24/03 , H01L24/05 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/85 , H01L24/97 , H01L2224/02166 , H01L2224/04042 , H01L2224/05083 , H01L2224/05084 , H01L2224/05554 , H01L2224/05558 , H01L2224/05644 , H01L2224/05655 , H01L2224/05664 , H01L2224/32245 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48247 , H01L2224/48463 , H01L2224/48465 , H01L2224/49113 , H01L2224/73265 , H01L2924/181 , H01L2924/00012 , H01L2924/00014 , H01L2924/00
摘要: A bonding pad of a semiconductor chip in a QFP includes, in its exposed portion, a via disposition area comprising: a first segment that connects a corner and a first point; a second segment that connects the corner and a second point; and an arc that connects the first point and the second point and forms a convex shape toward the corner. Further, in a plan view of the bonding pad, at least a part of a via is disposed so as to overlap with the via disposition area.
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公开(公告)号:US09608034B2
公开(公告)日:2017-03-28
申请号:US14987035
申请日:2016-01-04
发明人: Kazuyoshi Maekawa
IPC分类号: H01L27/146
CPC分类号: H01L27/14689 , H01L27/14632 , H01L27/14634 , H01L27/1464 , H01L27/14687 , H01L27/1469
摘要: Disclosed is a manufacturing method of a semiconductor device including a step of attaching semiconductor wafers together, in which it is prevented that the bonding strength between the attached semiconductor wafers may be decreased due to a void caused between the two semiconductor wafers. Moisture, etc., adsorbed to the surfaces of the semiconductor wafers is desorbed by performing a heat treatment on the semiconductor wafers after cleaning the surfaces thereof with pure water. Subsequently, after a plasma treatment is performed on the semiconductor wafers, the two semiconductor wafers are attached together. The wafers are firmly bonded together by subjecting to a high-temperature heat treatment.
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公开(公告)号:US10204853B2
公开(公告)日:2019-02-12
申请号:US15621745
申请日:2017-06-13
IPC分类号: H01L23/48 , H01L23/498 , H01L23/13 , H01L23/31 , H01L23/00
摘要: A bonding pad of a semiconductor chip in a QFP includes, in its exposed portion, a via disposition area comprising: a first segment that connects a corner and a first point; a second segment that connects the corner and a second point; and an arc that connects the first point and the second point and forms a convex shape toward the corner. Further, in a plan view of the bonding pad, at least a part of a via is disposed so as to overlap with the via disposition area.
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公开(公告)号:US09607956B2
公开(公告)日:2017-03-28
申请号:US15165265
申请日:2016-05-26
CPC分类号: H01L24/05 , C22C21/12 , H01L22/32 , H01L24/03 , H01L24/06 , H01L24/45 , H01L24/48 , H01L24/85 , H01L2224/02126 , H01L2224/02166 , H01L2224/0346 , H01L2224/03464 , H01L2224/0347 , H01L2224/0392 , H01L2224/04042 , H01L2224/05083 , H01L2224/05124 , H01L2224/05147 , H01L2224/05155 , H01L2224/05171 , H01L2224/05553 , H01L2224/05554 , H01L2224/05556 , H01L2224/05582 , H01L2224/05644 , H01L2224/05647 , H01L2224/05664 , H01L2224/29339 , H01L2224/45144 , H01L2224/45147 , H01L2224/48227 , H01L2224/48247 , H01L2224/48463 , H01L2224/48644 , H01L2224/48664 , H01L2224/48844 , H01L2224/48864 , H01L2224/78301 , H01L2224/85045 , H01L2224/85203 , H01L2224/85205 , H01L2224/85207 , H01L2924/01322 , H01L2924/1306 , H01L2924/351 , H01L2924/00 , H01L2924/0105 , H01L2924/01079 , H01L2924/00014 , H01L2924/20305 , H01L2924/01029 , H01L2924/01015 , H01L2924/013 , H01L2924/00013
摘要: A semiconductor device in which reliability of a bonding pad to which a conductive wire is bonded is achieved. A bonding pad having an OPM structure is formed of an Al—Cu alloy film having a Cu concentration of 2 wt % or more. By increasing the Cu concentration, the Al—Cu alloy film forming the bonding pad is hardened. Therefore, the bonding pad is difficult to be deformed by impact in bonding of a Cu wire, and deformation of an OPM film as following the deformation of the bonding pad can be reduced. In this manner, concentration of a stress on the OPM film caused by the impact from the Cu wire can be reduced, and therefore, the breakage of the OPM film can be prevented.
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公开(公告)号:US08749064B2
公开(公告)日:2014-06-10
申请号:US13867733
申请日:2013-04-22
发明人: Kazuyoshi Maekawa , Kenichi Mori
IPC分类号: H01L23/48
CPC分类号: H01L23/485 , H01L21/76805 , H01L21/76808 , H01L21/76814 , H01L21/76844 , H01L21/76849 , H01L21/76862 , H01L23/5226 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要: A semiconductor device includes an interlayer insulation film, an underlying line provided in the interlayer insulation film, a liner film overlying the interlayer insulation film, an interlayer insulation film overlying the liner film. The underlying line has a lower hole and the liner film and the interlayer insulation film have an upper hole communicating with the lower hole, and the lower hole is larger in diameter than the upper hole. The semiconductor device further includes a conductive film provided at an internal wall surface of the lower hole, a barrier metal provided along an internal wall surface of the upper hole, and a Cu film filling the upper and lower holes. The conductive film contains a substance identical to a substance of the barrier metal. A highly reliable semiconductor device can thus be obtained.
摘要翻译: 半导体器件包括层间绝缘膜,设置在层间绝缘膜中的底层线,覆盖层间绝缘膜的衬里膜,覆盖衬垫膜的层间绝缘膜。 底线具有较低的孔,衬里膜和层间绝缘膜具有与下孔连通的上孔,下孔的直径大于上孔。 半导体器件还包括设置在下孔内壁表面的导电膜,沿着上孔的内壁表面设置的阻挡金属和填充上孔和下孔的Cu膜。 导电膜含有与阻挡金属物质相同的物质。 因此可以获得高可靠性的半导体器件。
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公开(公告)号:US12080591B2
公开(公告)日:2024-09-03
申请号:US17887045
申请日:2022-08-12
IPC分类号: H01L21/4763 , C23C14/06 , C23C14/16 , C23C14/34 , H01L21/285 , H01L21/768 , H01L23/528 , H01L23/532
CPC分类号: H01L21/76843 , C23C14/0641 , C23C14/165 , C23C14/34 , H01L21/2855 , H01L21/76802 , H01L21/76807 , H01L21/7684 , H01L21/76846 , H01L21/76876 , H01L21/76879 , H01L21/76897 , H01L23/528 , H01L23/5283 , H01L23/53228 , H01L23/53238 , H01L23/53266 , H01L23/53295 , H01L2924/0002 , H01L2924/0002 , H01L2924/00
摘要: Performance of a semiconductor device is improved. In one embodiment, for example, deposition time is increased from 4.6 sec to 6.9 sec. In other words, in one embodiment, thickness of a tantalum nitride film is increased by increasing the deposition time. Specifically, in one embodiment, deposition time is increased such that a tantalum nitride film provided on the bottom of a connection hole to be coupled to a wide interconnection has a thickness within a range from 5 to 10 nm.
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公开(公告)号:US09972505B2
公开(公告)日:2018-05-15
申请号:US14943900
申请日:2015-11-17
IPC分类号: H01L23/495 , H01L21/48 , H01L23/00 , H01L23/532 , H01L21/768 , H01L23/31 , H01L23/525
CPC分类号: H01L21/4817 , H01L21/76852 , H01L23/3121 , H01L23/525 , H01L23/53238 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/13 , H01L24/45 , H01L24/48 , H01L2221/1078 , H01L2224/02166 , H01L2224/0345 , H01L2224/03452 , H01L2224/0401 , H01L2224/04042 , H01L2224/05007 , H01L2224/05008 , H01L2224/05075 , H01L2224/05548 , H01L2224/05664 , H01L2224/0612 , H01L2224/131 , H01L2224/45144 , H01L2224/45147 , H01L2224/45565 , H01L2224/45644 , H01L2224/45664 , H01L2224/48247 , H01L2224/48465 , H01L2924/014 , H01L2924/181 , H01L2924/00012 , H01L2924/00014 , H01L2924/00
摘要: The present invention makes it possible to improve the reliability of a semiconductor device. The semiconductor device has, over a semiconductor substrate, a pad electrode formed at the uppermost layer of a plurality of wiring layers, a surface protective film having an opening over the pad electrode, a redistribution line being formed over the surface protective film and having an upper surface and a side surface, a sidewall barrier film comprising an insulating film covering the side surface and exposing the upper surface of the redistribution line, and a cap metallic film covering the upper surface of the redistribution line. Then the upper surface and side surface of the redistribution line are covered with the cap metallic film or the sidewall barrier film and the cap metallic film and the sidewall barrier film have an overlapping section.
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