Manufacturing method of semiconductor integrated circuit device
    1.
    发明授权
    Manufacturing method of semiconductor integrated circuit device 有权
    半导体集成电路器件的制造方法

    公开(公告)号:US09530819B2

    公开(公告)日:2016-12-27

    申请号:US14797099

    申请日:2015-07-11

    发明人: Kazuyoshi Maekawa

    IPC分类号: H01L21/00 H01L27/146

    摘要: A solid-state imaging element has problems of occurrence of dark current due to influences of an interface state at an interface between a semiconductor and an insulating film, e.g., between silicon and silicon oxide, and of charges generated in a device manufacturing process, which leads to signal noise, thereby degrading the function of a device, specifically, the imaging quality. The outline of the invention in the present application relates to a manufacturing method of a semiconductor integrated circuit device with a surface-irradiation type image sensor, which includes irradiating a main surface of a semiconductor wafer with photodiodes formed therein, with far-ultraviolet ray after forming a lowermost wiring layer of a multi-layer wiring and before forming a color filter layer, and then applying a heat treatment to the wafer.

    摘要翻译: 固态成像元件由于半导体和绝缘膜之间的界面(例如硅和氧化硅之间)和在器件制造过程中产生的电荷的界面状态的影响而产生暗电流的问题,其中 导致信号噪声,从而降低设备的功能,特别是成像质量。 本申请的发明内容涉及一种具有表面照射型图像传感器的半导体集成电路器件的制造方法,该半导体集成电路器件包括用形成于其中的光电二极管照射半导体晶片的主表面的远紫外线 形成多层布线的最下布线层,然后形成滤色器层,然后对晶片进行热处理。

    Semiconductor device
    6.
    发明授权

    公开(公告)号:US10204853B2

    公开(公告)日:2019-02-12

    申请号:US15621745

    申请日:2017-06-13

    摘要: A bonding pad of a semiconductor chip in a QFP includes, in its exposed portion, a via disposition area comprising: a first segment that connects a corner and a first point; a second segment that connects the corner and a second point; and an arc that connects the first point and the second point and forms a convex shape toward the corner. Further, in a plan view of the bonding pad, at least a part of a via is disposed so as to overlap with the via disposition area.

    Semiconductor device with a line and method of fabrication thereof
    8.
    发明授权
    Semiconductor device with a line and method of fabrication thereof 有权
    具有线的半导体器件及其制造方法

    公开(公告)号:US08749064B2

    公开(公告)日:2014-06-10

    申请号:US13867733

    申请日:2013-04-22

    IPC分类号: H01L23/48

    摘要: A semiconductor device includes an interlayer insulation film, an underlying line provided in the interlayer insulation film, a liner film overlying the interlayer insulation film, an interlayer insulation film overlying the liner film. The underlying line has a lower hole and the liner film and the interlayer insulation film have an upper hole communicating with the lower hole, and the lower hole is larger in diameter than the upper hole. The semiconductor device further includes a conductive film provided at an internal wall surface of the lower hole, a barrier metal provided along an internal wall surface of the upper hole, and a Cu film filling the upper and lower holes. The conductive film contains a substance identical to a substance of the barrier metal. A highly reliable semiconductor device can thus be obtained.

    摘要翻译: 半导体器件包括层间绝缘膜,设置在层间绝缘膜中的底层线,覆盖层间绝缘膜的衬里膜,覆盖衬垫膜的层间绝缘膜。 底线具有较低的孔,衬里膜和层间绝缘膜具有与下孔连通的上孔,下孔的直径大于上孔。 半导体器件还包括设置在下孔内壁表面的导电膜,沿着上孔的内壁表面设置的阻挡金属和填充上孔和下孔的Cu膜。 导电膜含有与阻挡金属物质相同的物质。 因此可以获得高可靠性的半导体器件。