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1.发明申请CIRCUITIZED SUBSTRATE WITH INTERNAL THIN FILM CAPACITOR AND METHOD OF MAKING SAME 审中-公开具有内薄膜电容器的电路衬底及其制造方法公开(公告)号：US20120228014A1
公开(公告)日：2012-09-13
申请号：US13042578
申请日：2011-03-08
CPC分类号： H05K1/162 , H01G4/33 , H01G4/38 , H05K1/0231 , H05K3/4608 , H05K2201/017 , H05K2201/0179
摘要： A circuitized substrate for use in such electrical structures as information handling systems wherein the substrate includes a capacitive substrate as part thereof. The capacitive substrate includes a thin film layer of capacitive material strategically positioned on a conductive layer relative to added electrically conductive elements to in turn provide a plurality of internal capacitors within the final circuitized substrate during operation thereof. A method of making such a circuitized substrate is also provided.
摘要翻译： 一种用于诸如信息处理系统的电气结构中的电路化基板，其中所述基板包括作为其一部分的电容基板。 电容性衬底包括相对于添加的导电元件策略性地定位在导电层上的电容材料薄层，从而在其操作期间在最终电路化衬底内提供多个内部电容器。 还提供了制造这种电路化基板的方法。
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公开(公告)号：US08685284B2
公开(公告)日：2014-04-01
申请号：US12884657
申请日：2010-09-17
CPC分类号： H01B1/22 , H01L2224/81 , Y10T29/49117
摘要： A conducting paste and method of forming the paste for device level interconnection. The conducting paste contains metal loading in the range 80-95% that is useful for making five micron device level interconnects. The conducting paste is made by mixing two different conducting pastes, each paste maintaining its micro level individual rich region in the mixed paste even after final curing. One paste contains at least one low melting point alloy and the other paste contains noble metal fillers such as gold or silver flakes. In general, average flake size below five micron is suitable for five micron interconnects. However, 1 micron or smaller silver flakes and an LMP mixture is preferred for five micron interconnects. The amount of LMP based paste in the final mixture is preferably 20-50% by weight. The nano micro paste embodiment shows good electrical yield (81%) and low contact resistance.
摘要翻译： 导电糊和形成用于器件级互连的糊的方法。 导电浆料含有80-95％范围内的金属负载，可用于制造五微米器件级互连。 通过混合两种不同的导电浆料制成导电糊料，即使在最终固化后，每个糊料仍将其微量级独立富含区域保持在混合糊料中。 一种糊状物含有至少一种低熔点合金，另一种糊状物含有贵金属填料如金或银薄片。 通常，小于5微米的平均片尺寸适用于五微米互连。 然而，对于5微米互连，优选1微米或更小的银薄片和LMP混合物。 最终混合物中基于LMP的糊剂的量优选为20-50重量％。 纳米微膏实施例显示良好的电收率（81％）和低接触电阻。
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公开(公告)号：US08288857B2
公开(公告)日：2012-10-16
申请号：US12884421
申请日：2010-09-17
CPC分类号： H01L23/42 , H01L23/573 , H01L24/13 , H01L24/16 , H01L24/29 , H01L2224/13101 , H01L2224/16225 , H01L2224/29 , H01L2224/29101 , H01L2224/2919 , H01L2224/2929 , H01L2224/29339 , H01L2224/29344 , H01L2224/29369 , H01L2224/29387 , H01L2224/29393 , H01L2224/73204 , H01L2224/73253 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01072 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/0665 , H01L2924/10253 , H01L2924/14 , H01L2924/00 , H01L2924/00014
摘要： A tamper-resistant microchip package contains fluid- or nanofluid-filled capsules, channels, or reservoirs, wherein the fluids, either alone or in combination, can destroy circuitry by etching, sintering, or thermally destructing when reverse engineering of the device is attempted. The fluids are released when the fluid-filled cavities are cut away for detailed inspection of the microchip. Nanofluids may be used for the sintering process, and also to increase the thermal conductivity of the fluid for die thermal management. Through-vias and micro vias may be incorporated into the design to increase circuitry destruction efficacy by improving fluid/chip contact. Thermal interface materials may also be utilized to facilitate chip cooling.
摘要翻译： 防篡改微芯片封装包含流体或纳米流体填充的胶囊，通道或储存器，其中单独或组合的流体可以在尝试逆向工程化时通过蚀刻，烧结或热破坏来破坏电路。 当流体填充的空腔被切掉以便对微芯片进行详细检查时，释放流体。 可以将纳米流体用于烧结过程，并且还可以增加用于管芯热管理的流体的热导率。 通孔和微通孔可以并入设计中以通过改善流体/芯片接触来增加电路破坏功效。 也可以使用热界面材料来促进芯片冷却。
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公开(公告)号：US20120069531A1
公开(公告)日：2012-03-22
申请号：US12884657
申请日：2010-09-17
CPC分类号： H01B1/22 , H01L2224/81 , Y10T29/49117
摘要： A conducting paste and method of forming the paste for device level interconnection. The conducting paste contains metal loading in the range 80-95% that is useful for making five micron device level interconnects. The conducting paste is made by mixing two different conducting pastes, each paste maintaining its micro level individual rich region in the mixed paste even after final curing. One paste contains at least one low melting point alloy and the other paste contains noble metal fillers such as gold or silver flakes. In general, average flake size below five micron is suitable for five micron interconnects. However, 1 micron or smaller silver flakes and an LMP mixture is preferred for five micron interconnects. The amount of LMP based paste in the final mixture is preferably 20-50% by weight. The nano micro paste embodiment shows good electrical yield (81%) and low contact resistance.
摘要翻译： 导电糊和形成用于器件级互连的糊的方法。 导电浆料含有80-95％范围内的金属负载，可用于制造五微米器件级互连。 通过混合两种不同的导电浆料制成导电糊料，即使在最终固化后，每个糊料仍将其微量级独立富含区域保持在混合糊料中。 一种糊状物含有至少一种低熔点合金，另一种糊状物含有贵金属填料如金或银薄片。 通常，小于5微米的平均片尺寸适用于五微米互连。 然而，对于5微米互连，优选1微米或更小的银薄片和LMP混合物。 最终混合物中基于LMP的糊剂的量优选为20-50重量％。 纳米微膏实施例显示良好的电收率（81％）和低接触电阻。
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5.发明授权Capacitor material with metal component for use in circuitized substrates, circuitized substrate utilizing same, method of making said circuitized substrate, and information handling system utilizing said circuitized substrate 失效具有用于电路化基板的金属部件的电容器材料，利用其的电路化基板，制造所述电路化基板的方法以及利用所述电路化基板的信息处理系统公开(公告)号：US07025607B1
公开(公告)日：2006-04-11
申请号：US11031074
申请日：2005-01-10
IPC分类号： H01R4/58
CPC分类号： H01G4/206 , H01L2224/16 , H01L2224/73253 , H01L2924/00011 , H01L2924/00014 , H01L2924/0102 , H01L2924/01025 , H01L2924/01046 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/01087 , H01L2924/15311 , H01L2924/16195 , H01L2924/3011 , H05K1/162 , H05K3/0023 , H05K2201/0187 , H05K2201/0209 , H05K2201/0215 , H05K2201/0257 , H01L2224/0401
摘要： A material for use as part of an internal capacitor within a circuitized substrate includes a polymer resin and a quantity of nano-powders including a mixture of at least one metal component and at least one ferroelectric ceramic component, the ferroelectric ceramic component nano-particles having a particle size substantially in the range of between about 0.01 microns and about 0.9 microns and a surface within the range of from about 2.0 to about 20 square meters per gram. A circuitized substrate adapted for using such a material and capacitor therein and a method of making such a substrate are also provided. An electrical assembly (substrate and at least one electrical component) and an information handling system (e.g., personal computer) are also provided.
摘要翻译： 用作电路化基板内的内部电容器的一部分的材料包括聚合物树脂和一定数量的纳米粉末，其包括至少一种金属组分和至少一种铁电陶瓷组分的混合物，所述铁电陶瓷组分纳米颗粒具有 基本上在约0.01微米至约0.9微米范围内的粒度和约2.0至约20平方米每克的表面。 还提供了适于在其中使用这种材料和电容器的电路化基板和制造这种基板的方法。 还提供电气组件（基板和至少一个电气部件）和信息处理系统（例如，个人计算机）。
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6.发明申请公开(公告)号：US20120257343A1
公开(公告)日：2012-10-11
申请号：US13082502
申请日：2011-04-08
CPC分类号： H05K3/4614 , B82Y10/00 , B82Y30/00 , H05K2203/0307 , H05K2203/061
摘要： A method of forming a circuitized substrate for use in electronic packages. A substrate layer is provided that has a copper pad on a surface. A conductive seed layer and a photoresist layer are placed on the surface. The photoresist is developed and conductive material is placed within the developed features and a second conductive material placed on the first conductive material. The photoresist and conductive seed layer are removed to leave a micro-pillar array. The joining and lamination of two circuitized substrate layers utilizes the micro-pillar array for the electrical connection of the circuitized substrate layers.
摘要翻译： 一种形成用于电子封装的电路化基板的方法。 提供了在表面上具有铜垫的基底层。 导电种子层和光致抗蚀剂层被放置在表面上。 光致抗蚀剂被显影并且导电材料被放置在显影特征内并且第二导电材料放置在第一导电材料上。 去除光致抗蚀剂和导电种子层以留下微柱阵列。 两个电路化衬底层的接合和叠层利用微柱阵列用于电路化衬底层的电连接。
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公开(公告)号：US20120068326A1
公开(公告)日：2012-03-22
申请号：US12884421
申请日：2010-09-17
IPC分类号： H01L23/22
CPC分类号： H01L23/42 , H01L23/573 , H01L24/13 , H01L24/16 , H01L24/29 , H01L2224/13101 , H01L2224/16225 , H01L2224/29 , H01L2224/29101 , H01L2224/2919 , H01L2224/2929 , H01L2224/29339 , H01L2224/29344 , H01L2224/29369 , H01L2224/29387 , H01L2224/29393 , H01L2224/73204 , H01L2224/73253 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01072 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/0665 , H01L2924/10253 , H01L2924/14 , H01L2924/00 , H01L2924/00014
摘要： A tamper-resistant microchip package contains fluid- or nanofluid-filled capsules, channels, or reservoirs, wherein the fluids, either alone or in combination, can destroy circuitry by etching, sintering, or thermally destructing when reverse engineering of the device is attempted. The fluids are released when the fluid-filled cavities are cut away for detailed inspection of the microchip. Nanofluids may be used for the sintering process, and also to increase the thermal conductivity of the fluid for die thermal management. Through-vias and micro vias may be incorporated into the design to increase circuitry destruction efficacy by improving fluid/chip contact. Thermal interface materials may also be utilized to facilitate chip cooling.
摘要翻译： 防篡改微芯片封装包含流体或纳米流体填充的胶囊，通道或储存器，其中单独或组合的流体可以在尝试逆向工程化时通过蚀刻，烧结或热破坏来破坏电路。 当流体填充的空腔被切掉以便对微芯片进行详细检查时，释放流体。 可以将纳米流体用于烧结过程，并且还可以增加用于管芯热管理的流体的热导率。 通孔和微通孔可以并入设计中以通过改善流体/芯片接触来增加电路破坏功效。 也可以使用热界面材料来促进芯片冷却。
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8.发明授权Capacitor material for use in circuitized substrates, circuitized substrate utilizing same, method of making said circuitized substrate, and information handling system utilizing said circuitized substrate 有权用于电路化基板的电容器材料，利用其的电路化基板，制造所述电路化基板的方法和利用所述电路化基板的信息处理系统公开(公告)号：US07541265B2
公开(公告)日：2009-06-02
申请号：US11031085
申请日：2005-01-10
IPC分类号： H01L21/425
CPC分类号： H05K1/162 , H01L23/49822 , H01L2224/16 , H01L2224/16235 , H01L2224/73253 , H01L2924/00011 , H01L2924/00014 , H01L2924/01012 , H01L2924/01019 , H01L2924/0102 , H01L2924/01078 , H01L2924/01087 , H01L2924/15311 , H01L2924/16195 , H01L2924/3011 , H05K3/0023 , H05K2201/0187 , H05K2201/0209 , H05K2201/0257 , H05K2201/09509 , H05K2201/09718 , H01L2224/0401
摘要： A material for use as part of an internal capacitor within a circuitized substrate includes a polymer (e.g., a cycloaliphatic epoxy or phenoxy based) resin and a quantity of nano-powders of ferroelectric ceramic material (e.g., barium titanate) having a particle size substantially in the range of from about 0.01 microns to about 0.90 microns and a surface area for selected ones of said particles within the range of from about 2.0 to about 20 square meters per gram. A circuitized substrate adapted for using such a material and capacitor therein and a method of making such a substrate are also provided. An electrical assembly (substrate and at least one electrical component) and an information handling system (e.g., personal computer) are also provided.
摘要翻译： 用作电路化衬底内的内部电容器的一部分的材料包括聚合物（例如，脂环族环氧基或苯氧基）树脂和一定量的具有大体粒度的铁电陶瓷材料（例如钛酸钡）的纳米粉末 在约0.01微米至约0.90微米的范围内，并且所述颗粒中所选颗粒的表面积在约2.0至约20平方米/克的范围内。 还提供了适于在其中使用这种材料和电容器的电路化基板和制造这种基板的方法。 还提供电气组件（基板和至少一个电气部件）和信息处理系统（例如，个人计算机）。
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9.发明授权Method of making circuitized substrate with internal optical pathway using photolithography 失效使用光刻法制造具有内部光学路径的电路化衬底的方法公开(公告)号：US07713767B2
公开(公告)日：2010-05-11
申请号：US11907004
申请日：2007-10-09
申请人： Benson Chan , How T. Lin , Roy H. Magnuson , Voya R. Markovich , Mark D. Poliks
发明人： Benson Chan , How T. Lin , Roy H. Magnuson , Voya R. Markovich , Mark D. Poliks
CPC分类号： G02B6/43 , G02B6/132 , G02B6/136 , H05K1/0274
摘要： A method of making a circuitized substrate (e.g., PCB) including at least one and possibly several internal optical pathways as part thereof such that the resulting substrate will be capable of transmitting and/or receiving both electrical and optical signals. The method involves forming at least one opening between a side of the optical core and an adjacent upstanding member such that the opening is defined by at least one angular sidewall. Light passing through the optical core material (or into the core from above) is reflected off this angular sidewall. The medium (e.g., air) within the opening thus also serves as a reflecting medium due to its own reflective index in comparison to that of the adjacent optical core material. The method utilizes many processes used in conventional PCB manufacturing, thereby keeping costs to a minimum. The formed substrate is capable of being both optically and electrically coupled to one or more other substrates possessing similar capabilities, thereby forming an electro-optical assembly of such substrates.
摘要翻译： 一种制造电路化衬底（例如PCB）的方法，其包括至少一个可能的几个内部光学路径作为其一部分，使得所得到的衬底将能够传输和/或接收电信号和光信号。 该方法包括在光学核心的一侧和相邻的直立构件之间形成至少一个开口，使得开口由至少一个角形侧壁限定。 通过光学芯材料（或从上方进入芯体）的光从该角形侧壁反射。 因此，开口内的介质（例如空气）由于其相对于相邻的光学芯材料的反射率而与反射介质一样起作用。 该方法利用了常规PCB制造中使用的许多工艺，从而将成本降至最低。 所形成的基底能够光学和电耦合到具有相似能力的一个或多个其它基底，从而形成这种基底的电光学组件。
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10.发明申请Multilayered circuitized substrate with p-aramid dielectric layers and method of making same 失效具有对芳族聚酰胺介电层的多层电路基板及其制造方法公开(公告)号：US20090173426A1
公开(公告)日：2009-07-09
申请号：US12380617
申请日：2009-03-02
CPC分类号： H01L23/145 , H01L23/3733 , H01L23/3735 , H01L23/4922 , H01L23/49822 , H01L23/49827 , H01L23/564 , H01L2924/0002 , H01L2924/12044 , H05K1/0366 , H05K1/0373 , H05K3/4602 , H05K3/4626 , H05K3/4652 , H05K3/4655 , H05K3/4688 , H05K2201/0209 , H05K2201/0278 , H05K2201/068 , Y10T29/4913 , Y10T156/10 , H01L2924/00
摘要： A multilayered circuitized substrate including a plurality of dielectric layers each comprised of a p-aramid paper impregnated with a halogen-free, low moisture absorptivity resin including an inorganic filler but not including continuous or semi-continuous fiberglass fibers as part thereof, and a first circuitized layer positioned on a first of the dielectric layers. A method of making this substrate is also provided.
摘要翻译： 一种多层电路化基板，包括多个介电层，每个电介质层由浸渍有不含卤素的低吸湿性树脂的对芳族聚酰胺纸构成，所述不含卤素的低吸湿性树脂包括无机填料，但不包括连续或半连续的玻璃纤维作为其一部分， 电路层位于第一介电层上。 还提供了制造该基板的方法。
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