公开(公告)号：US20230154818A1

公开(公告)日：2023-05-18

申请号：US18053457

申请日：2022-11-08

申请人： SHINKO ELECTRIC INDUSTRIES CO., LTD.

发明人： Katsuya NAKAZAWA

IPC分类号： H01L23/367 ,  H01L23/373 ,  H01L23/492 ,  H01S5/02315

CPC分类号： H01L23/367 ,  H01L23/3736 ,  H01L23/4922 ,  H01S5/02315

摘要： A header for a semiconductor package, includes an eyelet having a first surface, a second surface opposite to the first surface, a side surface, and a through hole penetrating the eyelet from the first surface to the second surface, a lead inserted through the through hole, and a metal base bonded to the second surface of the eyelet. The lead is bent at the second surface of the eyelet and protrudes from the side surface of the eyelet in a plan view. The metal base is spaced apart from the lead. The lead, located at a position overlapping the eyelet in the plan view, is disposed within a thickness range of the metal base in a side view.

公开(公告)号：US09681545B2

公开(公告)日：2017-06-13

申请号：US15187371

申请日：2016-06-20

申请人： INNOLUX CORPORATION

发明人： Chia-Cheng Liu ,  Chia-Hsiung Chang ,  An-Chang Wang ,  Chao-Hsiang Wang ,  Yang-Chen Chen

IPC分类号： H05K1/11 ,  H05K1/09 ,  H01L23/00 ,  H05K3/32 ,  G02F1/1345 ,  H01L23/492

CPC分类号： H05K1/111 ,  G02F1/1345 ,  G02F1/13458 ,  H01L23/4922 ,  H01L24/06 ,  H01L24/07 ,  H01L24/09 ,  H01L24/26 ,  H01L24/31 ,  H01L24/32 ,  H01L24/33 ,  H01L24/83 ,  H01L2225/1041 ,  H01L2924/13069 ,  H01L2924/365 ,  H05K1/092 ,  H05K1/117 ,  H05K3/323 ,  H05K2201/10136

摘要： A substrate structure includes a first substrate, a plurality of first bonding pads, a second substrate and a connecting layer. The first substrate has an element configuration area and a peripheral area. The peripheral area is located around the element configuration area. The first bonding pads are configured spacing at the peripheral area, and a gap is provided between two adjacent first bonding pads. The first bonding pads are located between the first substrate and the second substrate. The connecting layer is located between the first bonding pads and the second substrate. The part of the connecting layer close to the element configuration area is configured with a plurality of first arc edges.

公开(公告)号：US20170131581A1

公开(公告)日：2017-05-11

申请号：US14935200

申请日：2015-11-06

申请人： Andriy Pletenetskyy

发明人： Andriy Pletenetskyy

IPC分类号： G02F1/1347 ,  H01L21/48 ,  H01L23/00 ,  G02F1/1345 ,  H01L23/498

CPC分类号： G02F1/1347 ,  G02F1/1345 ,  G02F1/13452 ,  G02F1/136277 ,  G02F2001/13478 ,  G02F2201/42 ,  G02F2202/28 ,  H01L21/486 ,  H01L23/04 ,  H01L23/053 ,  H01L23/055 ,  H01L23/057 ,  H01L23/13 ,  H01L23/32 ,  H01L23/4922 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/5226 ,  H01L23/535 ,  H01L23/562 ,  H01L24/05 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L2224/04042 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2224/45099

摘要： Disclosed is a low-profile microdisplay module that comprises a package substrate, a microdisplay chip disposed over a first surface of the package substrate, and a plurality of conductive vias. The plurality of conductive vias are electrically coupled to the microdisplay chip and disposed through the package substrate to a second surface of the package substrate, the second surface being opposite and parallel to the first surface. The microdisplay module further comprises a flexible flat circuit connector coupled to the plurality of conductive vias at the second surface of the package substrate.

公开(公告)号：US07508076B2

公开(公告)日：2009-03-24

申请号：US11350777

申请日：2006-02-10

申请人： Robert Japp ,  Voya Markovich ,  Cheryl Palomaki ,  Kostas Papathomas ,  David L. Thomas

发明人： Robert Japp ,  Voya Markovich ,  Cheryl Palomaki ,  Kostas Papathomas ,  David L. Thomas

IPC分类号： H01L23/48

CPC分类号： H01L23/145 ,  H01L23/4922 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/16225 ,  H05K1/0373 ,  H05K3/4602 ,  H05K2201/0209

摘要： An information handling system which includes as part thereof a circuitized substrate comprising a first layer comprised of a dielectric material including a resin material including a predetermined quantity of particles therein and not including continuous fibers, semi-continuous fibers or the like as part thereof, and at least one circuitized layer positioned on the dielectric first layer.

摘要翻译： 一种信息处理系统，其包括作为其一部分的电路化基板，其包括由包括其中包含预定量的颗粒的树脂材料的介电材料构成的第一层，并且不包括连续纤维，半连续纤维等作为其一部分，以及 位于电介质第一层上的至少一个电路层。

公开(公告)号：US07416972B2

公开(公告)日：2008-08-26

申请号：US11730942

申请日：2007-04-05

申请人： Robert M. Japp ,  Irving Memis ,  Kostas I. Papathomas

发明人： Robert M. Japp ,  Irving Memis ,  Kostas I. Papathomas

IPC分类号： H01L21/4763

CPC分类号： H01L23/3735 ,  H01L23/145 ,  H01L23/3733 ,  H01L23/4922 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/564 ,  H01L2224/16225 ,  H01L2924/15311 ,  H05K1/0366 ,  H05K1/0373 ,  H05K3/4602 ,  H05K3/4626 ,  H05K3/4652 ,  H05K3/4655 ,  H05K3/4688 ,  H05K2201/0209 ,  H05K2201/0278 ,  H05K2201/068

摘要： A method of making a circuitized substrate including a composite layer including a first dielectric sub-layer including a plurality of fibers having a low coefficient of thermal expansion and a second dielectric sub-layer of a low moisture absorptivity resin, the second dielectric sub-layer not including continuous or semi-continuous fibers or the like as part thereof. The substrate further includes at least one electrically conductive layer as part thereof.

摘要翻译： 一种制造电路化基板的方法，所述电路化基板包括复合层，所述复合层包括具有低热膨胀系数的多个纤维的第一介电子层和低吸湿性树脂的第二介电子层，所述第二介电子层 不包括连续或半连续纤维等作为其一部分。 衬底还包括至少一个作为其一部分的导电层。

公开(公告)号：US20080191353A1

公开(公告)日：2008-08-14

申请号：US12081042

申请日：2008-04-10

申请人： Robert M. Japp ,  Voya R. Markovich ,  Kostas I. Papathomas ,  Mark D. Poliks

发明人： Robert M. Japp ,  Voya R. Markovich ,  Kostas I. Papathomas ,  Mark D. Poliks

IPC分类号： H01L23/485 ,  H05K3/30

CPC分类号： H01L23/145 ,  H01L23/3733 ,  H01L23/3735 ,  H01L23/4922 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/564 ,  H01L2924/0002 ,  H01L2924/12044 ,  H05K1/0366 ,  H05K1/0373 ,  H05K3/4602 ,  H05K3/4626 ,  H05K3/4652 ,  H05K3/4655 ,  H05K3/4688 ,  H05K2201/0209 ,  H05K2201/0278 ,  H05K2201/068 ,  Y10T29/4913 ,  Y10T156/10 ,  H01L2924/00

摘要： A multilayered circuitized substrate including a plurality of dielectric layers each comprised of a p-aramid paper impregnated with a halogen-free, low moisture absorptivity resin including an inorganic filler but not including continuous or semi-continuous fiberglass fibers as part thereof, and a first circuitized layer positioned on a first of the dielectric layers. A method of making this substrate is also provided.

摘要翻译： 一种多层电路化基板，包括多个介电层，每个电介质层由浸渍有不含卤素的低吸湿性树脂的对芳族聚酰胺纸构成，所述不含卤素的低吸湿性树脂包括无机填料，但不包括连续或半连续的玻璃纤维作为其一部分， 电路层位于第一介电层上。 还提供了制造该基板的方法。

公开(公告)号：US20070182016A1

公开(公告)日：2007-08-09

申请号：US11730942

申请日：2007-04-05

申请人： Robert Japp ,  Irving Memis ,  Kostas Papathomas

发明人： Robert Japp ,  Irving Memis ,  Kostas Papathomas

IPC分类号： H01L23/48

CPC分类号： H01L23/3735 ,  H01L23/145 ,  H01L23/3733 ,  H01L23/4922 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/564 ,  H01L2224/16225 ,  H01L2924/15311 ,  H05K1/0366 ,  H05K1/0373 ,  H05K3/4602 ,  H05K3/4626 ,  H05K3/4652 ,  H05K3/4655 ,  H05K3/4688 ,  H05K2201/0209 ,  H05K2201/0278 ,  H05K2201/068

摘要： A method of making a circuitized substrate including a composite layer including a first dielectric sub-layer including a plurality of fibers having a low coefficient of thermal expansion and a second dielectric sub-layer of a low moisture absorptivity resin, the second dielectric sub-layer not including continuous or semi-continuous fibers or the like as part thereof. The substrate further includes at least one electrically conductive layer as part thereof.

摘要翻译： 一种制造电路化基板的方法，所述电路化基板包括复合层，所述复合层包括具有低热膨胀系数的多个纤维的第一介电子层和低吸湿性树脂的第二介电子层，所述第二介电子层 不包括连续或半连续纤维等作为其一部分。 衬底还包括至少一个作为其一部分的导电层。

公开(公告)号：US20050224251A1

公开(公告)日：2005-10-13

申请号：US10920235

申请日：2004-08-18

申请人： Irving Memis ,  Kostas Papathomas

发明人： Irving Memis ,  Kostas Papathomas

IPC分类号： H01L21/44 ,  H01L21/48 ,  H01L21/50 ,  H01L23/14 ,  H01L23/48 ,  H01L23/492 ,  H01L23/498 ,  H01L23/52 ,  H01L29/40 ,  H05K1/03 ,  H05K3/00 ,  H05K3/46

CPC分类号： H01L23/145 ,  H01L21/48 ,  H01L21/50 ,  H01L23/4922 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2924/0002 ,  H05K1/0373 ,  H05K3/4602 ,  H05K2201/0209 ,  H01L2924/00

摘要： A circuitized substrate comprising a first layer comprised of a dielectric material including a low moisture absorptive polymer resin in combination with a nodular fluoropolymer web encased within the resin, the resulting dielectric layer formed from this combination not including continuous or semi-continuous fibers as part thereof. The substrate further includes at least one circuitized layer positioned on the dielectric first layer. An electrical assembly and a method of making the substrate are also provided, as is an information handling system (e.g., computer) incorporating the circuitized substrate of the invention as part thereof.

摘要翻译： 电路化基板，包括由介电材料组成的第一层，该电介质材料包括与包含在树脂内的结节状含氟聚合物纤维网结合的低吸水性聚合物树脂，由该组合形成的所得电介质层不包括连续或半连续纤维作为其一部分 。 衬底还包括位于电介质第一层上的至少一个电路化层。 还提供电气组件和制造基板的方法，如本发明的电路化基板作为其一部分的信息处理系统（例如，计算机）。

公开(公告)号：US20030122230A1

公开(公告)日：2003-07-03

申请号：US10321427

申请日：2002-12-18

申请人： Samsung Electro-Mechanics Co., Ltd.

发明人： Moon Bong Ahn ,  Chan Wang Park ,  Yong Chil Choi

IPC分类号： H01L023/02

CPC分类号： H01L23/4922 ,  H01L23/3121 ,  H01L23/49827 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/01078 ,  H01L2924/181 ,  H01L2224/45099 ,  H01L2224/85399 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A chip package includes a chip having a first surface provided with a first terminal and a second surface provided with at least one second terminal, the second surface being opposite to the first surface, a first substrate arranged on the first surface of the chip and having a first conductive via hole connected to the first terminal, a second substrate arranged on the second surface of the chip and having at least one second conductive via hole connected to the second terminal, and a resin molding part formed around the chip between the first substrate and the second substrate. And the present invention provides a chip package assembly including the chip package. Further, a method of manufacturing the chip package and an assembly including the chip package are provided. The chip package does not use a bonding wire and additional conductive lands, thereby reducing the size of the package and simplifying the manufacturing process.

公开(公告)号：US5990548A

公开(公告)日：1999-11-23

申请号：US671058

申请日：1996-06-27

申请人： Mitsunori Kobayashi ,  Akira Fukui ,  Kouichi Takashima

发明人： Mitsunori Kobayashi ,  Akira Fukui ,  Kouichi Takashima

IPC分类号： C22C27/04 ,  H01L21/48 ,  H01L23/14 ,  H01L23/373 ,  H01L23/492 ,  H01L23/10 ,  H01L23/48 ,  H01L23/52

CPC分类号： H01L23/3736 ,  H01L21/4871 ,  H01L23/4922 ,  H01L2924/15312

摘要： A plate type member of a Cu--W and/or Mo alloy can be bonded to a ceramic member or the like to form a semiconductor device package without problems, because the degree of warping of the plate type member during a heating step in its fabrication is suppressed. In the plate type member consisting of a Cu--W and/or Mo alloy, including a small amount of alkaline earth metal impurity the difference between alkaline earth metal contents in upper and lower halves of the member along the thickness direction is not more than 10 ppm, or delete "an alkaline earth" preferably not more than 5 ppm relative to the content of W and/or Mo. This plate type member is manufactured by reducing the alkaline earth metal content in W and/or Mo raw material powder, or standing a skeleton vertically upright on a refractory plate for carryiing out Cu infiltration, and performing homogeneous heating and cooling replace during the manufacturing thereby preventing maldistribution of the alkaline earth metal.

摘要翻译： 由于在其制造中的加热步骤期间板型构件的翘曲程度，Cu-W和/或Mo合金的板状构件可以被接合到陶瓷构件等以形成半导体器件封装， 被压制 在由包含少量碱土金属杂质的Cu-W和/或Mo合金构成的板状部件中，沿着厚度方向的部件的上下半部分的碱土金属含量之差不大于10 ppm，或相对于W和/或Mo的含量，删除“碱土”，优选不大于5ppm。该板型构件通过降低W和/或Mo原料粉末中的碱土金属含量来制造，或 竖立竖立在耐火板上的骨架，以进行Cu渗透，并且在制造过程中进行均匀的加热和冷却替换，从而防止碱土金属的分布不均。