Abstract:
A semiconductor package and manufacturing method thereof includes a chip member installed on an upper surface, a lower surface, or both of a substrate. The semiconductor package and manufacturing method thereof also include a mold part stacked embedding the chip member, a connection member disposed at a center portion of the mold part, and a solder part formed on a portion of the connection member.
Abstract:
There are provided an electronic component module capable of increasing a degree of integration by mounting electronic components on both surfaces of a substrate, and a manufacturing method thereof. The electronic component module according to an exemplary embodiment of the present disclosure includes: a substrate; a plurality of electronic components mounted on both surfaces of the substrate; connection conductors each having one end bonded to one surface of the substrate using an conductive adhesive; and a molded portion having the connection conductor embedded therein and formed on one surface of the substrate, wherein the connection conductor may have at least one blocking member preventing a spread of the conductive adhesive.
Abstract:
A semiconductor package including an antenna formed integrally therewith. The semiconductor package includes: a semiconductor chip; a sealing part sealing the semiconductor chip; a substrate part formed on at least one surface of the sealing part; and an antenna part formed on the sealing part and electrically connected to the semiconductor chip.
Abstract:
Disclosed herein is a power module package including an external connection terminal; a substrate in which a fastening unit allowing one end of the external connection terminal to be insertedly fastened thereinto is buried at a predetermined depth in a thickness direction; and a semiconductor chip mounted on one surface of the substrate.
Abstract:
Disclosed herein is a power module package including: a substrate including a metal layer, a first insulation layer formed on the metal layer, a first circuit pattern formed on the first insulation layer and including a first pad and a second pad spaced apart from the first pad, a second insulation layer formed on the first insulation layer to cover the first circuit pattern, and a second circuit pattern formed on the second insulation layer and including a third pad formed on a location corresponding to the first pad and a fourth pad spaced apart from the third pad; a semiconductor chip mounted on the second circuit pattern; one end being electrically connected to the semiconductor chip, and another end protruding from the outside, wherein the first pad and the third pad, and the second pad and the fourth pad have different polarities.
Abstract:
The package includes: a substrate having at least one circuit layer; at least one electronic component mounted on at least one surface of the substrate; a molded part formed on the surface of the substrate to enclose the electronic component; at least one via formed in the molded part to be electrically connected to the circuit layer of the substrate; and a pattern connected to one end of a plated tail connected to the circuit layer connected to the via and exposed to the exterior of the substrate.
Abstract:
The semiconductor package according to an exemplary embodiment includes: a substrate having a plurality of circuit layers and connection pads which are provided between a plurality of insulating layers; a plated tail part of which one end is electrically connected to the connection pad; a dicing part provided in contact with the other end of the plated tail part; a molded part provided on the substrate; and molded part vias provided on the connection pads and penetrating through the molded part.
Abstract:
Disclosed herein is a unit power module including: a first semiconductor chip having one surface on which a 1-1-th electrode and a 1-2-th electrode spaced apart from the 1-1-th electrode are formed and the other surface on which a 1-3-th electrode is formed, a second semiconductor chip having one surface on which a 2-1-th electrode is formed and the other surface on which a 2-2-th electrode is formed, a first metal plate contacting the 1-1-th electrode of the first semiconductor chip and the 2-1-th electrode of the second semiconductor chip, a second metal plate contacting the 1-2-th electrode of the first semiconductor chip and spaced apart from the first metal plate, a third metal plate contacting the 1-3-th electrode of the first semiconductor chip and the 2-2-th electrode of the second semiconductor chip, and a sealing member formed to surround the first metal plate, the second metal plate, and the third metal plate.
Abstract:
There is provided a semiconductor package module including: a substrate having one or more connection terminals formed thereon; first electronic components mounted on a first surface of the substrate; second electronic components mounted on a second surface of the substrate; and third electronic components formed on the substrate and including connection electrodes connecting the one or more connection terminals and external terminals to each other.