公开(公告)号：US09768066B2

公开(公告)日：2017-09-19

申请号：US14316225

申请日：2014-06-26

申请人： STATS ChipPAC, Ltd.

发明人： Xing Zhao ,  Duk Ju Na ,  Lai Yee Chia

IPC分类号： H01L21/768 ,  H01L23/48 ,  H01L25/065 ,  H01L23/00 ,  H01L21/66

CPC分类号： H01L21/76898 ,  H01L22/14 ,  H01L23/291 ,  H01L23/293 ,  H01L23/3192 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/10 ,  H01L24/13 ,  H01L24/81 ,  H01L24/94 ,  H01L25/0657 ,  H01L2224/03002 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/0346 ,  H01L2224/03602 ,  H01L2224/03616 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/05562 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05681 ,  H01L2224/05684 ,  H01L2224/06181 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1145 ,  H01L2224/11849 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16013 ,  H01L2224/16014 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/13091

摘要： A semiconductor device has a semiconductor wafer and a conductive via formed partially through the semiconductor wafer. A portion of the semiconductor wafer and conductive via is removed by a chemical mechanical polishing process. The semiconductor wafer and conductive via are coplanar at first and second surfaces. A first insulating layer and a second insulating layer are formed over the conductive via and semiconductor wafer. The first insulating layer includes an inorganic material and the second insulating layer includes an organic material. An opening in the first and second insulating layers is formed over the conductive via while a second portion of the conductive via remains covered by the first and second insulating layers. A conductive layer is formed over the conductive via and first insulating layer. An interconnect structure is formed over the conductive layer. The semiconductor wafer is singulated into individual semiconductor die.

公开(公告)号：US20150348861A1

公开(公告)日：2015-12-03

申请号：US14288643

申请日：2014-05-28

申请人： STATS CHIPPAC, LTD.

发明人： Lai Yee Chia ,  Duk Ju Na

IPC分类号： H01L23/31 ,  H01L23/528 ,  H01L21/768 ,  H01L23/48 ,  H01L21/56 ,  H01L23/00

CPC分类号： H01L24/97 ,  H01L21/486 ,  H01L21/56 ,  H01L21/561 ,  H01L21/6835 ,  H01L21/76898 ,  H01L23/147 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/528 ,  H01L24/27 ,  H01L24/32 ,  H01L24/83 ,  H01L2221/68331 ,  H01L2221/68381 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/8385 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00

摘要： A semiconductor device has a semiconductor die disposed over the substrate. A conductive via is formed partially through the substrate. An encapsulant is deposited over the semiconductor die and substrate. An insulating layer is formed over the semiconductor die and encapsulant. The insulating layer includes an organic or inorganic insulating material. An adhesive layer is deposited over the insulating layer. The adhesive layer contacts only the insulating layer. A carrier is bonded to the adhesive layer. The insulating layer provides a single CTE across the entire bonding interface between the adhesive layer and semiconductor die and encapsulant. The constant CTE of the insulating layer reduces stress across the bonding interface. A portion of the substrate is removed by backgrinding to expose the conductive via. An insulating layer is formed over the substrate around the conductive via. An interconnect structure is formed over the conductive via.

摘要翻译： 半导体器件具有设置在衬底上的半导体管芯。 导电通孔部分地形成穿过衬底。 密封剂沉积在半导体管芯和衬底上。 在半导体管芯和密封剂上形成绝缘层。 绝缘层包括有机或无机绝缘材料。 粘合剂层沉积在绝缘层上。 粘合剂层仅接触绝缘层。 载体粘合到粘合剂层上。 绝缘层在粘合剂层和半导体管芯和密封剂之间的整个结合界面上提供单个CTE。 绝缘层的恒定CTE降低了接合界面的应力。 通过背磨去除衬底的一部分以暴露导电通孔。 在导电通孔周围的衬底上形成绝缘层。 在导电通孔上形成互连结构。

公开(公告)号：US09257382B2

公开(公告)日：2016-02-09

申请号：US13939044

申请日：2013-07-10

申请人： STATS ChipPAC, Ltd.

发明人： Duk Ju Na ,  Lai Yee Chia ,  Chang Beom Yong

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/498 ,  H01L21/768 ,  H01L21/56 ,  H01L21/683 ,  H01L23/00

CPC分类号： H01L23/49827 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6836 ,  H01L21/76801 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/94 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/02166 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05015 ,  H01L2224/05555 ,  H01L2224/05567 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05666 ,  H01L2224/05681 ,  H01L2224/06181 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1145 ,  H01L2224/1146 ,  H01L2224/11849 ,  H01L2224/13025 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/27002 ,  H01L2224/27005 ,  H01L2224/27312 ,  H01L2224/2919 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/94 ,  H01L2924/00011 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/11 ,  H01L2924/00014 ,  H01L2224/27 ,  H01L2924/00012 ,  H01L2224/03 ,  H01L2924/01074 ,  H01L2924/01029 ,  H01L2924/01007 ,  H01L2924/0665 ,  H01L2224/81805

摘要： A semiconductor device has a plurality of conductive vias formed into a semiconductor wafer. An insulating lining is formed around the conductive vias and a conductive layer is formed over the insulating lining. A portion of the semiconductor wafer is removed so the conductive vias extend above a surface of the semiconductor wafer. A first insulating layer is formed over the surface of the semiconductor wafer and conductive vias. A first portion of the first insulating layer is removed and a second portion of the first insulating layer remains as guard rings around the conductive vias. A conductive layer is formed over the conductive vias. A second insulating layer is formed over the surface of the semiconductor wafer, guard rings, and conductive vias. A portion of the second insulating layer is removed to expose the conductive vias and a portion of the guard rings.

公开(公告)号：US20150380310A1

公开(公告)日：2015-12-31

申请号：US14316225

申请日：2014-06-26

申请人： STATS ChipPAC, Ltd.

发明人： Xing Zhao ,  Duk Ju Na ,  Lai Yee Chia

IPC分类号： H01L21/768 ,  H01L21/78 ,  H01L23/48

CPC分类号： H01L21/76898 ,  H01L22/14 ,  H01L23/291 ,  H01L23/293 ,  H01L23/3192 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/10 ,  H01L24/13 ,  H01L24/81 ,  H01L24/94 ,  H01L25/0657 ,  H01L2224/03002 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/0346 ,  H01L2224/03602 ,  H01L2224/03616 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/05562 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05681 ,  H01L2224/05684 ,  H01L2224/06181 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1145 ,  H01L2224/11849 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16013 ,  H01L2224/16014 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/13091

摘要： A semiconductor device has a semiconductor wafer and a conductive via formed partially through the semiconductor wafer. A portion of the semiconductor wafer and conductive via is removed by a chemical mechanical polishing process. The semiconductor wafer and conductive via are coplanar at first and second surfaces. A first insulating layer and a second insulating layer are formed over the conductive via and semiconductor wafer. The first insulating layer includes an inorganic material and the second insulating layer includes an organic material. An opening in the first and second insulating layers is formed over the conductive via while a second portion of the conductive via remains covered by the first and second insulating layers. A conductive layer is formed over the conductive via and first insulating layer. An interconnect structure is formed over the conductive layer. The semiconductor wafer is singulated into individual semiconductor die.

摘要翻译： 半导体器件具有部分地穿过半导体晶片形成的半导体晶片和导电通孔。 通过化学机械抛光工艺去除半导体晶片和导电通孔的一部分。 半导体晶片和导电通孔在第一和第二表面共面。 在导电通孔和半导体晶片之上形成第一绝缘层和第二绝缘层。 第一绝缘层包括无机材料，第二绝缘层包括有机材料。 第一和第二绝缘层上的开口形成在导电通孔上方，而导电通孔的第二部分保持被第一和第二绝缘层覆盖。 导电层形成在导电通孔和第一绝缘层之上。 在导电层上形成互连结构。 将半导体晶片分成单独的半导体晶片。

公开(公告)号：US09184104B1

公开(公告)日：2015-11-10

申请号：US14288643

申请日：2014-05-28

申请人： STATS ChipPAC, Ltd.

发明人： Lai Yee Chia ,  Duk Ju Na

IPC分类号： H01L21/44 ,  H01L23/48 ,  H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01L21/768 ,  H01L23/528

CPC分类号： H01L24/97 ,  H01L21/486 ,  H01L21/56 ,  H01L21/561 ,  H01L21/6835 ,  H01L21/76898 ,  H01L23/147 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/528 ,  H01L24/27 ,  H01L24/32 ,  H01L24/83 ,  H01L2221/68331 ,  H01L2221/68381 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/8385 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00

摘要： A semiconductor device has a semiconductor die disposed over the substrate. A conductive via is formed partially through the substrate. An encapsulant is deposited over the semiconductor die and substrate. An insulating layer is formed over the semiconductor die and encapsulant. The insulating layer includes an organic or inorganic insulating material. An adhesive layer is deposited over the insulating layer. The adhesive layer contacts only the insulating layer. A carrier is bonded to the adhesive layer. The insulating layer provides a single CTE across the entire bonding interface between the adhesive layer and semiconductor die and encapsulant. The constant CTE of the insulating layer reduces stress across the bonding interface. A portion of the substrate is removed by backgrinding to expose the conductive via. An insulating layer is formed over the substrate around the conductive via. An interconnect structure is formed over the conductive via.

摘要翻译： 半导体器件具有设置在衬底上的半导体管芯。 导电通孔部分地形成穿过衬底。 密封剂沉积在半导体管芯和衬底上。 在半导体管芯和密封剂上形成绝缘层。 绝缘层包括有机或无机绝缘材料。 粘合剂层沉积在绝缘层上。 粘合剂层仅接触绝缘层。 载体粘合到粘合剂层上。 绝缘层在粘合剂层和半导体管芯和密封剂之间的整个结合界面上提供单个CTE。 绝缘层的恒定CTE降低了接合界面的应力。 通过背磨去除衬底的一部分以暴露导电通孔。 在导电通孔周围的衬底上形成绝缘层。 在导电通孔上形成互连结构。

公开(公告)号：US20130299998A1

公开(公告)日：2013-11-14

申请号：US13939044

申请日：2013-07-10

申请人： STATS ChipPAC, Ltd.

发明人： Duk Ju Na ,  Lai Yee Chia ,  Chang Beom Yong

IPC分类号： H01L23/498 ,  H01L21/768

CPC分类号： H01L23/49827 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6836 ,  H01L21/76801 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/94 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/02166 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05015 ,  H01L2224/05555 ,  H01L2224/05567 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05666 ,  H01L2224/05681 ,  H01L2224/06181 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1145 ,  H01L2224/1146 ,  H01L2224/11849 ,  H01L2224/13025 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/27002 ,  H01L2224/27005 ,  H01L2224/27312 ,  H01L2224/2919 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/94 ,  H01L2924/00011 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/11 ,  H01L2924/00014 ,  H01L2224/27 ,  H01L2924/00012 ,  H01L2224/03 ,  H01L2924/01074 ,  H01L2924/01029 ,  H01L2924/01007 ,  H01L2924/0665 ,  H01L2224/81805

摘要： A semiconductor device has a plurality of conductive vias formed into a semiconductor wafer. An insulating lining is formed around the conductive vias and a conductive layer is formed over the insulating lining. A portion of the semiconductor wafer is removed so the conductive vias extend above a surface of the semiconductor wafer. A first insulating layer is formed over the surface of the semiconductor wafer and conductive vias. A first portion of the first insulating layer is removed and a second portion of the first insulating layer remains as guard rings around the conductive vias. A conductive layer is formed over the conductive vias. A second insulating layer is formed over the surface of the semiconductor wafer, guard rings, and conductive vias. A portion of the second insulating layer is removed to expose the conductive vias and a portion of the guard rings.

摘要翻译： 半导体器件具有形成为半导体晶片的多个导电通孔。 在导电通孔周围形成绝缘衬里，并且在绝缘衬里上形成导电层。 去除半导体晶片的一部分，使得导电通孔延伸到半导体晶片的表面之上。 在半导体晶片和导电通孔的表面上形成第一绝缘层。 去除第一绝缘层的第一部分，并且第一绝缘层的第二部分保持围绕导电通孔的保护环。 在导电通孔上形成导电层。 在半导体晶片的表面上形成第二绝缘层，保护环和导电通孔。 去除第二绝缘层的一部分以露出导电通孔和保护环的一部分。