公开(公告)号：US20200058500A1

公开(公告)日：2020-02-20

申请号：US16662236

申请日：2019-10-24

Applicant: STC.UNM

Inventor： Seung-Chang Lee ,  Steven R.J. Brueck

IPC: H01L21/02 ,  B81C1/00 ,  B82Y10/00 ,  H01L21/311 ,  H01L21/306 ,  H01L21/285 ,  H01L29/06 ,  H01L29/786 ,  H01L27/092 ,  H01L29/66 ,  H01L29/423 ,  H01L21/8238

Abstract: Provided is a method for growing a nanowire, including: providing a substrate with a base portion having a first surface and at least one support structure extending above or below the first surface; forming a dielectric coating on the at least one support structure; forming a photoresist coating over the substrate; forming a metal coating over at least a portion of the dielectric coating; removing a portion of the dielectric coating to expose a surface of the at least one support structure; removing a portion of the at least one support structure to form a nanowire growth surface; growing at least one nanowire on the nanowire growth surface of a corresponding one of the at least one support structure, wherein the nanowire comprises a root end attached to the growth surface and an opposing, free end extending from the root end; and elastically bending the at least one nanowire.

公开(公告)号：US10483105B2

公开(公告)日：2019-11-19

申请号：US15573772

申请日：2016-05-13

Applicant: STC.UNM

Inventor： Seung-Chang Lee ,  Steven R. J. Brueck

IPC: H01L21/02 ,  B81C1/00 ,  B82Y10/00 ,  H01L21/8238 ,  H01L29/423 ,  H01L29/66 ,  H01L27/092 ,  H01L29/786 ,  H01L29/06 ,  H01L21/285 ,  H01L21/306 ,  H01L21/311 ,  B82Y40/00

Abstract: Provided is a method for growing a nanowire, including: providing a substrate with a base portion having a first surface and at least one support structure extending above or below the first surface; forming a dielectric coating on the at least one support structure; forming a photoresist coating over the substrate; forming a metal coating over at least a portion of the dielectric coating; removing a portion of the dielectric coating to expose a surface of the at least one support structure; removing a portion of the at least one support structure to form a nanowire growth surface; growing at least one nanowire on the nanowire growth surface of a corresponding one of the at least one support structure, wherein the nanowire comprises a root end attached to the growth surface and an opposing, free end extending from the root end; and elastically bending the at least one nanowire.

公开(公告)号：US09153431B1

公开(公告)日：2015-10-06

申请号：US13670391

申请日：2012-11-06

Applicant: STC.UNM

Inventor： Seung-Chang Lee ,  Steven R. J. Brueck

IPC: H01L21/02 ,  H01L29/06

CPC classification number: C30B25/04 ,  C30B25/18 ,  C30B25/186 ,  C30B29/406 ,  H01L21/02381 ,  H01L21/0243 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02609 ,  H01L21/02639 ,  H01L21/02647 ,  H01L27/1222 ,  H01L29/045 ,  H01L29/06 ,  H01L29/0657 ,  H01L29/16 ,  H01L29/2003

Abstract: A method of epitaxially growing nitrogen-based compound semiconductor thin films on a semiconductor substrate, which is periodically patterned with grooves. The method can provide an epitaxial growth of a first crystalline phase epitaxial film on the substrate, and block the growth of an initial crystalline phase with barrier materials prepared at the sides of the grooves. Semiconductor devices employing the epitaxial films are also disclosed.

Abstract translation: 在半导体衬底上外延生长氮基化合物半导体薄膜的方法，该半导体衬底周期性地形成凹槽。 该方法可以在衬底上提供第一结晶相外延膜的外延生长，并且阻挡初始结晶相的生长与在槽的侧面制备的阻挡材料的生长。 还公开了使用外延膜的半导体器件。

公开(公告)号：US20180358226A1

公开(公告)日：2018-12-13

申请号：US15573772

申请日：2016-05-13

Applicant: STC.UNM

Inventor： Seung-Chang Lee ,  Steven R.J. Brueck

IPC: H01L21/02 ,  H01L21/311 ,  H01L21/306 ,  H01L21/285 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L21/02664 ,  B81C1/00111 ,  B82Y10/00 ,  B82Y40/00 ,  H01L21/02236 ,  H01L21/02381 ,  H01L21/02433 ,  H01L21/02532 ,  H01L21/02535 ,  H01L21/02546 ,  H01L21/02603 ,  H01L21/02639 ,  H01L21/02645 ,  H01L21/02653 ,  H01L21/2855 ,  H01L21/30608 ,  H01L21/31116 ,  H01L21/823807 ,  H01L27/092 ,  H01L27/0922 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66742 ,  H01L29/78681 ,  H01L29/78684 ,  H01L29/78696

Abstract: Provided is a method for growing a nanowire, including: providing a substrate with a base portion having a first surface and at least one support structure extending above or below the first surface; forming a dielectric coating on the at least one support structure; forming a photoresist coating over the substrate; forming a metal coating over at least a portion of the dielectric coating; removing a portion of the dielectric coating to expose a surface of the at least one support structure; removing a portion of the at least one support structure to form a nanowire growth surface; growing at least one nanowire on the nanowire growth surface of a corresponding one of the at least one support structure, wherein the nanowire comprises a root end attached to the growth surface and an opposing, free end extending from the root end; and elastically bending the at least one nanowire.

公开(公告)号：US20200006597A1

公开(公告)日：2020-01-02

申请号：US16567535

申请日：2019-09-11

Applicant: STC.UNM

Inventor： Steven R.J. Brueck ,  Seung-Chang Lee ,  Christian Wetzel ,  Mark Durniak

IPC: H01L33/32 ,  H01L21/02 ,  H01L21/78 ,  H01L33/00 ,  H01L33/04 ,  H01L33/18 ,  H01L29/04

Abstract: A method of forming a semiconductor structure includes providing a substrate comprising a first material portion and a single crystal silicon layer on the first material portion. The substrate further comprises a major front surface, a major backside surface opposing the major front surface, and a plurality of grooves positioned in the major front surface. A buffer layer is deposited in one or more of the plurality of grooves. A semiconductor material is epitaxially grown over the buffer layer and in the one or more plurality of grooves, the epitaxially grown semiconductor material comprising a hexagonal crystalline phase layer and a cubic crystalline phase structure disposed over the hexagonal crystalline phase.

公开(公告)号：US10164082B2

公开(公告)日：2018-12-25

申请号：US15466461

申请日：2017-03-22

Applicant: STC.UNM

Inventor： Steven R. J. Brueck ,  Seung-Chang Lee ,  Christian Wetzel ,  Mark Durniak

IPC: H01L29/778 ,  H01L21/02 ,  H01L21/306 ,  H01L29/66 ,  H01L29/205 ,  H01L29/08 ,  H01L21/78 ,  H01L29/04 ,  H01L29/423 ,  H01L29/06 ,  H01L33/00 ,  H01L33/32 ,  H01L29/40 ,  H01L33/24

Abstract: A transistor comprises a substrate comprising a Group III/V compound semiconductor material having a cubic crystalline phase structure positioned on a hexagonal crystalline phase layer having a first region and a second region, the cubic crystalline phase structure being positioned between the first region and the second region of the hexagonal crystalline phase layer. A source region and a drain region are both positioned in the Group III/V compound semiconductor material. A channel region is in the Group III/V compound semiconductor material. A gate is over the channel region. An optional backside contact can also be formed. A source contact and electrode are positioned to provide electrical contact to the source region. A drain contact and electrode are positioned to provide electrical contact to the drain region. Methods of forming transistors are also disclosed.

公开(公告)号：US09142400B1

公开(公告)日：2015-09-22

申请号：US13944808

申请日：2013-07-17

Applicant: STC.UNM

Inventor： Steven R. J. Brueck ,  Stephen D. Hersee ,  Seung-Chang Lee ,  Daniel Feezell

IPC: H01L29/06 ,  H01L21/02 ,  H01L27/12

CPC classification number: H01L21/02107 ,  B82Y10/00 ,  B82Y40/00 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02538 ,  H01L21/02639 ,  H01L27/1211 ,  H01L29/045 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/66469 ,  H01L29/66795 ,  H01L29/775 ,  H01L29/7783 ,  H01L29/785

Abstract: A method for making a heteroepitaxial layer. The method comprises providing a semiconductor substrate. A seed area delineated with a selective growth mask is formed on the semiconductor substrate. The seed area comprises a first material and has a linear surface dimension of less than 100 nm. A heteroepitaxial layer is grown on the seed area, the heteroepitaxial layer comprising a second material that is different from the first material. Devices made by the method are also disclosed.

Abstract translation: 一种制造异质外延层的方法。 该方法包括提供半导体衬底。 在半导体衬底上形成用选择性生长掩模描绘的种子区域。 种子区域包括第一材料并且具有小于100nm的线性表面尺寸。 在种子区域上生长异质外延层，异质外延层包含不同于第一材料的第二材料。 还公开了通过该方法制造的器件。

公开(公告)号：US20200161449A1

公开(公告)日：2020-05-21

申请号：US16748361

申请日：2020-01-21

Applicant: STC.UNM

Inventor： Steven R.J. Brueck ,  Stephen D. Hersee ,  Seung-Chang Lee ,  Daniel Feezell

IPC: H01L29/66 ,  H01L21/02 ,  H01L29/78 ,  B82Y40/00 ,  H01L29/04 ,  H01L29/06 ,  H01L29/775 ,  H01L29/20 ,  H01L29/778 ,  B82Y10/00 ,  H01L29/16

Abstract: A method for making a heteroepitaxial layer. The method comprises providing a semiconductor substrate. A seed area delineated with a selective growth mask is formed on the semiconductor substrate. The seed area comprises a first material and has a linear surface dimension of less than 100 nm. A heteroepitaxial layer is grown on the seed area, the heteroepitaxial layer comprising a second material that is different from the first material. Devices made by the method are also disclosed.

公开(公告)号：US20200161448A1

公开(公告)日：2020-05-21

申请号：US16748327

申请日：2020-01-21

Applicant: STC.UNM

Inventor： Steven R.J. Brueck ,  Stephen D. Hersee ,  Seung-Chang Lee ,  Daniel Feezell

IPC: H01L29/66 ,  H01L21/02 ,  H01L29/78 ,  B82Y40/00 ,  H01L29/04 ,  H01L29/06 ,  H01L29/775 ,  H01L29/20 ,  H01L29/778 ,  B82Y10/00 ,  H01L29/16

Abstract: A method for making a heteroepitaxial layer. The method comprises providing a semiconductor substrate. A seed area delineated with a selective growth mask is formed on the semiconductor substrate. The seed area comprises a first material and has a linear surface dimension of less than 100 nm. A heteroepitaxial layer is grown on the seed area, the heteroepitaxial layer comprising a second material that is different from the first material. Devices made by the method are also disclosed.

公开(公告)号：US20170194476A1

公开(公告)日：2017-07-06

申请号：US15466461

申请日：2017-03-22

Applicant: STC.UNM

Inventor： Steven R.J. Brueck ,  Seung-Chang Lee ,  Christian Wetzel ,  Mark Durniak

IPC: H01L29/778 ,  H01L21/02 ,  H01L29/08 ,  H01L29/66 ,  H01L29/205 ,  H01L29/04 ,  H01L21/306

CPC classification number: H01L29/7787 ,  H01L21/02381 ,  H01L21/02395 ,  H01L21/0243 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/02494 ,  H01L21/02502 ,  H01L21/0251 ,  H01L21/0254 ,  H01L21/02587 ,  H01L21/02609 ,  H01L29/04 ,  H01L29/045 ,  H01L29/0657 ,  H01L29/0847 ,  H01L29/205 ,  H01L29/402 ,  H01L29/42316 ,  H01L29/66462 ,  H01L29/78 ,  H01L33/007 ,  H01L33/0079 ,  H01L33/24 ,  H01L33/32 ,  H01S5/021 ,  H01S5/22 ,  H01S5/227 ,  H01S5/3203 ,  H01S5/34333

Abstract: A transistor comprises a substrate comprising a Group III/V compound semiconductor material having a cubic crystalline phase structure positioned on a hexagonal crystalline phase layer having a first region and a second region, the cubic crystalline phase structure being positioned between the first region and the second region of the hexagonal crystalline phase layer. A source region and a drain region are both positioned in the Group III/V compound semiconductor material. A channel region is in the Group III/V compound semiconductor material. A gate is over the channel region. An optional backside contact can also be formed. A source contact and electrode are positioned to provide electrical contact to the source region. A drain contact and electrode are positioned to provide electrical contact to the drain region. Methods of forming transistors are also disclosed.