公开(公告)号：US5757078A

公开(公告)日：1998-05-26

申请号：US637281

申请日：1996-04-24

申请人： Shuichi Matsuda ,  Kazutaka Shoji

发明人： Shuichi Matsuda ,  Kazutaka Shoji

IPC分类号： H01L21/60 ,  H01L23/12 ,  H01L23/485 ,  H01L23/498 ,  H01L23/48

CPC分类号： H01L24/10 ,  H01L23/49816 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05541 ,  H01L2224/05559 ,  H01L2224/05572 ,  H01L2224/13 ,  H01L2224/13006 ,  H01L2224/131 ,  H01L2224/16 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/3025

摘要： A semiconductor device including a semiconductor chip having electrode pads, a package composed of a plurality of insulating films and adhered to the semiconductor chip by an adhesive agent. The package includes wiring patterns interposed between the plurality of insulating films, and the wiring patterns are selectively connected to the electrode pads at one end, and to the plurality of electrically conductive protrusions at the other end, via viaholes. The semiconductor device further includes a plurality of electrically conductive protrusions extending from the outermost wiring patterns via the viaholes provided in the outermost insulating film.

摘要翻译： 一种半导体器件，包括具有电极焊盘的半导体芯片，由多个绝缘膜构成的封装，并通过粘合剂粘附到半导体芯片。 封装包括插入在多个绝缘膜之间的布线图案，并且布线图案在一端被选择性地连接到电极焊盘，并且在另一端通过通孔选择性地连接到多个导电突起。 半导体器件还包括从最外面的布线图形经由设置在最外层绝缘膜中的通孔延伸的多个导电突起。

公开(公告)号：US06794750B2

公开(公告)日：2004-09-21

申请号：US09222524

申请日：1998-12-28

申请人： Shuichi Matsuda

发明人： Shuichi Matsuda

IPC分类号： H01L2343

CPC分类号： H01L23/4985 ,  H01L23/3121 ,  H01L23/49816 ,  H01L23/49827 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/00

摘要： A semiconductor device equipped with a TAB (tape automated bonding) tape. A desired pattern of wiring is formed on one surface of the TAB tape and a semiconductor chip having two or more chip electrodes is disposed on the other surface of the TAB tape. The wiring and the chip electrodes are electrically interconnected via bumps that are formed in through-holes of the wiring in conforming relationship with the chip electrodes. This prevents fault connection between the chip electrodes and the bumps.

摘要翻译： 一种配有TAB（胶带自动贴合）胶带的半导体器件。 在TAB带的一个表面上形成所需的布线图案，并且在TAB带的另一个表面上设置具有两个或更多个芯片电极的半导体芯片。 布线和芯片电极通过与芯片电极成一致的关系形成在布线的通孔中的凸块电连接。 这防止了芯片电极和凸块之间的故障连接。

公开(公告)号：US5759873A

公开(公告)日：1998-06-02

申请号：US733207

申请日：1996-10-17

申请人： Keiichiro Kata ,  Shuichi Matsuda ,  Hironori Ono

发明人： Keiichiro Kata ,  Shuichi Matsuda ,  Hironori Ono

IPC分类号： H01L21/48 ,  H01L21/60 ,  H01L23/544 ,  H01L21/44 ,  H01L21/50

CPC分类号： H01L24/86 ,  H01L21/4803 ,  H01L23/544 ,  H01L2223/54473 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/351 ,  Y10T29/41

摘要： In a method of manufacturing a chip size semiconductor device comprising a semiconductor chip and a carrier tape including an insulating film and wiring patterns formed on one surface of the insulating film, the method comprises the steps of bonding the semiconductor chip and the carrier tape by the use of an adhesive film having a predetermined size corresponding to an adhesive area of the semiconductor chip. The step of bonding comprises the substeps of cutting away the adhesive film by punching from an adhesive film tape held above the semiconductor chip mounted on a table and subsequently setting the adhesive film on the adhesive area by moving the adhesive film downwardly.

摘要翻译： 在制造包括半导体芯片的芯片尺寸半导体器件的方法和包括绝缘膜的载带和形成在绝缘膜的一个表面上的布线图案的方法中，所述方法包括以下步骤：将半导体芯片和载带 使用具有对应于半导体芯片的粘合区域的预定尺寸的粘合剂膜。 接合步骤包括通过从保持在安装在工作台上的半导体芯片上方的粘合薄膜带上冲下来切割粘合剂膜的子步骤，然后通过向下移动粘合剂膜将粘合剂膜设置在粘合剂区域上。

公开(公告)号：US4792461A

公开(公告)日：1988-12-20

申请号：US64392

申请日：1987-06-22

申请人： Yaichiro Watakabe ,  Shuichi Matsuda

发明人： Yaichiro Watakabe ,  Shuichi Matsuda

IPC分类号： G03F1/00 ,  G03F1/54 ,  H01L21/027 ,  B05D3/06

CPC分类号： G03F1/54 ,  Y10S148/019 ,  Y10S148/147 ,  Y10T428/2395

摘要： A silicide film of oxidized transition metal 3 formed on a transparent substrate 1 has a low reflectance and in consequence, a high resolution can be obtained and dry etching thereof can be easily done. In addition, since said silicide film 3 has good adhesion to a transparent substrate 1, file patterns therein do not peel off at the time of rinsing the mask.

摘要翻译： 形成在透明基板1上的氧化过渡金属3的硅化物膜具有低反射率，因此可以获得高分辨率，并且可以容易地进行干蚀刻。 此外，由于所述硅化物膜3对透明基板1具有良好的粘附性，因此在清洗掩模时，其中的文件图案不会剥落。

公开(公告)号：US5424932A

公开(公告)日：1995-06-13

申请号：US036990

申请日：1993-03-25

申请人： Kiyoharu Inou ,  Shuichi Matsuda

发明人： Kiyoharu Inou ,  Shuichi Matsuda

IPC分类号： H02M3/28 ,  H02M3/335

CPC分类号： H02M3/33561

摘要： A switching power supply wherein high speed switching and high output voltages are obtained by utilizing an auxiliary power supply and a synchronizing signal having a sawtooth shaped waveform, whereby delay time in a control signal to an FET switch is substantially reduced. The switching power supply comprises a secondary output circuit which is supplied with a square waveform voltage and utilizes an FET switch which controls the width of pulses chopped from the square waveform voltage and causes the output circuit to produce a direct current output voltage having a set value. The control signal to the FET switch is produced by a control circuit which is independently powered by the auxiliary power supply and supplied with the synchronizing signal.

摘要翻译： 一种开关电源，其中通过利用辅助电源和具有锯齿形波形的同步信号来获得高速开关和高输出电压，从而大大减少了对FET开关的控制信号的延迟时间。 开关电源包括二次输出电路，该二次输出电路被提供方波电压，并利用FET开关，该开关控制从方波电压斩波的脉冲宽度，并使输出电路产生具有设定值的直流输出电压 。 对FET开关的控制信号由控制电路产生，该控制电路由辅助电源独立供电并提供同步信号。

公开(公告)号：US4957834A

公开(公告)日：1990-09-18

申请号：US266706

申请日：1988-11-03

申请人： Shuichi Matsuda ,  Yaichiro Watakabe

发明人： Shuichi Matsuda ,  Yaichiro Watakabe

IPC分类号： G03F1/00 ,  G03F1/54 ,  H01L21/027 ,  H01L21/30

CPC分类号： G03F1/54 ,  G03F1/80

摘要： In manufacturing a photomask, a molybdenum silicide film is formed on the main surface of a quartz substrate. A resist film having a pattern is, then, formed on the molybdenum silicide film. Thereafter, the molybdenum silicide film is etched using the resist film as a mask. The etching is effected in a plasma generated in a mixed gas containing nitrogen gas in CF.sub.4 gas.

摘要翻译： 在制造光掩模时，在石英基板的主表面上形成硅化钼膜。 然后，在硅化钼膜上形成具有图案的抗蚀剂膜。 此后，使用抗蚀剂膜作为掩模来蚀刻硅化钼膜。 在CF4气体中含有氮气的混合气体中产生的等离子体中进行蚀刻。

公开(公告)号：US4783371A

公开(公告)日：1988-11-08

申请号：US837356

申请日：1986-03-06

申请人： Yaichiro Watakabe ,  Shuichi Matsuda

发明人： Yaichiro Watakabe ,  Shuichi Matsuda

IPC分类号： G03F1/00 ,  G03F1/54 ,  H01L21/027 ,  B32B15/00

CPC分类号： G03F1/54 ,  Y10S148/019 ,  Y10S148/147 ,  Y10T428/2395

摘要： A silicide film of oxidized transition metal 3 formed on a transparent substrate 1 has a low reflectance and in consequence, a high resolution can be obtained and dry etching thereof can be easily done. In addition, since said silicide film 3 has good adhesion to a transparent substrate 1, fine patterns therein do not peel off at the time of rinsing the mask.

摘要翻译： 形成在透明基板1上的氧化过渡金属3的硅化物膜具有低反射率，因此可以获得高分辨率，并且可以容易地进行干蚀刻。 此外，由于所述硅化物膜3对透明基板1具有良好的粘附性，所以在冲洗掩模时，其中的精细图案不会剥落。

公开(公告)号：US4738907A

公开(公告)日：1988-04-19

申请号：US841469

申请日：1986-03-20

申请人： Akira Shigetomi ,  Shuichi Matsuda

发明人： Akira Shigetomi ,  Shuichi Matsuda

IPC分类号： G03F1/00 ,  G03F1/54 ,  H01L21/027 ,  G03F9/00

CPC分类号： G03F1/54 ,  Y10S430/143

摘要： A photomask manufacturing process including step of forming on a transparent silica glass substrate a silicide film in which an alloy comprising two or more metal elements is silicidized. A resist is applied onto the silicide film and then a patterning mask is provided by light or electron beam, followed by developing step. Exposed portion of the silicide film is etched away using a dry etching process.

摘要翻译： 一种光掩模制造方法，包括在透明石英玻璃基板上形成硅化物膜的步骤，其中包含两种或更多种金属元素的合金被硅化。 将抗蚀剂施加到硅化物膜上，然后通过光或电子束提供图案掩模，随后显影步骤。 使用干蚀刻工艺蚀刻掉硅化物膜的暴露部分。

公开(公告)号：US20060231936A1

公开(公告)日：2006-10-19

申请号：US11447148

申请日：2006-06-06

申请人： Shuichi Matsuda

发明人： Shuichi Matsuda

IPC分类号： H01L23/02

CPC分类号： H01L21/565 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/49171 ,  H01L2224/4943 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/014 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A semiconductor device having a molded sealing resin for sealing a semiconductor chip on a circuit board thereof reduces resin burrs resulting from the leakage of the sealing resin, and also restrains the occurrence of disconnection caused by a wiring layer being crushed. In the semiconductor device, the sealing resin for sealing the semiconductor chip is molded on the circuit board that has a plurality of wiring patterns and a solder resist for insulatively covering the wiring patterns formed on the front surface thereof, the interval of the wiring patterns is set to range from 50% to 200% of its adjacent interval in a molding line area of the sealing resin.

公开(公告)号：US5905303A

公开(公告)日：1999-05-18

申请号：US873593

申请日：1997-06-12

申请人： Keiichiro Kata ,  Shuichi Matsuda ,  Eiji Hagimoto

发明人： Keiichiro Kata ,  Shuichi Matsuda ,  Eiji Hagimoto

IPC分类号： H01L21/60 ,  H01L23/12 ,  H01L23/31 ,  H01L23/498 ,  H01L23/48

CPC分类号： H01L23/4985 ,  H01L23/3107 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/83191 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15151 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/3025 ,  Y10T29/49121

摘要： An insulating film has conductive layers on a first surface and conductive protrusions on a second surface. The conductive layers are connected to the conductive protrusions via through holes provided in the insulating film. A semiconductor chip having pads is adhered by an adhesive layer to the insulating film. Then, the conductive layers are locally pressured, so that the conductive layers are electrically connected to respective ones of the pads.

摘要翻译： 绝缘膜在第一表面上具有导电层，在第二表面上具有导电突起。 导电层通过设置在绝缘膜中的通孔与导电突起连接。 具有焊盘的半导体芯片通过粘合剂层粘附到绝缘膜。 然后，导电层被局部加压，使得导电层电连接到相应的焊盘。