公开(公告)号：US06403923B1

公开(公告)日：2002-06-11

申请号：US09648839

申请日：2000-08-25

申请人： Sing Pin Tay ,  Yao Zhi Hu ,  Randhir P. S. Thakur ,  Arnon Gat

发明人： Sing Pin Tay ,  Yao Zhi Hu ,  Randhir P. S. Thakur ,  Arnon Gat

IPC分类号： F27B514

CPC分类号： H01L21/67115

摘要： A system and process is disclosed for rapidly heating semiconductor wafers coated with a highly reflective material on either the whole wafer or in a patterned area. The wafers are heated in a thermal processing chamber by a plurality of lamps. In order for the wafer coated with the highly reflective material to more rapidly increase in temperature with lower power intensity, a shield member is placed in between the wafer and the plurality of lamps. The shield member is made from a high emissivity material, such as ceramic, that increases in temperature when exposed to light energy. Once heated, the shield member then in turn heats the semiconductor wafer with higher uniformity. In one embodiment, the shield member can also be used to determine the temperature of the wafer as it is heated.

摘要翻译： 公开了一种用于在整个晶片上或在图案化区域中快速加热涂覆有高反射材料的半导体晶片的系统和工艺。 晶片在热处理室中被多个灯加热。 为了使涂覆有高反射材料的晶片以更低的功率强度更快地升高温度，屏蔽部件被放置在晶片和多个灯之间。 屏蔽构件由高辐射率材料（例如陶瓷）制成，当暴露于光能时其温度升高。 一旦加热，屏蔽构件又进一步以更高的均匀性加热半导体晶片。 在一个实施例中，屏蔽构件也可用于确定晶片在被加热时的温度。

公开(公告)号：US06359263B2

公开(公告)日：2002-03-19

申请号：US09390305

申请日：1999-09-03

申请人： Sing Pin Tay ,  Yao Zhi Hu ,  Randhir P. S. Thakur ,  Arnon Gat

发明人： Sing Pin Tay ,  Yao Zhi Hu ,  Randhir P. S. Thakur ,  Arnon Gat

IPC分类号： A21B100

CPC分类号： H01L21/67115

摘要： A system and process is disclosed for rapidly heating semiconductor wafers coated with a highly reflective material on either the whole wafer or in a patterned area. The wafers are heated in a thermal processing chamber by a plurality of lamps. In order for the wafer coated with the highly reflective material to more rapidly increase in temperature with lower power intensity, a shield member is placed in between the wafer and the plurality of lamps. The shield member is made from a high emissivity material, such as ceramic, that increases in temperature when exposed to light energy. Once heated, the shield member then in turn heats the semiconductor wafer with higher uniformity. In one embodiment, the shield member can also be used to determine the temperature of the wafer as it is heated.

公开(公告)号：US06200023B1

公开(公告)日：2001-03-13

申请号：US09270475

申请日：1999-03-15

申请人： Sing Pin Tay ,  Yao Zhi Hu ,  Randhir P. S. Thakur

发明人： Sing Pin Tay ,  Yao Zhi Hu ,  Randhir P. S. Thakur

IPC分类号： G01K1100

CPC分类号： G01K11/00

摘要： A system and method for determining the temperature of substrates in a thermal processing chamber in the presence of either an oxidizing atmosphere or a reducing atmosphere is disclosed. Specifically, temperature determinations made in accordance with the present invention are generally for calibrating other temperature sensing devices that may be used in conjunction with the thermal processing chamber. The method of the present invention is generally directed to heating a substrate containing a reactive coating within a thermal processing chamber in an oxidizing atmosphere or reducing atmosphere. As the wafer is heated, the reactive coating reacts with gases contained within the chamber based upon the temperature to which the substrate is exposed. After heated, the thickness of any coating that is formed on the substrate is then measured for determining the temperature to which the substrate was heated. This information can then be used to calibrate other temperature sensing devices, such as thermocouples and pyrometers.

摘要翻译： 公开了一种用于在存在氧化气氛或还原气氛的情况下确定热处理室中的衬底的温度的系统和方法。 具体来说，根据本发明制成的温度通常用于校准可与热处理室结合使用的其它温度感测装置。 本发明的方法一般涉及在氧化气氛或还原性气氛中加热在热处理室内含有反应性涂层的基材。 当晶片被加热时，反应性涂层基于衬底暴露的温度与包含在腔室内的气体反应。 加热后，测量形成在基板上的任何涂层的厚度，以确定衬底被加热到的温度。 此信息可用于校准其他温度传感设备，如热电偶和高温计。

公开(公告)号：US20110263068A1

公开(公告)日：2011-10-27

申请号：US13087823

申请日：2011-04-15

申请人： KAUSHAL K. SINGH ,  Robert Visser ,  Vijay Parihar ,  Randhir P. S. Thakur

发明人： KAUSHAL K. SINGH ,  Robert Visser ,  Vijay Parihar ,  Randhir P. S. Thakur

IPC分类号： H01L31/18

CPC分类号： H01L31/02366 ,  H01L31/055 ,  H01L31/056 ,  H01L31/075 ,  H01L31/076 ,  Y02E10/52 ,  Y02E10/548

摘要： Embodiments of the invention generally relate to solar cell devices and methods for manufacturing such solar cell devices. In one embodiment, a method for forming a solar cell device includes depositing a conversion layer over a first surface of a substrate, depositing a first transparent conductive oxide layer over a second surface of the substrate that is opposite the first surface, depositing a first p-doped silicon layer over the first transparent conductive oxide layer, depositing a first intrinsic silicon layer over the first p-doped silicon layer, and depositing a first n-doped silicon layer over the first intrinsic silicon layer. The method further includes depositing a second transparent conductive oxide layer over the first n-doped silicon layer, and depositing an electrically conductive contact layer over the second transparent conductive oxide layer.

摘要翻译： 本发明的实施例一般涉及用于制造这种太阳能电池装置的太阳能电池装置和方法。 在一个实施例中，一种用于形成太阳能电池器件的方法包括在衬底的第一表面上沉积转换层，在衬底的与第一表面相对的第二表面上沉积第一透明导电氧化物层，沉积第一p 在第一透明导电氧化物层之上的掺杂硅层，在第一p掺杂硅层上沉积第一本征硅层，以及在第一本征硅层上沉积第一n掺杂硅层。 该方法还包括在第一n掺杂硅层上沉积第二透明导电氧化物层，以及在第二透明导电氧化物层上沉积导电接触层。

公开(公告)号：US07232728B1

公开(公告)日：2007-06-19

申请号：US08593949

申请日：1996-01-30

申请人： Ruojia R. Lee ,  Randhir P. S. Thakur

发明人： Ruojia R. Lee ,  Randhir P. S. Thakur

IPC分类号： H01L21/336

CPC分类号： H01L29/66651 ,  H01L21/28167 ,  H01L21/28211

摘要： This invention improves the quality of gate oxide dielectric layers using a two-pronged approach, thus permitting the use of much thinner silicon dioxide gate dielectric layers required for lower-voltage, ultra-dense integrated circuits. In order to eliminate defects caused by imperfections in bulk silicon, an in-situ grown epitaxial layer is formed on active areas following a strip of the pad oxide layer used beneath the silicon nitride islands used for masking during the field oxidation process. By growing an epitaxial silicon layer prior to gate dielectric layer formation, defects in the bulk silicon substrate are covered over and, hence, isolated from the oxide growth step. In order to maintain the integrity of the selective epitaxial growth step, the wafers are maintained in a controlled, oxygen-free environment until the epitaxial growth step is accomplished. In order to eliminate defects caused by a native oxide layer, the wafers are maintained in a controlled, oxygen-free environment until being subjected to elevated temperature in a controlled, oxidizing environment. In one embodiment, the oxidizing environment comprises diatomic oxygen, while in another embodiment, the oxidizing environment comprises diatomic oxygen and ozone.

摘要翻译： 本发明使用双管齐下的方法提高了栅极氧化物电介质层的质量，从而允许使用更低的，超低密度集成电路所需的更薄的二氧化硅栅介质层。 为了消除体硅缺陷引起的缺陷，在场氧化工艺中用于掩蔽的氮化硅岛下方的氧化硅层之后的有源区上形成原位生长的外延层。 通过在栅极介电层形成之前生长外延硅层，将体硅衬底中的缺陷覆盖并因此从氧化物生长步骤中分离。 为了保持选择性外延生长步骤的完整性，将晶片保持在受控的无氧环境中，直到外延生长步骤完成。 为了消除由自然氧化物层引起的缺陷，将晶片保持在受控制的无氧环境中，直到在受控的氧化环境中经历升高的温度。 在一个实施方案中，氧化环境包括双原子氧，而在另一个实施方案中，氧化环境包括双原子氧和臭氧。

公开(公告)号：US07205600B2

公开(公告)日：2007-04-17

申请号：US10223805

申请日：2002-08-19

申请人： Vishnu K. Agarwal ,  F. Daniel Gealy ,  Kunal R. Parekh ,  Randhir P. S. Thakur

发明人： Vishnu K. Agarwal ,  F. Daniel Gealy ,  Kunal R. Parekh ,  Randhir P. S. Thakur

IPC分类号： H01L27/108 ,  H01L29/76

CPC分类号： H01L28/40 ,  H01L21/76828 ,  H01L21/76829 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/76838 ,  H01L23/5222 ,  H01L28/57 ,  H01L28/84 ,  H01L28/91 ,  H01L2924/0002 ,  H01L2924/00

摘要： A capacitor forming method can include forming an insulation layer over a substrate and forming a barrier layer to threshold voltage shift inducing material over the substrate. An opening can be formed at least into the insulation layer and a capacitor dielectric layer formed at least within the opening. Threshold voltage inducing material can be provided over the barrier layer but be retarded in movement into an electronic device comprised by the substrate. The dielectric layer can comprise a tantalum oxide and the barrier layer can include a silicon nitride. Providing threshold voltage shift inducing material can include oxide annealing dielectric layer such as with N2O. The barrier layer can be formed over the insulation layer, the insulation layer can be formed over the barrier layer, or the barrier layer can be formed over a first insulation layer with a second insulation layer formed over the barrier layer. Further, the barrier layer can be formed after forming the capacitor electrode or after forming the dielectric layer, for example, by using poor step coverage deposition methods.

摘要翻译： 电容器形成方法可以包括在衬底上形成绝缘层，并在衬底上形成阈值电压移动诱导材料的势垒层。 开口可以至少形成在绝缘层中，并且至少形成在开口内形成电容器电介质层。 阈值电压诱导材料可以设置在阻挡层之上，但是在运动中被延迟到由衬底包括的电子器件中。 电介质层可以包括氧化钽，并且阻挡层可以包括氮化硅。 提供阈值电压移动诱导材料可以包括氧化物退火介质层，例如N 2 O 2。 可以在绝缘层上形成阻挡层，可以在阻挡层上形成绝缘层，或者可以在第一绝缘层上形成阻挡层，在隔离层上形成第二绝缘层。 此外，阻挡层可以在形成电容器电极之后或在形成介电层之后形成，例如通过使用差的阶梯覆盖沉积方法。

公开(公告)号：US07175713B2

公开(公告)日：2007-02-13

申请号：US10352257

申请日：2003-01-27

申请人： Randhir P. S. Thakur ,  Alfred W. Mak ,  Ming Xi ,  Walter Benjamin Glenn ,  Ahmad A. Khan ,  Ayad A. Al-Shaikh ,  Avgerinos V. Gelatos ,  Salvador P. Umotoy

发明人： Randhir P. S. Thakur ,  Alfred W. Mak ,  Ming Xi ,  Walter Benjamin Glenn ,  Ahmad A. Khan ,  Ayad A. Al-Shaikh ,  Avgerinos V. Gelatos ,  Salvador P. Umotoy

IPC分类号： C23C16/00 ,  C23C16/503 ,  C23C16/505 ,  C23C16/50 ,  C23F1/00 ,  H01L21/306

CPC分类号： C23C16/45544 ,  C23C16/4412 ,  C23C16/452 ,  C23C16/45536 ,  C23C16/45565 ,  C23C16/45582 ,  H01J37/32009 ,  H01J37/32091 ,  H01J37/3244 ,  H01J37/32834 ,  H01L21/6719

摘要： An apparatus for cyclical depositing of thin films on semiconductor substrates, comprising a process chamber having a gas distribution system with separate paths for process gases and an exhaust system synchronized with operation of valves dosing the process gases into a reaction region of the chamber.

摘要翻译： 一种用于在半导体衬底上循环沉积薄膜的装置，包括具有气体分配系统的处理室，该气体分配系统具有用于处理气体的独立路径，以及与将所述工艺气体计量到所述室的反应区域的阀的操作同步的排气系统。

公开(公告)号：US07034353B2

公开(公告)日：2006-04-25

申请号：US09965240

申请日：2001-09-26

申请人： Randhir P. S. Thakur ,  Garry A. Mercaldi ,  Michael Nuttall ,  Shenlin Chen ,  Er-Xuan Ping

发明人： Randhir P. S. Thakur ,  Garry A. Mercaldi ,  Michael Nuttall ,  Shenlin Chen ,  Er-Xuan Ping

IPC分类号： H01L27/108 ,  H01L29/76 ,  H01L29/94 ,  H01L31/119

CPC分类号： G11C11/404 ,  G11C17/16 ,  H01L21/28568 ,  H01L21/76888 ,  H01L27/1085 ,  H01L27/10852 ,  H01L27/11502 ,  H01L27/11507 ,  H01L28/60 ,  H01L28/82 ,  H01L28/84

摘要： Structures and methods for making a semiconductor structure are discussed. The semiconductor structure includes a rough surface having protrusions formed from an undoped silicon film. If the semiconductor structure is a capacitor, the protrusions help to increase the capacitance of the capacitor. The semiconductor structure also includes a relatively smooth surface abutting the rough surface, wherein the relatively smooth surface is formed from a polycrystalline material.

公开(公告)号：US07009264B1

公开(公告)日：2006-03-07

申请号：US08902809

申请日：1997-07-30

申请人： Klaus Florian Schuegraf ,  Scott Jeffrey DeBoer ,  Randhir P. S. Thakur

发明人： Klaus Florian Schuegraf ,  Scott Jeffrey DeBoer ,  Randhir P. S. Thakur

IPC分类号： H01L29/76

CPC分类号： H01L29/6656 ,  H01L21/28247 ,  H01L21/31683 ,  H01L21/32 ,  Y10S257/90

摘要： A selective spacer to prevent metal oxide formation during polycide reoxidation of a feature such as an electrode and a method for forming the selective spacer are disclosed. A material such as a thin silicon nitride or an amorphous silicon film is selectively deposited on the electrode by limiting deposition time to a period less than an incubation time for the material on silicon dioxide near the electrode. The spacer is deposited only on the electrode and not on surrounding silicon dioxide. The spacer serves as a barrier for the electrode during subsequent oxidation to prevent metal oxide formation while allowing oxidation to take place over the silicon dioxide.

摘要翻译： 公开了一种用于防止诸如电极的特征（例如电极）的聚合物再氧化期间的金属氧化物形成的选择性间隔物和用于形成选择性间隔物的方法。 将诸如薄氮化硅或非晶硅膜的材料通过将沉积时间限制在电极附近的二氧化硅上的材料的温育时间以下来选择性地沉积在电极上。 间隔物仅沉积在电极上而不是沉积在周围的二氧化硅上。 间隔物在随后的氧化期间用作电极的屏障，以防止金属氧化物形成，同时允许氧化发生在二氧化硅上。

公开(公告)号：US06879044B2

公开(公告)日：2005-04-12

申请号：US10782685

申请日：2004-02-19

申请人： Randhir P. S. Thakur

发明人： Randhir P. S. Thakur

IPC分类号： H01L21/285 ,  H01L21/768 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L21/76831 ,  H01L21/28525 ,  H01L21/76802 ,  H01L21/76843 ,  H01L21/76855 ,  H01L21/76862 ,  H01L21/76864 ,  H01L21/76879 ,  H01L2924/0002 ,  Y10S257/915 ,  H01L2924/00

摘要： A new method and structure for an improved contact using doped silicon is provided. The structures are integrated into several higher level embodiments. The improved contact has low contact resistivity. Improved junctions are thus provided between an IGFET device and subsequent metallization layers. The improvements are obtained through the use of a silicon-germanium (Si—Ge) alloy. The alloy can be formed from depositing germanium onto the substrate and subsequently annealing the contact or by selectively depositing the preformed alloy into a contact opening. The above advantages are incorporated with relatively few process steps.

摘要翻译： 提供了一种使用掺杂硅改善接触的新方法和结构。 这些结构被集成到几个较高级别的实施例中。 改进的接触具有低接触电阻率。 因此，在IGFET器件和随后的金属化层之间提供改进的结。 通过使用硅 - 锗（Si-Ge）合金获得改进。 该合金可以通过将锗沉积到基底上并随后对接触进行退火或通过选择性地将预成型合金沉积到接触开口中而形成。 上述优点结合相对较少的工艺步骤。