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    THIN FILMS
    4.
    发明申请
    THIN FILMS 审中-公开
    薄膜

    公开(公告)号：US20110256718A1

    公开(公告)日：2011-10-20

    申请号：US13079562

    申请日：2011-04-04

    申请人： Suvi P. Haukka ,  Ivo Raaijmakers ,  Wei Min Li ,  Juhana Kostamo ,  Hessel Sprey ,  Christiaan J. Werkhoven

    发明人： Suvi P. Haukka ,  Ivo Raaijmakers ,  Wei Min Li ,  Juhana Kostamo ,  Hessel Sprey ,  Christiaan J. Werkhoven

    IPC分类号： H01L21/285

    CPC分类号： C23C16/029 ,  C23C16/34 ,  C23C16/401 ,  C23C16/403 ,  C23C16/405 ,  C23C16/452 ,  C23C16/45529 ,  C23C16/45531 ,  C23C16/45534 ,  C30B25/14 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/02189 ,  H01L21/02194 ,  H01L21/022 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/28562 ,  H01L21/3141 ,  H01L21/3145 ,  H01L21/31612 ,  H01L21/3162 ,  H01L21/31641 ,  H01L21/3185 ,  H01L21/76846 ,  H01L21/76873 ,  H01L21/76879 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L2221/1089

    摘要： Thin films are formed by formed by atomic layer deposition, whereby the composition of the film can be varied from monolayer to monolayer during cycles including alternating pulses of self-limiting chemistries. In the illustrated embodiments, varying amounts of impurity sources are introduced during the cyclical process. A graded gate dielectric is thereby provided, even for extremely thin layers. The gate dielectric as thin as 2 nm can be varied from pure silicon oxide to oxynitride to silicon nitride. Similarly, the gate dielectric can be varied from aluminum oxide to mixtures of aluminum oxide and a higher dielectric material (e.g., ZrO2) to pure high k material and back to aluminum oxide. In another embodiment, metal nitride (e.g., WN) is first formed as a barrier for lining dual damascene trenches and vias. During the alternating deposition process, copper can be introduced, e.g., in separate pulses, and the copper source pulses can gradually increase in frequency, forming a transition region, until pure copper is formed at the upper surface. Advantageously, graded compositions in these and a variety of other contexts help to avoid such problems as etch rate control, electromigration and non-ohmic electrical contact that can occur at sharp material interfaces. In some embodiments additional seed layers or additional transition layers are provided.

    摘要翻译： 通过原子层沉积形成薄膜，由此膜的组成可以在包括自限制化学的交替脉冲的循环期间从单层变为单层。 在所示实施例中，在循环过程中引入了不同量的杂质源。 因此，即使对于非常薄的层也提供了梯度栅极电介质。 薄的2nm的栅极电介质可以从纯氧化硅到氧氮化物变化为氮化硅。 类似地，栅极电介质可以从氧化铝变化为氧化铝和较高电介质材料（例如，ZrO 2）到纯高k材料并返回到氧化铝的混合物。 在另一个实施例中，金属氮化物（例如，WN）首先形成为用于衬里双镶嵌沟槽和通孔的屏障。 在交替沉积工艺期间，铜可以被引入，例如分开的脉冲，并且铜源脉冲可以逐渐增加频率，形成过渡区域，直到在上表面形成纯铜。 有利的是，这些和各种其他情况下的分级组合物有助于避免诸如在尖锐材料界面处可能发生的蚀刻速率控制，电迁移和非欧姆电接触等问题。 在一些实施例中，提供了额外的种子层或附加的过渡层。

    Thin films
    5.
    发明授权
    Thin films 有权
    薄膜

    公开(公告)号：US07419903B2

    公开(公告)日：2008-09-02

    申请号：US11106220

    申请日：2005-04-13

    申请人： Suvi P. Haukka ,  Ivo Raaijmakers ,  Wei Min Li ,  Juhana Kostamo ,  Hessel Sprey

    发明人： Suvi P. Haukka ,  Ivo Raaijmakers ,  Wei Min Li ,  Juhana Kostamo ,  Hessel Sprey

    IPC分类号： H01L21/4763

    CPC分类号： C23C16/029 ,  C23C16/34 ,  C23C16/401 ,  C23C16/403 ,  C23C16/405 ,  C23C16/452 ,  C23C16/45529 ,  C23C16/45531 ,  C23C16/45534 ,  C30B25/14 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/02189 ,  H01L21/02194 ,  H01L21/022 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/28562 ,  H01L21/3141 ,  H01L21/3145 ,  H01L21/31612 ,  H01L21/3162 ,  H01L21/31641 ,  H01L21/3185 ,  H01L21/76846 ,  H01L21/76873 ,  H01L21/76879 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L2221/1089

    摘要： Thin films are formed by formed by atomic layer deposition, whereby the composition of the film can be varied from monolayer to monolayer during cycles including alternating pulses of self-limiting chemistries. In the illustrated embodiments, varying amounts of impurity sources are introduced during the cyclical process. A graded gate dielectric is thereby provided, even for extremely thin layers. The gate dielectric as thin as 2 nm can be varied from pure silicon oxide to oxynitride to silicon nitride. Similarly, the gate dielectric can be varied from aluminum oxide to mixtures of aluminum oxide and a higher dielectric material (e.g., ZrO2) to pure high k material and back to aluminum oxide. In another embodiment, metal nitride (e.g., WN) is first formed as a barrier for lining dual damascene trenches and vias. During the alternating deposition process, copper can be introduced, e.g., in separate pulses, and the copper source pulses can gradually increase in frequency, forming a transition region, until pure copper is formed at the upper surface. Advantageously, graded compositions in these and a variety of other contexts help to avoid such problems as etch rate control, electromigration and non-ohmic electrical contact that can occur at sharp material interfaces. In some embodiments additional seed layers or additional transition layers are provided.

    摘要翻译： 通过原子层沉积形成薄膜，由此膜的组成可以在包括自限制化学的交替脉冲的循环期间从单层变为单层。 在所示实施例中，在循环过程中引入了不同量的杂质源。 因此，即使对于非常薄的层也提供了渐变栅极电介质。 薄的2nm的栅极电介质可以从纯氧化硅到氧氮化物变化为氮化硅。 类似地，栅极电介质可以从氧化铝到氧化铝和较高介电材料（例如ZrO 2）的混合物变化为纯高k材料并返回到氧化铝。 在另一个实施例中，金属氮化物（例如，WN）首先形成为用于衬里双镶嵌沟槽和通孔的屏障。 在交替沉积工艺期间，铜可以被引入，例如分开的脉冲，并且铜源脉冲可以逐渐增加频率，形成过渡区域，直到在上表面形成纯铜。 有利的是，这些和各种其他情况下的分级组合物有助于避免诸如在尖锐材料界面处可能发生的蚀刻速率控制，电迁移和非欧姆电接触等问题。 在一些实施例中，提供了额外的种子层或附加的过渡层。