Reactor control rod element
    1.
    发明授权
    Reactor control rod element 有权
    反应器控制棒元件

    公开(公告)号:US5946367A

    公开(公告)日:1999-08-31

    申请号:US209476

    申请日:1998-12-11

    IPC分类号: G21C7/10 G21C7/24

    CPC分类号: G21C7/10 Y02E30/39

    摘要: A neutron absorbing pin including at least, a neutron absorber, a thin-wall pipe surrounding the neutron absorber, and a cladding disposed at a distance from the thin-wall pipe. In the neutron absorbing pin, the difference between the coefficient of thermal expansion (.alpha.1) of the neutron absorber and the coefficient of thermal expansion (.alpha.2) of the thin-wall pipe has an absolute value of .vertline..alpha.2-.alpha.1.vertline..ltoreq.10.times.10.sup.-6 /K.

    摘要翻译: 至少包括中子吸收体,围绕中子吸收体的薄壁管以及与薄壁管一定距离设置的包层的中子吸收针。 在中子吸收销中,中子吸收器的热膨胀系数(α1)与薄壁管的热膨胀系数(α2)之间的差异绝对值为| α2-α1 |

    METHOD FOR DETACHMENT AND PREPARATION OF LIVING MICROORGANISMS
    6.
    发明申请
    METHOD FOR DETACHMENT AND PREPARATION OF LIVING MICROORGANISMS 有权
    生活微生物的分离和制备方法

    公开(公告)号:US20130196404A1

    公开(公告)日:2013-08-01

    申请号:US13359797

    申请日:2012-01-27

    IPC分类号: C12N13/00

    CPC分类号: C12N13/00 C12N11/14

    摘要: A method for immobilizing living microorganisms includes a step (1) of disposing a solution containing microorganisms as an electrolyte on the surface of a substrate at least one portion of which is an electrode, and applying a constant potential to the electrode to cause at least a portion of the microorganisms to attach to the surface of the substrate. The constant potential in step (1) is greater than −0.5 V but not greater than −0.2 V (vs Ag/AgCl) or greater than +0.2 V but not greater than +0.4 V (vs Ag/AgCl). The electrolyte in step (1) does not contain a source of nutrition for the microorganisms.

    摘要翻译: 固定活体微生物的方法包括将含有微生物作为电解质的溶液设置在基材的表面上的步骤(1),其中至少一部分是电极,并向电极施加恒定电位,使至少 部分微生物附着到基底表面。 步骤(1)中的恒定电位大于-0.5V但不大于-0.2V(相对于Ag / AgCl)或大于+ 0.2V但不大于+0.4V(相对于Ag / AgCl)。 步骤(1)中的电解质不含微生物的营养来源。

    Nonvolatile semiconductor memory circuit including a reliable sense
amplifier
    7.
    发明授权
    Nonvolatile semiconductor memory circuit including a reliable sense amplifier 失效
    非易失性半导体存储器电路,包括可靠的感测放大器

    公开(公告)号:US5058062A

    公开(公告)日:1991-10-15

    申请号:US431845

    申请日:1989-11-06

    CPC分类号: G11C16/28 G11C7/065

    摘要: A nonvolatile memory device has a memory cell having its gate connected to a word line, its source connected to a ground potential and its drain connected to a power supply voltage via a bit line and a dummy cell having its gate connected to the word line, its source connected to the source potential and its drain connected to the power supply voltage via a dummy bit line. The bit line and the dummy bit line are connected to reset and set terminals of a sense amplifier circuit comprising a flip-flop circuit and a latch type of sense amplifier. The conductance of the dummy cell is made smaller than that of the memory cell so that the speed at which the potential on the bit line is lowered depends on the state of injection of electrons into the memory cell as compared with the speed at which the potential on the dummy bit line at a time of reading data. The flip-flop circuit is reset or set in accordance with the speed at which the potential on the bit line is lowered and then the latch type of sense amplifier operates to latch the output of the flip-flop circuit and output it as read data.

    Semiconductor memory integrated circuit
    10.
    发明授权
    Semiconductor memory integrated circuit 失效
    半导体存储器集成电路

    公开(公告)号:US5065361A

    公开(公告)日:1991-11-12

    申请号:US446003

    申请日:1989-12-05

    CPC分类号: G11C16/08 G11C16/30

    摘要: A semiconductor memory integrated circuit is made up of a decoder, a memory matrix, and a decode output buffer selectively receiving a first or second power source voltage. The decode output buffer is provided between the decoder and the memory matrix, and includes an inverter circuit for inverting the output signal of the decoder, and a MOS transistor of a depletion mode, the gate of which is connected to the output terminal of the inverter, the first end of which is connected to a supply node of the first or second power source voltage, and the second end of which is connected to a power voltage supply node of the inverter circuit.