公开(公告)号：US06693350B2

公开(公告)日：2004-02-17

申请号：US10321365

申请日：2002-12-18

申请人： Takanori Teshima ,  Yutaka Fukuda ,  Yoshimi Nakase ,  Kuniaki Mamitsu ,  Tomoatsu Makino

发明人： Takanori Teshima ,  Yutaka Fukuda ,  Yoshimi Nakase ,  Kuniaki Mamitsu ,  Tomoatsu Makino

IPC分类号： H01L2334

CPC分类号： H01L24/33 ,  H01L23/3135 ,  H01L23/4334 ,  H01L24/32 ,  H01L24/48 ,  H01L2224/05599 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device includes a first conductive member, a second conductive member, a semiconductor chip, which is located between the conductive members, a bonding member, which is located between the first conductive member and the semiconductor chip, another bonding member, which is located between the second conductive member and the semiconductor chip, a molding resin, which is located between the first and second conductive members to seal the semiconductor chip, and a bonding member anti-sticking means, which is located between the molding resin and a surface of one member selected from the group consisting of the semiconductor chip and the conductive members. The bonding member anti-sticking means prevents the bonding members from sticking to the surface in the manufacturing process. As a result, the otherwise insufficient connection due to the sticking between the molding resin and the surface is improved, and the semiconductor device becomes durable in electric performance.

摘要翻译： 半导体器件包括第一导电构件，第二导电构件，位于导电构件之间的半导体芯片，位于第一导电构件和半导体芯片之间的接合构件，位于 在第二导电构件和半导体芯片之间，位于第一导电构件和第二导电构件之间以密封半导体芯片的模制树脂以及位于模制树脂和表面之间的接合构件防粘装置 选自由半导体芯片和导电构件组成的组中的一个构件。 接合构件防粘装置在制造过程中防止接合构件粘附到表面。 结果，由于模塑树脂和表面之间的粘附而导致的不充分的连接得到改善，并且半导体器件在电气性能方面变得耐用。

公开(公告)号：US06703707B1

公开(公告)日：2004-03-09

申请号：US09717227

申请日：2000-11-22

申请人： Kuniaki Mamitsu ,  Yasuyoshi Hirai ,  Kazuhito Nomura ,  Yutaka Fukuda ,  Kazuo Kajimoto ,  Takeshi Miyajima ,  Tomoatsu Makino ,  Yoshimi Nakase

发明人： Kuniaki Mamitsu ,  Yasuyoshi Hirai ,  Kazuhito Nomura ,  Yutaka Fukuda ,  Kazuo Kajimoto ,  Takeshi Miyajima ,  Tomoatsu Makino ,  Yoshimi Nakase

IPC分类号： H01L2334

CPC分类号： H01L24/33 ,  H01L23/051 ,  H01L23/4006 ,  H01L23/4334 ,  H01L24/32 ,  H01L24/37 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/05599 ,  H01L2224/291 ,  H01L2224/29111 ,  H01L2224/29116 ,  H01L2224/2929 ,  H01L2224/29299 ,  H01L2224/29386 ,  H01L2224/32245 ,  H01L2224/33 ,  H01L2224/37147 ,  H01L2224/40137 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2224/85399 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/0101 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01052 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01061 ,  H01L2924/01068 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01084 ,  H01L2924/01094 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/07811 ,  H01L2924/10253 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/30107 ,  H01L2924/351 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/0665 ,  H01L2924/05442 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device includes two semiconductor chips that are interposed between a pair of radiation members, and thermally and electrically connected to the radiation members. One of the radiation members has two protruding portions and front ends of the protruding portions are connected to principal electrodes of the semiconductor chips. The radiation members are made of a metallic material containing Cu or Al as a main component. The semiconductor chips and the radiation members are sealed with resin with externally exposed radiation surfaces.

摘要翻译： 半导体器件包括插入在一对辐射构件之间并且热和电连接到辐射构件的两个半导体芯片。 辐射部件中的一个具有两个突出部分，并且突出部分的前端连接到半导体芯片的主电极。 辐射构件由含有Cu或Al作为主要成分的金属材料制成。 半导体芯片和辐射构件用具有外部暴露的辐射表面的树脂密封。

公开(公告)号：US06717785B2

公开(公告)日：2004-04-06

申请号：US09819715

申请日：2001-03-29

申请人： Yutaka Fukuda ,  Ryoichi Okuda ,  Tomoatsu Makino ,  Kenji Yagi ,  Yukio Tsuzuki

发明人： Yutaka Fukuda ,  Ryoichi Okuda ,  Tomoatsu Makino ,  Kenji Yagi ,  Yukio Tsuzuki

IPC分类号： H02H308

CPC分类号： H03K17/0828 ,  H03K17/168

摘要： A semiconductor switching element driving circuit comprises an overcurrent limiting circuit which instantaneously drops a voltage of a gate terminal of an IGBT when a main IGBT current becomes larger than a predetermined level i1. An overcurrent protection circuit which first decreases the main IGBT current at a first inclination when the main IGBT current becomes larger than the other level i2 lower than the i1 and then reduces the main IGBT current at a steep second inclination when it becomes smaller than another level i3.

摘要翻译： 半导体开关元件驱动电路包括当主IGBT电流变得大于预定电平i1时瞬时降低IGBT的栅极端子的电压的过电流限制电路。 一个过电流保护电路，当主IGBT电流变得大于比i1低的另一个电平i2时，首先降低主IGBT电流，然后当其变得小于另一个电平时，以较陡峭的第二倾斜度降低主IGBT电流 i3。

公开(公告)号：US4225796A

公开(公告)日：1980-09-30

申请号：US967497

申请日：1978-12-07

申请人： Tomoatsu Makino ,  Yoshio Hirano ,  Katsuteru Miwa

发明人： Tomoatsu Makino ,  Yoshio Hirano ,  Katsuteru Miwa

IPC分类号： G01D5/12 ,  G01R23/06 ,  G08C19/02 ,  H03K9/06 ,  H03K1/08

CPC分类号： G01R23/06

摘要： A frequency-to-current conversion circuit comprises a charge/discharge circuit for charging or discharging with a first constant current in synchronism with each cycle of an input pulse signal having a varying frequency, a voltage comparison circuit for detecting a predetermined voltage attained by the charge/discharge circuit at the expiration of a predetermined time interval dependent on the value of the first constant current from the beginning of the charge or discharge, and an output circuit for receiving the output signal of the voltage comparison circuit as well as the input pulse signal to generate a second constant current during the predetermined time interval in synchronism with each cycle of the input pulse signal.

摘要翻译： 频率 - 电流转换电路包括用于与具有变化频率的输入脉冲信号的每个周期同步地以第一恒定电流进行充电或放电的充电/放电电路，用于检测由所述电压获得的预定电压的电压比较电路 充电/放电电路根据从充电或放电开始的第一恒定电流的值预定的时间间隔期满;以及输出电路，用于接收电压比较电路的输出信号以及输入脉冲 信号以在与输入脉冲信号的每个周期同步的预定时间间隔期间产生第二恒定电流。

公开(公告)号：US20070013412A1

公开(公告)日：2007-01-18

申请号：US11472547

申请日：2006-06-22

申请人： Shoichi Yamauchi ,  Tomoatsu Makino ,  Makoto Kuwahara ,  Yoshiyuki Hattori

发明人： Shoichi Yamauchi ,  Tomoatsu Makino ,  Makoto Kuwahara ,  Yoshiyuki Hattori

IPC分类号： H03K19/091

CPC分类号： H01L29/7811 ,  H01L29/0634 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/41741 ,  H01L29/66734 ,  H01L29/7813 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes: a cell region; a terminal region; a lower semiconductor layer; a intermediate semiconductor layer on the lower semiconductor layer including a super junction structure; a terminal upper semiconductor layer on the intermediate semiconductor layer; a terminal contact semiconductor region on a surface portion of the terminal upper semiconductor layer adjacent to the cell region; an insulation layer on the terminal upper semiconductor layer having a first part adjacent to the cell region with a small thickness and a second part adjacent to the first part with a large thickness; and a conductive layer in the cell region and a part of the terminal region, the conductive layer extending from the cell region to the part of the terminal region beyond the first part of the insulation layer.

摘要翻译： 半导体器件包括：单元区域; 终端区域 下半导体层; 包括超级结结构的下半导体层上的中间半导体层; 中间半导体层上的端子上半导体层; 在所述端子上半导体层的与所述单元区域相邻的表面部分上的端子接触半导体区域; 端子上半导体层上的绝缘层具有邻近具有小厚度的单元区域的第一部分和与厚度较大的第一部分相邻的第二部分; 以及在所述单元区域和所述端子区域的一部分中的导电层，所述导电层从所述单元区域延伸到所述绝缘层的所述第一部分之外的所述端子区域的所述部分。

公开(公告)号：US4492213A

公开(公告)日：1985-01-08

申请号：US577316

申请日：1984-02-06

申请人： Noboru Yamamoto ,  Ryoichi Okuda ,  Tomoatsu Makino

发明人： Noboru Yamamoto ,  Ryoichi Okuda ,  Tomoatsu Makino

IPC分类号： F02P3/05 ,  F02P15/12 ,  F02P1/00

CPC分类号： F02P3/051 ,  F02P15/12

摘要： An improved ignition system for internal combustion engines including a constant current control circuit for effecting constant current control of an ignition coil primary current, further includes a compensating circuit for controlling a reference voltage, which is to be compared with a detection value of the ignition coil primary current, at a constant value irrespective of a decrease of a power supply voltage, thereby controlling the ignition coil primary current at a given value over a wide range of variations of the power supply voltage including a considerable decrease thereof.

摘要翻译： 一种用于内燃机的改进的点火系统，包括用于实现点火线圈初级电流的恒定电流控制的恒流控制电路，还包括用于控制参考电压的补偿电路，该补偿电路将与点火线圈的检测值进行比较 初级电流，与电源电压降低无关，从而在包括其相当大的降低的电源电压的宽范围变化的范围内将点火线圈一次电流控制在给定值。

公开(公告)号：US4397290A

公开(公告)日：1983-08-09

申请号：US256833

申请日：1981-04-23

申请人： Toshio Tanaka ,  Tomoatsu Makino

发明人： Toshio Tanaka ,  Tomoatsu Makino

IPC分类号： F02P3/04 ,  F02P3/045

CPC分类号： F02P3/0453

摘要： A supply-voltage-compensated contactless ignition system for internal combustion engines, which includes input transistor operable in response to an engine ignition signal so as to control the operation of a power transistor to control the energization of an ignition coil with the operating level of the input transistors being varied with variation in the supply voltage, further includes a current mirror circuit having first and second current shunt paths including first and second transistors which are connected in parallel with a voltage clamping device such that the each current path substantially the same amount of current when the supply voltage is normal and that one of the current paths shunts a current increased over that of the other in response to a rise of the supply voltage beyond a predetermined value, and includes a shunt device for shunting the increased current to the input transistors.

摘要翻译： 一种用于内燃机的供应电压补偿的非接触式点火系统，其包括可响应于发动机点火信号操作的输入晶体管，以便控制功率晶体管的操作，以控制点火线圈的通电， 输入晶体管随着电源电压的变化而变化，还包括具有第一和第二电流分流路径的电流镜电路，其包括与电压钳位装置并联连接的第一和第二晶体管，使得每个电流路径基本上相同 当电源电压正常并且电流路径中的一个分流电流响应于电源电压超过预定值而增加到另一个电流时，并且包括用于将增加的电流分流到输入端的分流装置 晶体管。

公开(公告)号：US07601603B2

公开(公告)日：2009-10-13

申请号：US11094782

申请日：2005-03-31

申请人： Shoichi Yamauchi ,  Hitoshi Yamaguchi ,  Tomoatsu Makino ,  Syouji Nogami ,  Tomonori Yamaoka

发明人： Shoichi Yamauchi ,  Hitoshi Yamaguchi ,  Tomoatsu Makino ,  Syouji Nogami ,  Tomonori Yamaoka

IPC分类号： H01L21/20

CPC分类号： H01L29/7813 ,  H01L21/823487 ,  H01L29/0634 ,  H01L29/7811

摘要： A method for manufacturing a semiconductor device includes the steps of: forming a trench in a semiconductor substrate; and forming an epitaxial film on the substrate including a sidewall and a bottom of the trench so that the epitaxial film is filled in the trench. The step of forming the epitaxial film includes a final step before the trench is filled with the epitaxial film. The final step has a forming condition of the epitaxial film in such a manner that the epitaxial film to be formed on the sidewall of the trench has a growth rate at an opening of the trench smaller than a growth rate at a position of the trench, which is deeper than the opening of the trench.

摘要翻译： 一种制造半导体器件的方法包括以下步骤：在半导体衬底中形成沟槽; 以及在包括沟槽的侧壁和底部的衬底上形成外延膜，使得外延膜填充在沟槽中。 形成外延膜的步骤包括在沟槽被外延膜填充之前的最后步骤。 最终步骤具有外延膜的形成条件，使得形成在沟槽的侧壁上的外延膜在沟槽的开口处的生长速率小于沟槽位置处的生长速率， 其比沟槽的开口更深。

公开(公告)号：US20060043478A1

公开(公告)日：2006-03-02

申请号：US11211524

申请日：2005-08-26

申请人： Hitoshi Yamaguchi ,  Tomoatsu Makino ,  Yoshiyuki Hattori ,  Kyoko Okada

发明人： Hitoshi Yamaguchi ,  Tomoatsu Makino ,  Yoshiyuki Hattori ,  Kyoko Okada

IPC分类号： H01L29/76

CPC分类号： H01L29/7811 ,  H01L29/0634 ,  H01L29/0696 ,  H01L29/41741 ,  H01L29/66734 ,  H01L29/7813

摘要： A semiconductor device includes: a center region; a periphery region; and a semiconductor layer including pairs of a first region having a first impurity amount and a second region having a second impurity amount. The first and the second regions are alternately aligned in a plane. The periphery region includes an utmost outer and an utmost inner periphery pairs. The utmost outer periphery pair has a difference between the second and the first impurity amounts, which is smaller than a maximum difference in the periphery region. The utmost inner periphery pair has a difference between the second and the first impurity amounts, which is larger than a difference in the center region.

摘要翻译： 半导体器件包括：中心区域; 外围区域 以及包括具有第一杂质量的第一区域和具有第二杂质量的第二区域的对的半导体层。 第一和第二区域在平面中交替排列。 周边区域包括最外部的和最外部的内周边对。 最外周边对具有第二和第一杂质量之间的差异，其小于周边区域的最大差异。 最大的内周对具有第二和第一杂质量之间的差异，其大于中心区域的差。

公开(公告)号：US06829152B2

公开(公告)日：2004-12-07

申请号：US10310967

申请日：2002-12-06

申请人： Shoji Miura ,  Tomoatsu Makino ,  Fuminari Suzuki

发明人： Shoji Miura ,  Tomoatsu Makino ,  Fuminari Suzuki

IPC分类号： H02M114

CPC分类号： H01L29/7813 ,  H01L29/0638 ,  H01L29/7803 ,  H01L29/7805 ,  H01L29/7811 ,  H01L2224/48091 ,  H01L2224/48472 ,  H01L2224/49175 ,  H01L2924/181 ,  H01L2924/19105 ,  H02M1/08 ,  H01L2924/00014 ,  H01L2924/00012

摘要： A load drive circuit, disposed to drive an inductive load, includes a reflux closed circuit connected to the load. A flywheel diode is placed in the reflux closed circuit. A MOS transistor, disposed to turn on/off current to drive the load, is connected in parallel to the flywheel diode. A capacitor is disposed to connect its both ends to a gate and a drain of the MOS transistor, while a resistor is disposed to connect its both ends to the gate and a source of the MOS transistor. During a recovery operation of the flywheel diode, with the help of the capacitor and resistor, a gate-to-source voltage of the MOS transistor is pulled up to a value over a threshold for a predetermined period of time. Pulling up the gate-to-source voltage results in a softened recovery characteristic of the flywheel diode, suppressing recovery surges.

摘要翻译： 设置用于驱动感性负载的负载驱动电路包括连接到负载的回流闭路。 飞轮二极管放置在回流闭合回路中。 设置成导通/截止电流以驱动负载的MOS晶体管与续流二极管并联连接。 设置电容器将其两端连接到MOS晶体管的栅极和漏极，同时设置电阻器将其两端连接到栅极和MOS晶体管的源极。 在续流二极管的恢复操作期间，借助于电容器和电阻器，MOS晶体管的栅极 - 源极电压在预定时间段内上拉到超过阈值的值。 拉起栅极到源极电压导致续流二极管的软化恢复特性，抑制恢复浪涌。