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    Electronic and opto-electronic devices fabricated from nanostructured high surface to volume ratio thin films
    1.
    发明申请
    Electronic and opto-electronic devices fabricated from nanostructured high surface to volume ratio thin films 失效
    由纳米结构的高表面与体积比的薄膜制成的电子和光电器件

    公开(公告)号：US20020192441A1

    公开(公告)日：2002-12-19

    申请号：US10165858

    申请日：2002-06-08

    Applicant: The Penn State Research Foundation

    Inventor： Ali Kaan Kalkan ,  Stephen J. Fonash

    IPC: B32B009/00

    CPC classification number: B82Y10/00 ,  B82Y20/00 ,  B82Y30/00 ,  H01L51/0038 ,  H01L51/4213 ,  H01L51/426 ,  H01L51/4266 ,  H01L51/5012 ,  H01L51/5048 ,  H01L2251/5369 ,  Y02E10/549 ,  Y10S977/72 ,  Y10S977/778 ,  Y10S977/789 ,  Y10S977/932 ,  Y10T428/24174 ,  Y10T428/24917 ,  Y10T428/249953 ,  Y10T428/24996 ,  Y10T428/249967 ,  Y10T428/26 ,  Y10T428/31678

    Abstract: An electronic or opto-electronic device or a chemical sensor comprising: an interpenetrating network of a nanostructured high surface area to volume ratio film material and an organic/inorganic material forming a nanocomposite. The high surface area to volume film material is obtained onto an electrode substrate first, such that the nano-scale basic elements comprising this film material are embedded in a void matrix while having electrical connectivity with the electrode substrate. For example, the film material may comprise an array of nano-protrusions electrically connected to the electrode substrate and separated by a void matrix. The interpenetrating network is formed by introducing an appropriate organic/inorganic material into the void volume of the high surface area to volume film material. Further electrode(s) are defined onto the film or intra-void material to achieve a certain device. Charge separation, charge injection, charge storage, field effect devices, ohmic contacts, and chemical sensors are possible.

    Abstract translation: 一种电子或光电子器件或化学传感器，包括：纳米结构化的高表面积与体积比的薄膜材料的互穿网络和形成纳米复合材料的有机/无机材料。 首先在电极基板上获得高表面积体积膜材料，使得包含该膜材料的纳米级碱性元素嵌入空隙矩阵中，同时与电极基板具有电连接性。 例如，膜材料可以包括电连接到电极基底并由空隙矩阵分开的纳米突起阵列。 通过将适当的有机/无机材料引入高表面积的体积膜材料的空隙体积中形成互穿网络。 另外的电极被限定在膜或孔内材料上以实现某种器件。 电荷分离，电荷注入，电荷存储，场效应器件，欧姆接触和化学传感器是可能的。

    Use of sacrificial layers in the manufacture of high performance systems on tailored substrates
    4.
    发明申请
    Use of sacrificial layers in the manufacture of high performance systems on tailored substrates 失效
    在定制底材上制造高性能系统时使用牺牲层

    公开(公告)号：US20030157783A1

    公开(公告)日：2003-08-21

    申请号：US10340723

    申请日：2003-01-13

    Applicant: THE PENN STATE RESEARCH FOUNDATION

    Inventor： Stephen J. Fonash ,  Handong Li ,  Youngchul Lee ,  Joseph D. Cuiffi ,  Daniel J. Hayes

    IPC: H01L021/46 ,  H01L021/30

    CPC classification number: H01L27/1266 ,  B81C99/008 ,  G02B6/132 ,  G02B6/136 ,  G02B2006/12169 ,  G02B2006/12176 ,  H01L21/2007 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/76251 ,  H01L24/97 ,  H01L27/1214 ,  H01L2221/68318 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01057 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/19042 ,  H01L2924/3025 ,  H01M8/1097 ,  Y02P70/56 ,  Y10S438/96 ,  Y10S438/977 ,  H01L2924/00

    Abstract: The invention relates to methods for preparing a removable system on a mother substrate. The method deposits a high surface to volume sacrificial layer on a mother substrate and stabilizes the sacrificial layer by a) removing volatile chemical species in and on the sacrificial layer and/or b) modifying the surface of the layer. The method coats over the sacrificial layer with a capping medium. A system is the fabricated on the capping medium. The method provides through holes to access the sacrificial layer. The method may also apply a top layer onto the system to form a covered system. The invention also includes the step of removing the sacrificial layer to release the system from the mother substrate. Methods of the invention also include selectively removing a portion of the system and capping layers to form void regions defining an array of islands composed of device, structure, or system and capping layer regions, and optionally filling the island-defining void region with a sacrificial material. In such methods the sacrificial material and the high surface to volume sacrificial layer are removed to release the system from the mother substrate. Methods of the invention also include applying a layer to the capping material side of the released system to form a configuration wherein the system is substantially within a bending-stress reduced neutral plane. The systems fabricated according to the invention may be placed on a wide variety of suitable substrates, including flexible substrates.

    Abstract translation: 本发明涉及在母基板上制备可移除系统的方法。 该方法在母体衬底上沉积高表面到体积的牺牲层，并通过以下步骤使牺牲层稳定：a）去除牺牲层中和/或牺牲层上的挥发性化学物质和/或b）改变该层的表面。 该方法用覆盖介质涂覆在牺牲层上。 系统是在封盖介质上制造的。 该方法提供通孔以进入牺牲层。 该方法还可以将顶层应用到系统上以形成被覆盖的系统。 本发明还包括去除牺牲层以从母体衬底释放系统的步骤。 本发明的方法还包括选择性地去除系统的一部分和封盖层，以形成限定由器件，结构或系统和覆盖层区域组成的岛阵列的空隙区域，并且可选地用牺牲层填充岛状限定空隙区域 材料。 在这种方法中，去除了牺牲材料和高表面到体积的牺牲层，以从母体衬底释放系统。 本发明的方法还包括向释放系统的封盖材料侧施加一层以形成其中系统基本上在弯曲应力减小的中性平面内的构造。 根据本发明制造的系统可以放置在各种合适的基板上，包括柔性基板。

    Deposited thin film void-column network materials
    7.
    发明申请
    Deposited thin film void-column network materials 审中-公开
    沉积的薄膜空心柱网络材料

    公开(公告)号：US20020132101A1

    公开(公告)日：2002-09-19

    申请号：US10104749

    申请日：2002-03-22

    Applicant: The Penn State Research Foundation

    Inventor： Stephen J. Fonash ,  Alikaan Kalkan ,  Sanghoon Bae

    IPC: B32B003/26

    CPC classification number: B81C1/0038 ,  B81C1/00047 ,  B81C2201/0115 ,  B81C2201/0139 ,  B81C2201/018 ,  C23C16/24 ,  C23C16/511 ,  G01N21/17 ,  G01N27/121 ,  G01N27/44717 ,  G01N30/6095 ,  H01J49/0418 ,  Y10T428/24174 ,  Y10T428/249953

    Abstract: A novel porous film is disclosed comprising a network of silicon columns in a continuous void which may be fabricated using high density plasma deposition at low temperatures, i.e., less than about 250 null C. This silicon film is a two-dimensional nano-sized array of rodlike columns. This void-column morphology can be controlled with deposition conditions and the porosity can be varied up to 90%. The simultaneous use of low temperature deposition and etching in the plasma approach utilized, allows for the unique opportunity of obtaining columnar structure, a continuous void, and polycrystalline column composition at the same time. Unique devices may be fabricated using this porous continuous film by plasma deposition of this film on a glass, metal foil, insulator or plastic substrates.

    Abstract translation: 公开了一种新颖的多孔膜，其包括在连续空隙中的硅柱网络，其可以在低温下（即小于约250℃）下使用高密度等离子体沉积来制造。该硅膜是二维纳米尺寸阵列 的棒状柱。 这种空隙柱形态可以用沉积条件控制，并且孔隙率可以变化高达90％。 在所采用的等离子体方法中同时使用低温沉积和蚀刻允许在同时获得柱状结构，连续空隙和多晶柱组成的独特机会。 可以使用这种多孔连续膜通过将该膜等离子体沉积在玻璃，金属箔，绝缘体或塑料基底上来制造独特的器件。

    Electrostatic printing of a metallic toner applied to solid phase crystallization and silicidation
    8.
    发明申请
    Electrostatic printing of a metallic toner applied to solid phase crystallization and silicidation 有权
    用于固相结晶和硅化的金属调色剂的静电印刷

    公开(公告)号：US20010033985A1

    公开(公告)日：2001-10-25

    申请号：US09757306

    申请日：2001-01-08

    Applicant: The Penn State Research Foundation

    Inventor： Stephen J. Fonash ,  Ali Kaan Kalkan ,  Robert H. Detig

    IPC: G03G013/10 ,  G03G013/16

    CPC classification number: H01L21/02532 ,  H01L21/02592 ,  H01L21/02672 ,  H01L27/1277

    Abstract: A metal-containing toner is electrostatically printed on a semiconductor surface. Subsequently, this surface is annealed to achieve certain material modifications selectively at the regions where the toner is applied. If the toner contains a crystallization-catalyst metal, such as, Pd, Ni, Pt, and Cr, and is printed on an amorphous semiconductor film, annealing results in conversion of the printed regions to polycrystalline. If the metal-containing toner is printed on a silicon surface (i.e., amorphous/poly-Si layer or Si wafer) the printed regions are selectively converted to a metal-silicide (with the sufficient amount of metal applied on these regions) upon annealing.

    Abstract translation: 含金属的调色剂被静电印刷在半导体表面上。 随后，将该表面进行退火，以在施加调色剂的区域选择性地获得某些材料变化。 如果调色剂含有诸如Pd，Ni，Pt和Cr的结晶催化剂金属，并且印刷在非晶半导体膜上，则退火导致印刷区域转化为多晶。 如果将含金属的调色剂印刷在硅表面（即，非晶/多晶硅层或Si晶片）上，则退火后的印刷区域选择性地转化为金属硅化物（在这些区域施加足够量的金属） 。

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