公开(公告)号：US09613933B2

公开(公告)日：2017-04-04

申请号：US14198479

申请日：2014-03-05

申请人： Thomas J. De Bonis ,  Lilia May ,  Rajen S. Sidhu ,  Mukul P. Renavikar ,  Ashay A. Dani ,  Edward R. Prack ,  Carl L. Deppisch ,  Anna M. Prakash ,  James C. Matayabas, Jr. ,  Jason Jieping Zhang ,  Srinivasa R. Aravamudhan ,  Chang Lin

发明人： Thomas J. De Bonis ,  Lilia May ,  Rajen S. Sidhu ,  Mukul P. Renavikar ,  Ashay A. Dani ,  Edward R. Prack ,  Carl L. Deppisch ,  Anna M. Prakash ,  James C. Matayabas, Jr. ,  Jason Jieping Zhang ,  Srinivasa R. Aravamudhan ,  Chang Lin

IPC分类号： H01L23/12 ,  H01L25/065 ,  H01L25/10 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00

CPC分类号： H01L23/49816 ,  H01L21/4853 ,  H01L21/565 ,  H01L21/76802 ,  H01L23/3128 ,  H01L23/49822 ,  H01L24/16 ,  H01L24/17 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/13023 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06548 ,  H01L2225/06586 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/37001 ,  H01L2924/00

摘要： An apparatus is described that includes a substrate and a mold compound disposed on the substrate. The semiconductor die is embedded within the mold compound and is electrically coupled to lands on the substrate. Solder balls are disposed around the semiconductor die on the substrate. Each of the solder balls have a solid coating thereon. The solid coating contains a cleaning agent to promote its solder ball's coalescence with another solder ball. Respective vias are formed in the mold compound that expose the solder balls and their respective solid coatings. In combined or alternate embodiments outer edges of the mold compound have smaller thickness than regions of the mold compound between the vias and the semiconductor die. In combined or alternate embodiments micro-channels exist between the solder balls and the mold compound.

公开(公告)号：US20150255415A1

公开(公告)日：2015-09-10

申请号：US14198479

申请日：2014-03-05

申请人： Thomas J. De Bonis ,  Lilia May ,  Rajen S. Sidhu ,  Mukul P. Renavikar ,  Ashay A. Dani ,  Edward R. Prack ,  Carl L. Deppisch ,  Anna M. Prakash ,  James C. Matayabas, JR. ,  Jason Jieping Zhang ,  Srinivasa R. Aravamudhan ,  Chang Lin

发明人： Thomas J. De Bonis ,  Lilia May ,  Rajen S. Sidhu ,  Mukul P. Renavikar ,  Ashay A. Dani ,  Edward R. Prack ,  Carl L. Deppisch ,  Anna M. Prakash ,  James C. Matayabas, JR. ,  Jason Jieping Zhang ,  Srinivasa R. Aravamudhan ,  Chang Lin

IPC分类号： H01L23/00 ,  H01L25/065 ,  H01L23/498 ,  H01L23/31 ,  H01L21/56 ,  H01L21/768

CPC分类号： H01L23/49816 ,  H01L21/4853 ,  H01L21/565 ,  H01L21/76802 ,  H01L23/3128 ,  H01L23/49822 ,  H01L24/16 ,  H01L24/17 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/13023 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06548 ,  H01L2225/06586 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/37001 ,  H01L2924/00

摘要： An apparatus is described that includes a substrate and a mold compound disposed on the substrate. The semiconductor die is embedded within the mold compound and is electrically coupled to lands on the substrate. Solder balls are disposed around the semiconductor die on the substrate. Each of the solder balls have a solid coating thereon. The solid coating contains a cleaning agent to promote its solder ball's coalescence with another solder ball. Respective vias are formed in the mold compound that expose the solder balls and their respective solid coatings. In combined or alternate embodiments outer edges of the mold compound have smaller thickness than regions of the mold compound between the vias and the semiconductor die. In combined or alternate embodiments micro-channels exist between the solder balls and the mold compound.

摘要翻译： 描述了一种包括设置在基板上的基板和模具化合物的装置。 半导体管芯被嵌入在模具化合物内并且电耦合到衬底上的焊盘。 焊球围绕半导体管芯设置在基板上。 每个焊球上都有一个固体涂层。 固体涂层含有一种清洁剂，以促进其焊球与另一种焊球的聚结。 在模具化合物中形成了暴露焊球及其各自固体涂层的通孔。 在组合或替代实施例中，模具化合物的外边缘具有比通孔和半导体管芯之间的模具化合物区域更小的厚度。 在组合或替代实施例中，焊料球与模具化合物之间存在微通道。

公开(公告)号：US20140175160A1

公开(公告)日：2014-06-26

申请号：US13725279

申请日：2012-12-21

申请人： Rajen S. Sidhu ,  Mukul P. Renavikar ,  Ashay A. Dani ,  Martha A. Dudek

发明人： Rajen S. Sidhu ,  Mukul P. Renavikar ,  Ashay A. Dani ,  Martha A. Dudek

IPC分类号： B23K1/20 ,  B23K35/24 ,  B23K35/362

CPC分类号： B23K1/203 ,  B23K1/0016 ,  B23K35/0222 ,  B23K35/0244 ,  B23K35/025 ,  B23K35/24 ,  B23K35/26 ,  B23K35/262 ,  B23K35/36 ,  B23K35/3612 ,  B23K35/3613 ,  B23K35/3615 ,  B23K35/3618 ,  B23K35/362 ,  B23K2101/42

摘要： A composition including a solder flux including a rosin material have a property to maintain a less than 10 percent drop in tackiness from an initial tackiness value of 20 gf to 120 gf over a temperature regime of 20° C. to 200° C. A composition including a solder powder; and a solder flux including a rosin material including a softening temperature of 150° C. to 200° C. and a molecular weight of 300 g/mol to 600 g/mol. A method including introducing a solder paste to one or more contact pads of a substrate, the solder paste including a solder powder and a solder flux including a rosin material including a softening temperature of 150° C. to 190° C. and a molecular weight of 300 g/mol to 600 g/mol; contacting the solder paste with a solder ball of a package substrate; and heating the solder paste.

摘要翻译： 包含包含松香材料的焊剂的组合物具有在20℃至200℃的温度范围内保持从20gf的初始粘性值至少低于10％的粘性降低的性质。组合物 包括焊粉; 以及包含软化温度为150℃〜200℃，分子量为300g / mol〜600g / mol的松香材料的焊剂。 一种方法，包括将焊膏引入到衬底的一个或多个接触焊盘中，所述焊膏包括焊料粉末和包含松香材料的助焊剂，所述助焊剂包括150℃至190℃的软化温度和分子量 为300g / mol至600g / mol; 使焊膏与封装衬底的焊球接触; 并加热焊膏。

公开(公告)号：US08701281B2

公开(公告)日：2014-04-22

申请号：US12641237

申请日：2009-12-17

申请人： Rajen S. Sidhu ,  Ashay A. Dani ,  Mukul P. Renavikar

发明人： Rajen S. Sidhu ,  Ashay A. Dani ,  Mukul P. Renavikar

IPC分类号： H05K3/00 ,  H05K3/34 ,  H05K1/03 ,  H05K1/00 ,  H05K1/16 ,  H05K7/10

CPC分类号： H05K3/3489 ,  H05K3/3436

摘要： Surface-active dopants are added to a portion of a circuit package before a reflow process to promote wetting and reduce the formation of solder bump bridges. The circuit package has a solder element that electrically connects the circuit package to a substrate. A reflow process is performed to attach the solder element to a pad on the circuit package. During the reflow process, the surface-active dopants diffuse to the surface of the solder element and form an oxide passivation layer on the surface of the solder element.

摘要翻译： 在回流过程之前，将表面活性掺杂剂添加到电路封装的一部分中以促进润湿并减少焊料凸块桥的形成。 电路封装具有将电路封装电连接到衬底的焊料元件。 执行回流处理以将焊料元件附接到电路封装上的焊盘。 在回流过程中，表面活性掺杂剂扩散到焊料元件的表面，并在焊料元件的表面上形成氧化物钝化层。

公开(公告)号：US20110147066A1

公开(公告)日：2011-06-23

申请号：US12641237

申请日：2009-12-17

申请人： Rajen S. Sidhu ,  Ashay A. Dani ,  Mukul P. Renavikar

发明人： Rajen S. Sidhu ,  Ashay A. Dani ,  Mukul P. Renavikar

IPC分类号： H05K1/11 ,  H01R9/00

CPC分类号： H05K3/3489 ,  H05K3/3436

摘要： Surface-active dopants are added to a portion of a circuit package before a reflow process to promote wetting and reduce the formation of solder bump bridges. The circuit package has a solder element that electrically connects the circuit package to a substrate. A reflow process is performed to attach the solder element to a pad on the circuit package. During the reflow process, the surface-active dopants diffuse to the surface of the solder element and form an oxide passivation layer on the surface of the solder element.

摘要翻译： 在回流过程之前，将表面活性掺杂剂添加到电路封装的一部分中以促进润湿并减少焊料凸块桥的形成。 电路封装具有将电路封装电连接到衬底的焊料元件。 执行回流处理以将焊料元件附接到电路封装上的焊盘。 在回流过程中，表面活性掺杂剂扩散到焊料元件的表面，并在焊料元件的表面上形成氧化物钝化层。

公开(公告)号：US09024453B2

公开(公告)日：2015-05-05

申请号：US13976192

申请日：2012-03-29

申请人： Rajen S. Sidhu ,  Ashay A. Dani ,  Martha A. Dudek

发明人： Rajen S. Sidhu ,  Ashay A. Dani ,  Martha A. Dudek

IPC分类号： H01L23/48 ,  H01L23/532 ,  H01L23/00 ,  H01L21/768

CPC分类号： H01L23/53209 ,  H01L21/76882 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/11005 ,  H01L2224/1132 ,  H01L2224/1145 ,  H01L2224/11901 ,  H01L2224/1308 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/14505 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16507 ,  H01L2224/81191 ,  H01L2224/8181 ,  H01L2224/81815 ,  H01L2924/1461 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/00012 ,  H01L2924/01029 ,  H01L2924/01028 ,  H01L2924/00

摘要： Interconnect packaging technology for direct-chip-attach, package-on-package, or first level and second level interconnect stack-ups with reduced Z-heights relative to ball technology. In embodiments, single or multi-layered interconnect structures are deposited in a manner that permits either or both of the electrical and mechanical properties of specific interconnects within a package to be tailored, for example based on function. Functional package interconnects may vary one of more of at least material layer composition, layer thickness, number of layers, or a number of materials to achieve a particular function, for example based on an application of the component(s) interconnected or an application of the assembly as a whole. In embodiments, parameters of the multi-layered laminated structures are varied dependent on the interconnect location within an area of a substrate, for example with structures having higher ductility at interconnect locations subject to higher stress.

摘要翻译： 互连封装技术，用于直接芯片连接，封装封装或一级和二级互连叠层，相对于球技术，Z高度降低。 在实施例中，单层或多层互连结构以允许例如基于功能来定制封装内的特定互连的电气和机械特性之一或两者的方式被沉积。 功能性封装互连可以改变至少材料层组成，层厚度，层数或多个材料中的一个以实现特定功能，例如基于互连部件的应用或应用 整个集会。 在实施例中，多层叠层结构的参数取决于衬底区域内的互连位置，例如具有较高应力的互连位置处具有较高延展性的结构。

公开(公告)号：US06841867B2

公开(公告)日：2005-01-11

申请号：US10334241

申请日：2002-12-30

申请人： James C. Matayabas, Jr. ,  Paul A. Koning ,  Ashay A. Dani ,  Christopher L. Rumer

发明人： James C. Matayabas, Jr. ,  Paul A. Koning ,  Ashay A. Dani ,  Christopher L. Rumer

IPC分类号： H01L23/31 ,  H01L23/373 ,  H01L23/42 ,  H01L23/10 ,  H01L23/34 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L23/3737 ,  H01L23/3128 ,  H01L23/42 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/29499 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/01078 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/3011 ,  H01L2924/00

摘要： A composition including an amount of at least one vinyl terminated polymer; an amount of at least one cross-linker comprising a terminal Si—H unit; an amount of at least one thermally conductive first filler, and at least one thermally conductive second filler, wherein a melting point of the first filler is greater than the melting point of the second filler. An apparatus including a package configured to mate with a printed circuit board; a semiconductor device coupled to the package; a thermal element; and a curable thermal material disposed between the thermal element and the semiconductor device.

摘要翻译： 包含至少一种乙烯基封端的聚合物的组合物; 至少一个包含末端Si-H单元的交联剂的量; 一定量的至少一种导热第一填料和至少一种导热第二填料，其中第一填料的熔点大于第二填料的熔点。 一种包括被配置为与印刷电路板匹配的封装的设备; 耦合到所述封装的半导体器件; 热元件; 以及设置在所述热元件和所述半导体器件之间的可固化热敏材料。

公开(公告)号：US06974723B2

公开(公告)日：2005-12-13

申请号：US10956162

申请日：2004-09-30

申请人： James C. Matayabas, Jr. ,  Paul A. Koning ,  Ashay A. Dani ,  Christopher L. Rumer

发明人： James C. Matayabas, Jr. ,  Paul A. Koning ,  Ashay A. Dani ,  Christopher L. Rumer

IPC分类号： H01L23/31 ,  H01L23/373 ,  H01L23/42 ,  H01L29/866

CPC分类号： H01L23/3737 ,  H01L23/3128 ,  H01L23/42 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/29499 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/01078 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/3011 ,  H01L2924/00

摘要： A composition including an amount of at least one vinyl terminated polymer; an amount of at least one cross-linker comprising a terminal Si—H unit; an amount of at least one thermally conductive first filler, and at least one thermally conductive second filler, wherein a melting point of the first filler is greater than the melting point of the second filler. An apparatus including a package configured to mate with a printed circuit board; a semiconductor device coupled to the package; a thermal element; and a curable thermal material disposed between the thermal element and the semiconductor device.

公开(公告)号：US07332807B2

公开(公告)日：2008-02-19

申请号：US11323512

申请日：2005-12-30

申请人： Ashay A. Dani ,  Anna M. Prakash ,  Saikumar Jayaraman ,  Mitesh Patel ,  Vijay S. Wakharkar

发明人： Ashay A. Dani ,  Anna M. Prakash ,  Saikumar Jayaraman ,  Mitesh Patel ,  Vijay S. Wakharkar

IPC分类号： H01L23/10 ,  H05K7/20

CPC分类号： H01L23/3737 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/29486 ,  H01L2224/2949 ,  H01L2224/29499 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/00 ,  H01L2224/05599

摘要： A chip package includes a thermal interface material disposed between a die backside and a heat sink. The thermal interface material includes a first metal particle that is covered by a dielectric film. The dielectric film is selected from an inorganic compound of the first metal or an inorganic compound coating of a second metal. The dielectric film diminishes overall heat transfer from the first metal particle in the thermal interface material by a small fraction of total possible heat transfer without the dielectric film. A method of operating the chip includes biasing the chip with the dielectric film in place.

摘要翻译： 芯片封装包括设置在模具背面和散热器之间的热界面材料。 热界面材料包括由电介质膜覆盖的第一金属颗粒。 电介质膜选自第一金属的无机化合物或第二金属的无机化合物涂层。 电介质膜减少热界面材料中的第一金属颗粒的总传热量，而不需要电介质膜的总可能传热的一小部分。 一种操作该芯片的方法包括：将该电介质膜的芯片偏压就位。

公开(公告)号：US07776657B2

公开(公告)日：2010-08-17

申请号：US11935597

申请日：2007-11-06

申请人： Ashay A. Dani ,  Anna M. Prakash ,  Saikumar Jayaraman ,  Mitesh Patel ,  Vijay S. Wakharkar

发明人： Ashay A. Dani ,  Anna M. Prakash ,  Saikumar Jayaraman ,  Mitesh Patel ,  Vijay S. Wakharkar

IPC分类号： H01L21/00

CPC分类号： H01L23/3737 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/29486 ,  H01L2224/2949 ,  H01L2224/29499 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/00 ,  H01L2224/05599

摘要： A chip package includes a thermal interface material disposed between a die backside and a heat sink. The thermal interface material includes a first metal particle that is covered by a dielectric film. The dielectric film is selected from an inorganic compound of the first metal or an inorganic compound coating of a second metal. The dielectric film diminishes overall heat transfer from the first metal particle in the thermal interface material by a small fraction of total possible heat transfer without the dielectric film. A method of operating the chip includes biasing the chip with the dielectric film in place.

摘要翻译： 芯片封装包括设置在模具背面和散热器之间的热界面材料。 热界面材料包括由电介质膜覆盖的第一金属颗粒。 电介质膜选自第一金属的无机化合物或第二金属的无机化合物涂层。 电介质膜减少热界面材料中的第一金属颗粒的总传热量，而不需要电介质膜的总可能传热的一小部分。 一种操作该芯片的方法包括：将该电介质膜的芯片偏压就位。