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    Semiconductor device manufacturing method
    3.
    发明授权
    Semiconductor device manufacturing method 有权
    半导体器件制造方法

    公开(公告)号：US09245764B2

    公开(公告)日：2016-01-26

    申请号：US14356809

    申请日：2012-11-16

    申请人： TOKYO ELECTRON LIMITED

    发明人： Eiichi Nishimura ,  Tadashi Kotsugi ,  Fumiko Yamashita ,  Kenji Adachi

    IPC分类号： H01L21/311 ,  H01L21/308 ,  H01L21/033 ,  H01L21/3213 ,  H01J37/32 ,  H01L21/3065

    CPC分类号： H01L21/3088 ,  H01J37/32091 ,  H01L21/0337 ,  H01L21/3065 ,  H01L21/3081 ,  H01L21/3083 ,  H01L21/32137

    摘要： This semiconductor device manufacturing method is provided with: a film-forming step wherein a silicon nitride layer or a silicon oxide layer is formed such that a side wall portion of a silicon-containing layer, which is formed on a substrate and patterned, is covered with the silicon nitride layer or the silicon oxide layer; and a plasma etching step wherein the silicon-containing layer is selectively removed, and the silicon nitride layer or the silicon oxide layer formed on the side wall portion is left. In the plasma etching step, an etching gas containing SF6 gas is used.

    摘要翻译： 该半导体器件制造方法具有：成膜步骤，其中形成氮化硅层或氧化硅层，使得形成在衬底上并图案化的含硅层的侧壁部分被覆盖 与氮化硅层或氧化硅层; 以及等离子体蚀刻步骤，其中选择性地除去含硅层，并且留下形成在侧壁部分上的氮化硅层或氧化硅层。 在等离子体蚀刻步骤中，使用含有SF 6气体的蚀刻气体。

    Etching method and substrate processing apparatus
    4.
    发明授权
    Etching method and substrate processing apparatus 有权
    蚀刻方法和基板处理装置

    公开(公告)号：US09419211B2

    公开(公告)日：2016-08-16

    申请号：US14065597

    申请日：2013-10-29

    申请人： Tokyo Electron Limited

    发明人： Eiichi Nishimura ,  Masato Kushibiki ,  Nao Koizumi ,  Takashi Sone ,  Fumiko Yamashita

    IPC分类号： H01L21/00 ,  H01L43/12 ,  H01J37/32

    CPC分类号： H01L43/12 ,  G11C11/161 ,  H01J37/32091

    摘要： A gas for an etching process and a treatment process of a metal stacked film in which an insulating layer is interposed between two layers of magnetic materials can be optimized. An etching method of etching a multilayered film including a metal stacked film in which an insulating layer is interposed between a first magnetic layer and a second magnetic layer includes etching the metal stacked film with plasma generated by supplying a gas containing at least C, O, and H into a processing chamber; and treating the metal stacked film with plasma generated by supplying a gas containing at least a CF4 gas into the processing chamber.

    摘要翻译： 可以优化用于蚀刻工艺的气体和其中绝缘层插入在两层磁性材料之间的金属叠层膜的处理过程。 蚀刻包括在第一磁性层和第二磁性层之间插入有绝缘层的金属层叠膜的多层膜的蚀刻方法包括：通过供给至少含有C，O的气体产生的等离子体蚀刻金属层叠膜， 和H进入处理室; 以及通过将至少含有CF 4气体的气体供给到所述处理室中而产生的等离子体处理所述金属层叠膜。

    Pattern forming method
    5.
    发明授权
    Pattern forming method 有权
    图案形成方法

    公开(公告)号：US09412618B2

    公开(公告)日：2016-08-09

    申请号：US14776886

    申请日：2014-04-09

    申请人： Tokyo Electron Limited

    发明人： Shinya Morikita ,  Eiichi Nishimura ,  Fumiko Yamashita

    IPC分类号： H01L21/311 ,  H01L21/02 ,  H01J37/32 ,  B81C1/00 ,  H01L21/027 ,  G03F7/00

    CPC分类号： H01L21/31133 ,  B81C1/00031 ,  B81C2201/0149 ,  G03F7/0002 ,  H01J37/32091 ,  H01J37/32577 ,  H01L21/02118 ,  H01L21/02351 ,  H01L21/0271 ,  H01L21/31138 ,  H01L21/31144

    摘要： A pattern forming method of forming a pattern on an underlying layer of a target object includes forming a block copolymer layer, which includes a first polymer and a second polymer and is configured to be self-assembled, on the underlying layer; processing the target object to form a first region containing the first polymer and a second region containing the second polymer in the block copolymer layer; etching the second region partway in a thickness direction thereof in a capacitively coupled plasma processing apparatus after the processing of the target object; generating secondary electrons from an upper electrode of the plasma processing apparatus by applying a negative DC voltage to the upper electrode and irradiating the secondary electrons onto the target object, after the etching of the second region; and additionally etching the second region in the plasma processing apparatus after the irradiating of the secondary electrons.

    摘要翻译： 在目标物体的下层上形成图案的图案形成方法包括在下层上形成包含第一聚合物和第二聚合物并被构造成自组装的嵌段共聚物层; 处理目标物体以形成含有第一聚合物的第一区域和在嵌段共聚物层中含有第二聚合物的第二区域; 在对象物体的处理之后，在电容耦合等离子体处理装置中在其厚度方向的中间蚀刻第二区域; 在蚀刻第二区域之后，通过向上部电极施加负的DC电压并将二次电子照射到目标物体上，从等离子体处理装置的上部电极产生二次电子; 并且另外在照射二次电子之后蚀刻等离子体处理装置中的第二区域。

    SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING METHOD
    6.
    发明申请
    SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING METHOD 审中-公开
    基板处理装置和基板处理方法

    公开(公告)号：US20150132970A1

    公开(公告)日：2015-05-14

    申请号：US14396032

    申请日：2013-04-16

    申请人： TOKYO ELECTRON LIMITED

    发明人： Eiichi Nishimura ,  Akitaka Shimizu ,  Fumiko Yamashita ,  Daisuke Urayama

    IPC分类号： H01J37/32 ,  H01L43/12 ,  H01L21/67

    CPC分类号： H01J37/32513 ,  H01J37/32 ,  H01J37/32357 ,  H01J37/32422 ,  H01J37/32449 ,  H01J37/32724 ,  H01J37/32834 ,  H01J2237/334 ,  H01L21/67069 ,  H01L43/12

    摘要： An apparatus for processing reaction products that are deposited when an etching target film contained in a target object to be processed is etched is provided with: a processing chamber; a partition plate; a plasma source; a mounting table; a first processing gas supply unit; a second processing gas supply unit. The processing chamber defines a space, and the partition plate is arranged within the processing chamber and divides the space into a plasma generating space and a substrate processing space, while suppressing permeation of ions and vacuum ultraviolet rays. The plasma source generates a plasma in the plasma forming space. The mounting table is arranged in the substrate processing space to mount the target object thereon.

    摘要翻译： 在被处理对象物中包含的蚀刻对象膜被蚀刻时，沉积的反应产物的处理装置具备：处理室; 隔板 等离子体源 安装台; 第一处理气体供应单元; 第二处理气体供应单元。 处理室限定空间，并且分隔板布置在处理室内，并且将空间分成等离子体产生空间和基板处理空间，同时抑制离子的渗透和真空紫外线。 等离子体源在等离子体形成空间中产生等离子体。 安装台布置在基板处理空间中以将目标物体安装在其上。

    PATTERN FORMING METHOD
    8.
    发明申请
    PATTERN FORMING METHOD 有权
    图案形成方法

    公开(公告)号：US20160042970A1

    公开(公告)日：2016-02-11

    申请号：US14776886

    申请日：2014-04-09

    申请人： TOKYO ELECTRON LIMITED

    发明人： Shinya Morikita ,  Eiichi Nishimura ,  Fumiko Yamashita

    IPC分类号： H01L21/311 ,  H01L21/02

    CPC分类号： H01L21/31133 ,  B81C1/00031 ,  B81C2201/0149 ,  G03F7/0002 ,  H01J37/32091 ,  H01J37/32577 ,  H01L21/02118 ,  H01L21/02351 ,  H01L21/0271 ,  H01L21/31138 ,  H01L21/31144

    摘要： A pattern forming method of forming a pattern on an underlying layer of a target object includes forming a block copolymer layer, which includes a first polymer and a second polymer and is configured to be self-assembled, on the underlying layer; processing the target object to form a first region containing the first polymer and a second region containing the second polymer in the block copolymer layer; etching the second region partway in a thickness direction thereof in a capacitively coupled plasma processing apparatus after the processing of the target object; generating secondary electrons from an upper electrode of the plasma processing apparatus by applying a negative DC voltage to the upper electrode and irradiating the secondary electrons onto the target object, after the etching of the second region; and additionally etching the second region in the plasma processing apparatus after the irradiating of the secondary electrons.

    摘要翻译： 在目标物体的下层上形成图案的图案形成方法包括在下层上形成包含第一聚合物和第二聚合物并被构造成自组装的嵌段共聚物层; 处理目标物体以形成含有第一聚合物的第一区域和在嵌段共聚物层中含有第二聚合物的第二区域; 在对象物体的处理之后，在电容耦合等离子体处理装置中在其厚度方向的中间蚀刻第二区域; 在蚀刻第二区域之后，通过向上部电极施加负的DC电压并将二次电子照射到目标物体上，从等离子体处理装置的上部电极产生二次电子; 并且另外在照射二次电子之后蚀刻等离子体处理装置中的第二区域。

    Method of etching copper layer and mask
    9.
    发明授权
    Method of etching copper layer and mask 有权
    蚀刻铜层和掩模的方法

    公开(公告)号：US09208997B2

    公开(公告)日：2015-12-08

    申请号：US14058621

    申请日：2013-10-21

    申请人： Tokyo Electron Limited

    发明人： Eiichi Nishimura ,  Masato Kushibiki ,  Takashi Sone ,  Akitaka Shimizu ,  Fumiko Yamashita

    IPC分类号： C23F1/00 ,  H01J37/32 ,  C23F1/02 ,  H01L21/311 ,  H01L21/3213 ,  C23F4/00

    CPC分类号： H01J37/32082 ,  C23F1/02 ,  C23F4/00 ,  H01J2237/334 ,  H01L21/31116 ,  H01L21/31122 ,  H01L21/31138 ,  H01L21/32136 ,  H01L21/32139

    摘要： A method of etching a copper layer of a target object including, on the copper layer, a mask having a pattern to be transferred onto the copper layer is provided. The method includes etching the copper layer by using plasma of a first gas containing a hydrogen gas; and processing the target object by using plasma of a second gas containing a hydrogen gas and a gas (hereinafter, referred to as “deposition gas”) that is deposited on the target object. Further, the etching of the copper layer by using plasma of the first gas and the processing of the target object by using plasma of the second gas are repeated alternately.

    摘要翻译： 提供一种蚀刻目标物体的铜层的方法，包括在铜层上具有转印到铜层上的图案的掩模。 该方法包括通过使用含有氢气的第一气体的等离子体蚀刻铜层; 并且通过使用沉积在目标物体上的含有氢气和气体的第二气体（以下称为“沉积气体”）的等离子体来处理目标物体。 此外，交替地重复通过使用第一气体的等离子体对铜层的蚀刻和通过使用第二气体的等离子体来处理目标物体。

    SEMICONDUCTOR DEVICE MANUFACTURING METHOD
    10.
    发明申请
    SEMICONDUCTOR DEVICE MANUFACTURING METHOD 有权
    半导体器件制造方法

    公开(公告)号：US20150079790A1

    公开(公告)日：2015-03-19

    申请号：US14356809

    申请日：2012-11-16

    申请人： TOKYO ELECTRON LIMITED

    发明人： Eiichi Nishimura ,  Tadashi Kotsugi ,  Fumiko Yamashita ,  Kenji Adachi

    IPC分类号： H01L21/308 ,  H01L21/3065

    CPC分类号： H01L21/3088 ,  H01J37/32091 ,  H01L21/0337 ,  H01L21/3065 ,  H01L21/3081 ,  H01L21/3083 ,  H01L21/32137

    摘要： This semiconductor device manufacturing method is provided with: a film-forming step wherein a silicon nitride layer or a silicon oxide layer is formed such that a side wall portion of a silicon-containing layer, which is formed on a substrate and patterned, is covered with the silicon nitride layer or the silicon oxide layer; and a plasma etching step wherein the silicon-containing layer is selectively removed, and the silicon nitride layer or the silicon oxide layer formed on the side wall portion is left. In the plasma etching step, an etching gas containing SF6 gas is used.

    摘要翻译： 该半导体器件制造方法具有：成膜步骤，其中形成氮化硅层或氧化硅层，使得形成在衬底上并图案化的含硅层的侧壁部分被覆盖 与氮化硅层或氧化硅层; 以及等离子体蚀刻步骤，其中选择性地除去含硅层，并且留下形成在侧壁部分上的氮化硅层或氧化硅层。 在等离子体蚀刻步骤中，使用含有SF 6气体的蚀刻气体。