ENCODING DEVICE, DECODING DEVICE, ENCODING/DECODING DEVICE, AND RECORDING/REPRODUCING DEVICE
    9.
    发明申请
    ENCODING DEVICE, DECODING DEVICE, ENCODING/DECODING DEVICE, AND RECORDING/REPRODUCING DEVICE 失效
    编码设备,解码设备,编码/解码设备以及记录/再现设备

    公开(公告)号:US20090199073A1

    公开(公告)日:2009-08-06

    申请号:US12276958

    申请日:2008-11-24

    IPC分类号: H03M13/27 G06F11/10

    摘要: An error correction device error corrects without increasing in circuit scale. An encoder, includes: a first ECC encoder which interleaves a data string into n (n≧2) blocks of data strings at every m (m≧2) bits, and adds the error correction code parity; a parity encoder which creates a parity bit at every plurality of bits of the error correction code word, and adds the parity bit to said error correction code word; and a second ECC encoder, which generates a second error correction encoding, which is a linear encoding using iterative decoding. Concatenated type encoded data, where a parity bit is added to every plurality of bits, is created, so an increase of circuit scale can be prevented even if a data string is interleaved into a plurality of blocks and error correction code parity is generated.

    摘要翻译: 错误纠正装置的错误在电路规模上没有增加。 一种编码器,包括:第一ECC编码器,每m(m> = 2)个比特将数据串交织成n(n> = 2)个数据串,并将纠错码奇偶校验相加; 奇偶校验编码器,其在所述纠错码字的每多个位产生奇偶校验位,并将所述奇偶校验位加到所述纠错码字; 以及第二ECC编码器,其生成使用迭代解码的线性编码的第二纠错编码。 创建了对每个多个比特添加奇偶校验位的级联型编码数据,因此即使将数据串交错为多个块并产生纠错码奇偶校验,也可以防止电路规模的增加。

    Encoder and decoder using run-length-limited code
    10.
    发明申请
    Encoder and decoder using run-length-limited code 失效
    编码器和解码器使用运行长度限制代码

    公开(公告)号:US20060250286A1

    公开(公告)日:2006-11-09

    申请号:US11484003

    申请日:2006-07-10

    IPC分类号: H03M7/12

    CPC分类号: H03M5/145

    摘要: When a zero run, which violating G constraint of a run-length-limited (RLL) code, is detected from the data stored in a first input register 1111 and a second input register 1112, bits before and after the zero run is transferred to a temporary register 1150 via a bus for zero run removal 1130 to be combined to each other. Thus, by effectively using the mechanism of bus transfer, a circuit can be simplified, thereby realizing a small circuit.

    摘要翻译: 当从存储在第一输入寄存器1111和第二输入寄存器1112中的数据检测违反游程长度限制(RLL)代码的G约束的零运行时,将零运行之前和之后的位传送到 一个临时寄存器1150通过总线进行零运行移除1130以彼此组合。 因此,通过有效地利用总线传输的机制,可以简化电路,从而实现小电路。