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公开(公告)号：US06291776B1
公开(公告)日：2001-09-18
申请号：US09185425
申请日：1998-11-03
IPC分类号： H05K111
CPC分类号： H05K1/114 , H01L23/49827 , H01L23/49838 , H01L2924/0002 , H01L2924/15173 , H05K1/0271 , H05K2201/10734 , H01L2924/00
摘要： A chip carrier constituted of an organic laminate which incorporates structure compensating for thermal deformation of the carrier. Moreover, disclosed is a method of counteracting the thermal deformations encountered by chip carriers, especially during solder reflow, which is predicated on the uniformly, equidistant positioning of metal-plated through-holes (PTH) formed in the chip carrier relative to contact pads. A plurality of plated through-holes (PTH) are positioned equidistantly relative to contact (BGA) pads on a surface of a substrate which is constituted of an organic laminate material, so as to be able to control both in-plane and out-of-plane thermal deformations in the chip carrier material which may be occasioned in a solder reflow furnace or oven.
摘要翻译： 由有机层压板构成的芯片载体，其结合补偿载体热变形的结构。 此外，公开了一种抵消芯片载体遇到的热变形的方法，特别是在焊料回流期间，其基于形成在芯片载体中的金属镀通孔（PTH）相对于接触焊盘的均匀等距定位。 多个电镀通孔（PTH）相对于由有机层压材料构成的基板的表面上的接触（BGA）焊盘等距定位，以便能够同时控制平面内和外侧 可能在焊料回流炉或烘箱中发生的芯片载体材料中的平面热变形。
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公开(公告)号：US06967389B2
公开(公告)日：2005-11-22
申请号：US10744368
申请日：2003-12-23
IPC分类号： H01L23/538 , H01L25/065 , H01L23/58
CPC分类号： H01L24/19 , H01L23/5389 , H01L24/24 , H01L25/0655 , H01L2224/04105 , H01L2224/20 , H01L2224/24137 , H01L2224/24227 , H01L2224/32225 , H01L2224/32245 , H01L2224/73267 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/12042 , H01L2924/12044 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/00
摘要： A semiconductor chip module and forming method is provided. The module includes a support member having at least one well being open to receive a semiconductor chip. Each well depth is substantially equal to the thickness of a chip. The support member has a planar region surrounding each well. A chip is in each well. A dielectric sheet of material is laminated over each chip and extends onto the planar area surrounding the wells and has a face oriented away from the chip. Electrical circuitry including capture pads is formed on the face of the dielectric sheet and extends onto the sheet that overlies the planar region. Conducting vias are formed in the dielectric sheet connecting the electrical circuitry on the dielectric sheet with the contact pads on the chip. A multilayer, circuitized laminate having a fan-out pattern is laminated to the dielectric sheet.
摘要翻译： 提供了一种半导体芯片模块和形成方法。 模块包括具有至少一个开口以容纳半导体芯片的阱的支撑构件。 每个阱深度基本上等于芯片的厚度。 支撑构件具有围绕每个孔的平面区域。 一个芯片在每个井。 绝缘片材料层叠在每个芯片上并延伸到围绕阱的平面区域上并具有远离芯片的面。 包括捕获垫的电路形成在电介质片的表面上并延伸到覆盖在平面区域上的片上。 导电通孔形成在将电介质片上的电路与芯片上的接触焊盘连接的电介质片中。 将具有扇出图案的多层电路叠层体叠层在电介质片上。
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公开(公告)号：US06759270B2
公开(公告)日：2004-07-06
申请号：US10660261
申请日：2003-09-11
IPC分类号： H01L2144
CPC分类号： H01L24/19 , H01L23/5389 , H01L24/24 , H01L25/0655 , H01L2224/04105 , H01L2224/20 , H01L2224/24137 , H01L2224/24227 , H01L2224/32225 , H01L2224/32245 , H01L2224/73267 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/12042 , H01L2924/12044 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/00
摘要： A semiconductor chip module and forming method is provided. The module includes a support member having at least one well being open to receive a semiconductor chip. Each well depth is substantially equal to the thickness of a chip. The support member has a planar region surrounding each well. A chip is in each well. A dielectric sheet of material is laminated over each chip and extends onto the planar area surrounding the wells and has a face oriented away from the chip. Electrical circuitry including capture pads is formed on the face of the dielectric sheet and extends onto the sheet that overlies the planar region. Conducting vias are formed in the dielectric sheet connecting the electrical circuitry on the dielectric sheet with the contact pads on the chip. A multilayer, circuitized laminate having a fan-out pattern is laminated to the dielectric sheet.
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公开(公告)号：US06756662B2
公开(公告)日：2004-06-29
申请号：US10254414
申请日：2002-09-25
IPC分类号： H01L2302
CPC分类号： H01L24/19 , H01L23/5389 , H01L24/24 , H01L25/0655 , H01L2224/04105 , H01L2224/20 , H01L2224/24137 , H01L2224/24227 , H01L2224/32225 , H01L2224/32245 , H01L2224/73267 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/12042 , H01L2924/12044 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/00
摘要： A semiconductor chip module and forming method is provided. The module includes a support member having at least one well being open to receive a semiconductor chip. Each well depth is substantially equal to the thickness of a chip. The support member has a planar region surrounding each well. A chip is in each well. A dielectric sheet of material is laminated over each chip and extends onto the planar area surrounding the wells and has a face oriented away from the chip. Electrical circuitry including capture pads is formed on the face of the dielectric sheet and extends onto the sheet that overlies the planar region. Conducting vias are formed in the dielectric sheet connecting the electrical circuitry on the dielectric sheet with the contact pads on the chip. A multilayer, circuitized laminate having a fan-out pattern is laminated to the dielectric sheet.
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5.发明授权Method for making circuitized substrates having photo-imageable dielectric layers in a continuous manner 失效以连续的方式制造具有光可成像电介质层的电路化基板的方法公开(公告)号：US07977034B1
公开(公告)日：2011-07-12
申请号：US12657394
申请日：2010-01-20
CPC分类号： H05K3/4641 , H05K3/064 , H05K3/4069 , H05K3/427 , H05K3/44 , H05K3/445 , H05K3/462 , H05K2201/0355 , H05K2201/09536 , H05K2201/096 , H05K2201/10378 , H05K2203/0143 , H05K2203/068 , H05K2203/1545 , H05K2203/1572 , Y10T29/49126 , Y10T29/49128 , Y10T29/49155 , Y10T29/49165
摘要： Apparatus and method for making circuitized substrates using a continuous roll format in which a layer of conductor is fed into the apparatus, layers of photo-imageable dielectric are applied to opposite sides of the conductor layer, thru-holes are formed through the composite, and then metal layers are added over the dielectric and then patterns (e.g., circuit) are formed therein. Several operations are performed in addition to these to form the final end product, a circuitized substrate (e.g., printed circuit board), all while the conductor layer of the product is retained in a solid format, up to the final separation from the continuous layer.
摘要翻译： 使用连续辊式制造电路化基板的装置和方法，其中导体层被馈送到装置中，可光成像电介质层被施加到导体层的相对侧，穿过复合材料形成通孔， 然后在电介质上添加金属层，然后在其中形成图案（例如电路）。 除了这些之外，还进行了几个操作以形成最终终端产品，电路化基板（例如，印刷电路板），同时产品的导体层保持为固体形式，直到与连续层的最终分离 。
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6.发明授权Apparatus for making circuitized substrates having photo-imageable dielectric layers in a continuous manner 失效用于以连续方式制造具有光可成像电介质层的电路化基板的装置公开(公告)号：US07827682B2
公开(公告)日：2010-11-09
申请号：US11110920
申请日：2005-04-21
CPC分类号： H05K3/4641 , H05K3/064 , H05K3/4069 , H05K3/427 , H05K3/44 , H05K3/445 , H05K3/462 , H05K2201/0355 , H05K2201/09536 , H05K2201/096 , H05K2201/10378 , H05K2203/0143 , H05K2203/068 , H05K2203/1545 , H05K2203/1572 , Y10T29/49126 , Y10T29/49128 , Y10T29/49155 , Y10T29/49165
摘要： Apparatus and method for making circuitized substrates using a continuous roll format in which a layer of conductor is fed into the apparatus, layers of photo-imageable dielectric are applied to opposite sides of the conductor layer, thru-holes are formed through the composite, and then metal layers are added over the dielectric and then patterns (e.g., circuit) are formed therein. Several operations are performed in addition to these to form the final end product, a circuitized substrate (e.g., printed circuit board), all while the conductor layer of the product is retained in a solid format, up to the final separation from the continuous layer.
摘要翻译： 使用连续辊式制造电路化基板的装置和方法，其中导体层被馈送到装置中，可光成像电介质层被施加到导体层的相对侧，穿过复合材料形成通孔， 然后在电介质上添加金属层，然后在其中形成图案（例如电路）。 除了这些之外，还进行了几个操作以形成最终终端产品，电路化基板（例如，印刷电路板），同时产品的导体层保持为固体形式，直到与连续层的最终分离 。
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7.发明授权Through hole in a photoimageable dielectric structure with wired and uncured dielectric 失效透光电介质结构中的通孔，有线和未固化电介质公开(公告)号：US06521844B1
公开(公告)日：2003-02-18
申请号：US09430076
申请日：1999-10-29
申请人： Stephen J. Fuerniss , Gary Johansson , Ross W. Keesler , John M. Lauffer , Voya R. Markovich , Peter A. Moschak , David J. Russell , William E. Wilson
发明人： Stephen J. Fuerniss , Gary Johansson , Ross W. Keesler , John M. Lauffer , Voya R. Markovich , Peter A. Moschak , David J. Russell , William E. Wilson
IPC分类号： H05K100
CPC分类号： H05K3/0023 , H05K1/056 , H05K3/445 , H05K3/4641 , H05K2203/1476 , Y10T29/49165
摘要： An electronic structure. The electronic structure comprises a layer. The layer includes: a cylindrical volume; a fully cured annular volume of a photoimageable dielectric (PID) material circumscribing the cylindrical volume; and a partially cured remaining volume of the PID material circumscribing the annular volume. The cylindrical volume may include a via. The structure can include a power plane.
摘要翻译： 电子结构。 电子结构包括一层。 该层包括：圆柱体积; 完全固化的圆环体积的环绕光学成像的电介质（PID）材料; 以及围绕环形体积的PID材料的部分固化的剩余容积。 圆柱体积可以包括通孔。 该结构可以包括电力平面。
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8.发明申请CIRCUITIZED SUBSTRATE WITH INTERNAL THIN FILM CAPACITOR AND METHOD OF MAKING SAME 审中-公开具有内薄膜电容器的电路衬底及其制造方法公开(公告)号：US20120228014A1
公开(公告)日：2012-09-13
申请号：US13042578
申请日：2011-03-08
CPC分类号： H05K1/162 , H01G4/33 , H01G4/38 , H05K1/0231 , H05K3/4608 , H05K2201/017 , H05K2201/0179
摘要： A circuitized substrate for use in such electrical structures as information handling systems wherein the substrate includes a capacitive substrate as part thereof. The capacitive substrate includes a thin film layer of capacitive material strategically positioned on a conductive layer relative to added electrically conductive elements to in turn provide a plurality of internal capacitors within the final circuitized substrate during operation thereof. A method of making such a circuitized substrate is also provided.
摘要翻译： 一种用于诸如信息处理系统的电气结构中的电路化基板，其中所述基板包括作为其一部分的电容基板。 电容性衬底包括相对于添加的导电元件策略性地定位在导电层上的电容材料薄层，从而在其操作期间在最终电路化衬底内提供多个内部电容器。 还提供了制造这种电路化基板的方法。
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9.发明申请METHOD FOR MAKING CIRCUITIZED SUBSTRATES HAVING PHOTO-IMAGEABLE DIELECTRIC LAYERS IN A CONTINUOUS MANNER 失效用于制造连续摄像机中具有可见光电介质层的电路基板的方法公开(公告)号：US20110173809A1
公开(公告)日：2011-07-21
申请号：US12657394
申请日：2010-01-20
CPC分类号： H05K3/4641 , H05K3/064 , H05K3/4069 , H05K3/427 , H05K3/44 , H05K3/445 , H05K3/462 , H05K2201/0355 , H05K2201/09536 , H05K2201/096 , H05K2201/10378 , H05K2203/0143 , H05K2203/068 , H05K2203/1545 , H05K2203/1572 , Y10T29/49126 , Y10T29/49128 , Y10T29/49155 , Y10T29/49165
摘要： Apparatus and method for making circuitized substrates using a continuous roll format in which a layer of conductor is fed into the apparatus, layers of photo-imageable dielectric are applied to opposite sides of the conductor layer, thru-holes are formed through the composite, and then metal layers are added over the dielectric and then patterns (e.g., circuit) are formed therein. Several operations are performed in addition to these to form the final end product, a circuitized substrate (e.g., printed circuit board), all while the conductor layer of the product is retained in a solid format, up to the final separation from the continuous layer.
摘要翻译： 使用连续辊式制造电路化基板的装置和方法，其中导体层被馈送到装置中，可光成像电介质层被施加到导体层的相对侧，穿过复合材料形成通孔， 然后在电介质上添加金属层，然后在其中形成图案（例如电路）。 除了这些之外，还进行了几个操作以形成最终终端产品，电路化基板（例如，印刷电路板），同时产品的导体层保持为固体形式，直到与连续层的最终分离 。
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公开(公告)号：US06830875B2
公开(公告)日：2004-12-14
申请号：US10266020
申请日：2002-10-07
申请人： Stephen J. Fuerniss , Gary Johansson , Ross W. Keesler , John M. Lauffer , Voya R. Markovich , Peter A. Moschak , David J. Russell , William E. Wilson
发明人： Stephen J. Fuerniss , Gary Johansson , Ross W. Keesler , John M. Lauffer , Voya R. Markovich , Peter A. Moschak , David J. Russell , William E. Wilson
IPC分类号： G03F700
CPC分类号： H05K3/0023 , H05K1/056 , H05K3/445 , H05K3/4641 , H05K2203/1476 , Y10T29/49165
摘要： A method for forming an electronic structure. Provides is a layer that includes a cylindrical volume of a photoimageable dielectric (PID) material, an annular volume of the PID material circumscribing the cylindrical volume, and a remaining volume of the PID material circumscribing the annular volume. The layer is photolithograhically exposed to radiation. The annular volume is fully cured by the radiation. The remaining volume is partially cured by the remaining volume by said radiation. The method prevents curing of the cylindrical volume, wherein the PID material in the cylindrical volume remains uncured.
摘要翻译： 一种形成电子结构的方法。 提供是包括可光成像电介质（PID）材料的圆柱体积，围绕圆柱体积的PID材料的环形体积以及围绕环形体积的PID材料的剩余体积的层。 该层被光刻地暴露于辐射。 环形体积被辐射完全固化。 剩余体积由所述辐射的剩余体积部分固化。 该方法防止圆柱体积的固化，其中圆柱体积中的PID材料保持未固化。
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