公开(公告)号：US07999356B2

公开(公告)日：2011-08-16

申请号：US12548492

申请日：2009-08-27

申请人： Yasushi Nakasaki ,  Nobuhide Yamada ,  Miyoko Shimada ,  Hideshi Miyajima ,  Kei Watanabe

发明人： Yasushi Nakasaki ,  Nobuhide Yamada ,  Miyoko Shimada ,  Hideshi Miyajima ,  Kei Watanabe

IPC分类号： H01L23/58

CPC分类号： H01L21/76801 ,  C07F7/1804 ,  H01L21/02126 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/02282 ,  H01L21/02337 ,  H01L21/02348 ,  H01L21/02351 ,  H01L21/3105 ,  H01L21/31633 ,  H01L21/67109 ,  H01L21/67115

摘要： According to one aspect of the present invention, there is provided a composition for film formation, comprising a compound represented by general formula (I) or a hydrolyzed-dehydrocondensation product thereof: X13-mR1mSiR2SiR3nX23-n  (I) wherein R1 and R3 represent a hydrogen atom or a monovalent substituent; R2 represents a divalent group having an alicyclic structure with four carbon atoms or a derivative of the divalent group; X1 and X2 represent a hydrolysable group; and m and n are an integer of from 0 to 2.

摘要翻译： 根据本发明的一个方面，提供一种成膜用组合物，其包含通式（I）表示的化合物或其水解脱氢产物：X13-mR1mSiR2SiR3nX23-n（Ⅰ），其中R1和R3表示 氢原子或一价取代基; R2表示具有四个碳原子的脂环结构或二价基团的衍生物的二价基团; X1和X2表示可水解基团; m和n为0〜2的整数。

公开(公告)号：US20100072581A1

公开(公告)日：2010-03-25

申请号：US12548492

申请日：2009-08-27

申请人： Yasushi Nakasaki ,  Nobuhide Yamada ,  Miyoko Shimada ,  Hideshi Miyajima ,  Kei Watanabe

发明人： Yasushi Nakasaki ,  Nobuhide Yamada ,  Miyoko Shimada ,  Hideshi Miyajima ,  Kei Watanabe

IPC分类号： H01L29/06 ,  H01L21/31 ,  C07F7/18

CPC分类号： H01L21/76801 ,  C07F7/1804 ,  H01L21/02126 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/02282 ,  H01L21/02337 ,  H01L21/02348 ,  H01L21/02351 ,  H01L21/3105 ,  H01L21/31633 ,  H01L21/67109 ,  H01L21/67115

摘要： According to one aspect of the present invention, there is provided a composition for film formation, comprising a compound represented by general formula (I) or a hydrolyzed-dehydrocondensation product thereof: X13-mR1mSiR2SiR3nX23-n  (I) wherein R1 and R3 represent a hydrogen atom or a monovalent substituent; R2 represents a divalent group having an alicyclic structure with four carbon atoms or a derivative of the divalent group; X1 and X2 represent a hydrolysable group; and m and n are an integer of from 0 to 2.

摘要翻译： 根据本发明的一个方面，提供一种成膜用组合物，其包含通式（I）表示的化合物或其水解脱氢产物：X13-mR1mSiR2SiR3nX23-n（Ⅰ），其中R1和R3表示 氢原子或一价取代基; R2表示具有四个碳原子的脂环结构或二价基团的衍生物的二价基团; X1和X2表示可水解基团; m和n为0〜2的整数。

公开(公告)号：US20120091420A1

公开(公告)日：2012-04-19

申请号：US13052165

申请日：2011-03-21

申请人： Haruka KUSAI ,  Shosuke Fujii ,  Yasushi Nakasaki

发明人： Haruka KUSAI ,  Shosuke Fujii ,  Yasushi Nakasaki

IPC分类号： H01L45/00

CPC分类号： H01L45/085 ,  G11C11/5685 ,  G11C13/0007 ,  G11C2213/15 ,  G11C2213/33 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/148

摘要： According to one embodiment a first variable resistance layer which is arranged between a second electrode and a first electrode and in which a first conductive filament is capable of growing based on metal supplied from the second electrode, and an n-th variable resistance layer which is arranged between an n-th electrode and an (n+1)-th electrode and in which an n-th conductive filament whose growth rate is different from the first conductive filament is capable of growing based on metal supplied from the (n+1)-th electrode are included, a configuration in which a plurality of conductive filaments is electrically connected in series between the first electrode layer and the (n+1)-th electrode layer is included, and a resistance is changed in a stepwise manner.

摘要翻译： 根据一个实施例，布置在第二电极和第一电极之间并且第一导电细丝能够基于从第二电极提供的金属生长的第一可变电阻层，以及第n可变电阻层，其是第 布置在第n电极和第（n + 1）电极之间，并且其中生长速度不同于第一导电细丝的第n导电细丝能够基于从第（n + 1）个 ）电极，包括在第一电极层和第（n + 1）电极层之间串联电连接多根导电丝的结构，并且电阻以逐步的方式改变。

公开(公告)号：US08154072B2

公开(公告)日：2012-04-10

申请号：US12403493

申请日：2009-03-13

申请人： Masahiro Koike ,  Yuichiro Mitani ,  Tatsuo Shimizu ,  Naoki Yasuda ,  Yasushi Nakasaki ,  Akira Nishiyama

发明人： Masahiro Koike ,  Yuichiro Mitani ,  Tatsuo Shimizu ,  Naoki Yasuda ,  Yasushi Nakasaki ,  Akira Nishiyama

IPC分类号： H01L29/788

CPC分类号： H01L29/7881 ,  H01L21/28273 ,  H01L21/28282 ,  H01L27/11521 ,  H01L29/513

摘要： A nonvolatile semiconductor memory apparatus includes: a source and drain regions formed at a distance from each other in a semiconductor layer; a first insulating film formed on the semiconductor layer located between the source region and the drain region, the first insulating film including a first insulating layer and a second insulating layer formed on the first insulating layer and having a higher dielectric constant than the first insulating layer, the second insulating layer having a first site performing hole trapping and releasing, the first site being formed by adding an element different from a base material to the second insulating film, the first site being located at a lower level than a Fermi level of a material forming the semiconductor layer; a charge storage film formed on the first insulating film; a second insulating film formed on the charge storage film; and a control gate electrode formed on the second insulating film.

摘要翻译： 一种非易失性半导体存储器件，包括：在半导体层中形成为彼此间隔一定距离的源区和漏区; 形成在位于源极区域和漏极区域之间的半导体层上的第一绝缘膜，所述第一绝缘膜包括形成在所述第一绝缘层上并具有比所述第一绝缘层高的介电常数的第一绝缘层和第二绝缘层 所述第二绝缘层具有进行孔捕获和释放的第一部位，所述第一部位通过将不同于基材的元素添加到所述第二绝缘膜而形成，所述第一部位位于比所述第二绝缘膜的费米能级更低的水平 形成半导体层的材料; 形成在所述第一绝缘膜上的电荷存储膜; 形成在电荷存储膜上的第二绝缘膜; 以及形成在所述第二绝缘膜上的控制栅电极。

公开(公告)号：US08115261B2

公开(公告)日：2012-02-14

申请号：US11790854

申请日：2007-04-27

申请人： Tsunehiro Ino ,  Yasushi Nakasaki

发明人： Tsunehiro Ino ,  Yasushi Nakasaki

IPC分类号： H01L29/94

CPC分类号： H01L21/31604 ,  C23C14/08 ,  C23C14/5806 ,  C23C14/5853 ,  H01L21/02148 ,  H01L21/02159 ,  H01L21/02161 ,  H01L21/02266 ,  H01L21/02337 ,  H01L21/02356 ,  H01L21/28194 ,  H01L21/28282 ,  H01L21/31608 ,  H01L21/31641 ,  H01L21/31645 ,  H01L27/115 ,  H01L27/11526 ,  H01L27/11546 ,  H01L27/11568 ,  H01L29/513 ,  H01L29/517 ,  H01L29/7881 ,  H01L29/792

摘要： It is made possible to provide a semiconductor device and a method for manufacturing the semiconductor device that have the highest possible permittivity and can be produced at low production costs. A method for manufacturing a semiconductor device, includes: forming an amorphous film containing (HfzZr1-z)xSi1-xO2-y (0.81≦x≦0.99, 0.04≦y≦0.25, 0≦z≦1) on a semiconductor substrate, the ranges of composition ratios x, y, and z being values measured by XPS; and transforming the amorphous film into an insulating film containing (HfzZr1-z)xSi1-xO2 as tetragonal crystals, by performing annealing at 750° C. or higher on the amorphous film in an atmosphere containing oxygen.

摘要翻译： 可以提供具有最高可能的介电常数并且可以以低生产成本制造的半导体器件的半导体器件和制造方法。 一种半导体器件的制造方法，其特征在于，在半导体衬底上形成含有（Hf z Zr 1-z）x Si 1-x O 2-y（0.81≤n1E; x＆nlE; 0.99,0.04＆nlE; y＆nlE; 0.25,0＆nlE; z＆nlE; 1） ，组成比x，y和z的范围是通过XPS测量的值; 并通过在含有氧气的气氛中在非晶膜上进行750℃以上的退火，将非晶质膜变形为含有（Hf z Zr 1-z）x Si 1-x O 2的四方晶体的绝缘膜。

公开(公告)号：US07999303B2

公开(公告)日：2011-08-16

申请号：US12353586

申请日：2009-01-14

申请人： Shoko Kikuchi ,  Yasushi Nakasaki ,  Koichi Muraoka

发明人： Shoko Kikuchi ,  Yasushi Nakasaki ,  Koichi Muraoka

IPC分类号： H01L29/788

CPC分类号： H01L27/11568 ,  H01L21/28282 ,  H01L29/513 ,  H01L29/517 ,  H01L29/78

摘要： The present invention provides a high-performance MONOS-type NAND-type nonvolatile semiconductor memory device using an aluminum oxide film as a part of gate insulating film in a select transistor and as a block insulating film in a memory transistor. The NAND-type nonvolatile semiconductor memory device has, on a semiconductor substrate, a plurality of memory cell transistors connected to each other in series and a select transistor. The memory cell transistor includes a first insulating film on the semiconductor substrate, a charge trapping layer, a second insulating film made of aluminum oxide,a first control gate electrode, and a first source/drain region. The select transistor includes a third insulating film on the semiconductor substrate, a fourth insulating film made of an aluminum oxide containing at least one of a tetravalent cationic element, a pentavalent cationic element, and N (nitrogen), a second control gate electrode, and a second source/drain region.

摘要翻译： 本发明提供一种在选择晶体管中使用氧化铝膜作为栅绝缘膜的一部分的高性能MONOS型NAND型非易失性半导体存储器件，并且作为存储晶体管中的块绝缘膜。 NAND型非易失性半导体存储器件在半导体衬底上具有串联连接的多个存储单元晶体管和选择晶体管。 存储单元晶体管包括半导体衬底上的第一绝缘膜，电荷俘获层，由氧化铝制成的第二绝缘膜，第一控制栅极电极和第一源极/漏极区域。 选择晶体管包括半导体衬底上的第三绝缘膜，由包含四价阳离子元素，五价阳离子元素和N（氮）中的至少一种的氧化铝制成的第四绝缘膜，第二控制栅电极和 第二源极/漏极区域。

公开(公告)号：US07816215B2

公开(公告)日：2010-10-19

申请号：US10941814

申请日：2004-09-16

申请人： Daisuke Matsushita ,  Koichi Muraoka ,  Seiji Inumiya ,  Koichi Kato ,  Kazuhiro Eguchi ,  Mariko Takayanagi ,  Yasushi Nakasaki

发明人： Daisuke Matsushita ,  Koichi Muraoka ,  Seiji Inumiya ,  Koichi Kato ,  Kazuhiro Eguchi ,  Mariko Takayanagi ,  Yasushi Nakasaki

IPC分类号： H01L21/336

CPC分类号： H01L21/28202 ,  H01L21/022 ,  H01L21/02329 ,  H01L21/0234 ,  H01L21/3144 ,  H01L29/513 ,  H01L29/518

摘要： A semiconductor device manufacturing method comprises: forming a gate insulative film on a semiconductor substrate by: forming a first nitride film on the substrate; forming a first oxide film and a second oxide film, the first oxide film being between the substrate and the first nitride film, the second oxide film being on the first nitride film; and nitriding the second oxide film to form, on the first nitride film, one of either: a second nitride film or an SiON film; and forming a gate electrode on the gate insulative film; wherein the equivalent oxide thickness of the gate insulative film is equal to or less than 1 nm.

摘要翻译： 一种半导体器件制造方法，包括：在半导体衬底上形成栅极绝缘膜，方法是在衬底上形成第一氮化物膜; 形成第一氧化物膜和第二氧化物膜，所述第一氧化膜位于所述衬底和所述第一氮化物膜之间，所述第二氧化物膜位于所述第一氮化物膜上; 并且对所述第二氧化物膜进行氮化以在所述第一氮化物膜上形成以下之一：第二氮化物膜或SiON膜; 并在所述栅极绝缘膜上形成栅电极; 其中所述栅绝缘膜的等效氧化物厚度等于或小于1nm。

公开(公告)号：US20090134479A1

公开(公告)日：2009-05-28

申请号：US12320280

申请日：2009-01-22

申请人： Yuuichi Kamimuta ,  Akira Nishiyama ,  Yasushi Nakasaki ,  Tsunehiro Ino ,  Masato Koyama

发明人： Yuuichi Kamimuta ,  Akira Nishiyama ,  Yasushi Nakasaki ,  Tsunehiro Ino ,  Masato Koyama

IPC分类号： H01L29/78

CPC分类号： H01L27/11521 ,  H01L21/28194 ,  H01L21/28202 ,  H01L29/4933 ,  H01L29/4975 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/665 ,  H01L29/6659 ,  H01L29/7833

摘要： It is possible to prevent the deterioration of device characteristic as much as possible. A semiconductor device includes: a semiconductor substrate; a gate insulating film provided above the semiconductor substrate and containing a metal, oxygen and an additive element; a gate electrode provided above the gate insulating film; and source/drain regions provided in the semiconductor substrate on both sides of the gate electrode. The additive element is at least one element selected from elements of Group 5, 6, 15, and 16 at a concentration of 0.003 atomic % or more but 3 atomic % or less.

公开(公告)号：US20070222003A1

公开(公告)日：2007-09-27

申请号：US11802684

申请日：2007-05-24

申请人： Daisuke Matsushita ,  Koichi Muraoka ,  Yasushi Nakasaki ,  Koichi Kato ,  Takashi Shimizu

发明人： Daisuke Matsushita ,  Koichi Muraoka ,  Yasushi Nakasaki ,  Koichi Kato ,  Takashi Shimizu

IPC分类号： H01L29/76

CPC分类号： H01L21/02112 ,  H01L21/02274 ,  H01L21/28202 ,  H01L21/3143 ,  H01L21/318 ,  H01L29/513 ,  H01L29/518 ,  H01L29/78

摘要： According to an aspect of the present invention, there is disclosed a semiconductor device comprising a semiconductor substrate, and a gate insulating film of a P-channel MOS transistor, formed on the semiconductor substrate. The gate insulating film has an oxide film (SiO2), and a diffusion preventive film (BN) containing boron and nitrogen atoms.

公开(公告)号：US20060175672A1

公开(公告)日：2006-08-10

申请号：US11197593

申请日：2005-08-05

申请人： Daisuke Matsushita ,  Koichi Muraoka ,  Yasushi Nakasaki ,  Koichi Kato ,  Takashi Shimizu

发明人： Daisuke Matsushita ,  Koichi Muraoka ,  Yasushi Nakasaki ,  Koichi Kato ,  Takashi Shimizu

IPC分类号： H01L29/94 ,  H01L21/8238

CPC分类号： H01L21/02112 ,  H01L21/02274 ,  H01L21/28202 ,  H01L21/3143 ,  H01L21/318 ,  H01L29/513 ,  H01L29/518 ,  H01L29/78

摘要： According to an aspect of the present invention, there is disclosed a semiconductor device comprising a semiconductor substrate, and a gate insulating film of a P-channel MOS transistor, formed on the semiconductor substrate. The gate insulating film has an oxide film (SiO2), and a diffusion preventive film (BN) containing boron and nitrogen atoms.

摘要翻译： 根据本发明的一个方面，公开了一种半导体器件，包括半导体衬底和形成在半导体衬底上的P沟道MOS晶体管的栅极绝缘膜。 栅极绝缘膜具有氧化膜（SiO 2）和含有硼和氮原子的防扩散膜（BN）。