利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

15 条记录 (耗时 0.019 秒)

    Trench substrate
    2.
    发明授权
    Trench substrate 有权
    沟槽衬底

    公开(公告)号：US08072052B2

    公开(公告)日：2011-12-06

    申请号：US12463945

    申请日：2009-05-11

    申请人： Young Gwan Ko ,  Ryoichi Watanabe ,  Sang Soo Lee

    发明人： Young Gwan Ko ,  Ryoichi Watanabe ,  Sang Soo Lee

    IPC分类号： H01L23/495

    CPC分类号： H01L21/486 ,  H01L21/32115 ,  H01L21/4846 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49838 ,  H01L2924/0002 ,  H05K3/045 ,  H05K3/06 ,  H05K3/465 ,  H05K2201/09036 ,  H05K2201/09781 ,  H05K2203/0723 ,  H01L2924/00

    摘要： Disclosed herein are a trench substrate and a method of manufacturing the same. The trench substrate includes a base substrate, an insulating layer formed on one side or both sides of the base substrate and including trenches formed in a circuit region and a dummy region positioned at a peripheral edge of the trench substrate, and a circuit layer formed in the trenches of the circuit region through a plating process and including a circuit pattern and vias. Thanks to formation of the trenches in the dummy region and the cutting region, deviation in thickness of a plating layer formed on the insulating layer in a plating process is improved upon.

    摘要翻译： 这里公开了沟槽衬底及其制造方法。 沟槽基板包括基底基板，形成在基底基板的一侧或两侧上的绝缘层，并且包括形成在电路区域中的沟槽和位于沟槽基板的周边边缘的虚设区域，以及电路层， 通过电镀工艺的电路区域的沟槽，并且包括电路图案和通孔。 由于在虚拟区域和切割区域中形成沟槽，因此在电镀工艺中在绝缘层上形成的镀层的厚度偏差得到改善。

    METHOD OF MANUFACTURING PRINTED CIRCUIT BOARD
    3.
    发明申请
    METHOD OF MANUFACTURING PRINTED CIRCUIT BOARD 审中-公开
    制造印刷电路板的方法

    公开(公告)号：US20110089138A1

    公开(公告)日：2011-04-21

    申请号：US12634649

    申请日：2009-12-09

    申请人： Young Gwan Ko ,  Ryoichi Watanabe ,  Sang Soo Lee ,  Hee Bum Shin ,  Se Won Park ,  Chil Woo Kwon

    发明人： Young Gwan Ko ,  Ryoichi Watanabe ,  Sang Soo Lee ,  Hee Bum Shin ,  Se Won Park ,  Chil Woo Kwon

    IPC分类号： B44C1/22

    CPC分类号： H05K3/465 ,  H05K3/107 ,  H05K2201/10204

    摘要： Disclosed is a method of manufacturing a printed circuit board, including (A) forming a first circuit layer on a base substrate and forming a first insulating layer thereon, (B) forming trenches including dummy trenches and wiring trenches on the first insulating layer and plating the trenches, thus providing a trench circuit layer including a dummy circuit pattern and a wiring circuit pattern, (C) removing the dummy circuit pattern of the trench circuit layer, and (D) forming a second insulating layer on the trench circuit layer from which the dummy circuit pattern was removed. The method reduces deviation of plating thickness and thus realizes the design density of a trench circuit layer.

    摘要翻译： 公开了一种制造印刷电路板的方法，包括（A）在基底基板上形成第一电路层并在其上形成第一绝缘层，（B）在第一绝缘层和电镀上形成包括虚设沟槽和布线沟槽的沟槽 沟槽，从而提供包括虚拟电路图案和布线电路图案的沟槽电路层，（C）去除沟槽电路层的虚设电路图案，（D）在沟槽电路层上形成第二绝缘层， 去除虚拟电路图案。 该方法减小了镀层厚度的偏差，从而实现了沟槽电路层的设计密度。

    Printed circuit board and method of fabricating the same
    4.
    发明授权
    Printed circuit board and method of fabricating the same 有权
    印刷电路板及其制造方法

    公开(公告)号：US08234781B2

    公开(公告)日：2012-08-07

    申请号：US12559443

    申请日：2009-09-14

    申请人： Young Gwan Ko

    发明人： Young Gwan Ko

    IPC分类号： H01R9/00 ,  H05K3/00

    CPC分类号： H05K3/4682 ,  H01L21/4857 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49894 ,  H01L2924/0002 ,  H05K3/0097 ,  H05K3/045 ,  H05K2201/0376 ,  H05K2203/0108 ,  H05K2203/0733 ,  Y10T29/49128 ,  Y10T29/49147 ,  Y10T29/49155 ,  H01L2924/00

    摘要： Disclosed is a printed circuit board, which includes an insulating member having a circuit pattern embedded in one surface thereof, a build-up layer formed on one surface of the insulating member and including a build-up insulating layer and a circuit layer formed in the build-up insulating layer and having a via connected to the circuit pattern, and a solder resist layer formed on the build-up layer. A method of fabricating the printed circuit board is also provided. The printed circuit board is fabricated using a build-up process and the outermost circuit layer thereof is formed to have an embedded structure using an imprinting process, thus minimizing the separation of the circuit layer and reducing the lead time and the fabrication cost.

    摘要翻译： 公开了一种印刷电路板，其包括具有嵌入其一个表面中的电路图案的绝缘构件，形成在所述绝缘构件的一个表面上并包括积聚绝缘层和形成在所述绝缘构件中的电路层的积聚层 并且具有连接到电路图案的通孔，以及形成在积聚层上的阻焊层。 还提供了制造印刷电路板的方法。 印刷电路板使用积聚工艺制造，并且其最外面的电路层被形成为具有使用压印工艺的嵌入式结构，从而最小化电路层的分离并减少了交货时间和制造成本。

    Method of manufacturing a printed circuit board
    5.
    发明授权
    Method of manufacturing a printed circuit board 有权
    印刷电路板的制造方法

    公开(公告)号：US08196293B2

    公开(公告)日：2012-06-12

    申请号：US12634617

    申请日：2009-12-09

    申请人： Young Gwan Ko

    发明人： Young Gwan Ko

    IPC分类号： H05K3/36

    CPC分类号： H05K3/462 ,  H05K3/007 ,  H05K3/107 ,  H05K3/28 ,  H05K3/4602 ,  H05K2201/09536 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49165

    摘要： Disclosed are a printed circuit board including a core substrate including core circuit layers on both sides thereof, a first build-up layer formed on one side of the core substrate, a second build-up layer formed on the other side of the core substrate, and first and second protective layers formed on the first and second build-up layers, respectively, wherein the first build-up layer includes a trench circuit layer as an outermost circuit layer formed by a trench technology, the trench circuit layer is embedded in the first protective layer, and an outermost circuit layer of the second build-up layer is embedded in an outermost insulating layer of the second build-up layer, and a method of manufacturing the printed circuit board. Thanks to the formation of the outermost circuit layer by the trench technology, it is difficult to separate the outermost circuit layer from the outermost insulating layer.

    摘要翻译： 公开了一种印刷电路板，其包括其两侧具有芯电路层的芯基板，形成在芯基板的一侧上的第一累积层，形成在芯基板的另一侧上的第二累积层， 以及分别形成在第一和第二堆积层上的第一和第二保护层，其中第一堆积层包括作为通过沟槽技术形成的最外层电路层的沟槽电路层，沟槽电路层嵌入 第一保护层和第二堆积层的最外层电路层嵌入第二堆积层的最外绝缘层中，以及制造印刷电路板的方法。 由于通过沟槽技术形成最外层电路层，难以将最外层电路层与最外层绝缘层分开。

    PRINTED CIRCUIT BOARD HAVING PLATING PATTERN BURIED IN VIA
    6.
    发明申请
    PRINTED CIRCUIT BOARD HAVING PLATING PATTERN BURIED IN VIA 失效
    印有电路板的印刷电路板

    公开(公告)号：US20120111609A1

    公开(公告)日：2012-05-10

    申请号：US13354446

    申请日：2012-01-20

    申请人： Seok Hwan AHN ,  Young Gwan Ko

    发明人： Seok Hwan AHN ,  Young Gwan Ko

    IPC分类号： H05K1/03

    CPC分类号： H05K3/107 ,  H05K3/0032 ,  H05K3/045 ,  H05K3/426 ,  H05K2201/0376 ,  H05K2201/0959 ,  H05K2203/025 ,  H05K2203/1461

    摘要： A printed circuit board having a plating pattern buried in a via. The printed circuit board has: an insulating substrate including an electrically insulating resin; a via hole passing through the insulating substrate; a via including a metal layer formed on an inner wall of the via hole and a filler charged in the via hole; a circuit layer including a circuit pattern buried in the insulating substrate and transmitting an electrical signal; and a plating pattern buried in an end of the filler.

    摘要翻译： 具有掩埋在通孔中的电镀图案的印刷电路板。 印刷电路板具有：包含电绝缘树脂的绝缘基板; 穿过所述绝缘基板的通孔; 通孔，其包括形成在所述通孔的内壁上的金属层和填充在所述通孔中的填充物; 电路层，其包括埋在所述绝缘基板中并传输电信号的电路图案; 以及埋在填料末端的电镀图案。

    PRINTED CIRCUIT BOARD AND METHOD OF FABRICATING THE SAME
    7.
    发明申请
    PRINTED CIRCUIT BOARD AND METHOD OF FABRICATING THE SAME 有权
    印刷电路板及其制造方法

    公开(公告)号：US20110024176A1

    公开(公告)日：2011-02-03

    申请号：US12559443

    申请日：2009-09-14

    申请人： Young Gwan Ko

    发明人： Young Gwan Ko

    IPC分类号： H05K1/11 ,  H05K3/10

    CPC分类号： H05K3/4682 ,  H01L21/4857 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49894 ,  H01L2924/0002 ,  H05K3/0097 ,  H05K3/045 ,  H05K2201/0376 ,  H05K2203/0108 ,  H05K2203/0733 ,  Y10T29/49128 ,  Y10T29/49147 ,  Y10T29/49155 ,  H01L2924/00

    摘要： Disclosed is a printed circuit board, which includes an insulating member having a circuit pattern embedded in one surface thereof, a build-up layer formed on one surface of the insulating member and including a build-up insulating layer and a circuit layer formed in the build-up insulating layer and having a via connected to the circuit pattern, and a solder resist layer formed on the build-up layer. A method of fabricating the printed circuit board is also provided. The printed circuit board is fabricated using a build-up process and the outermost circuit layer thereof is formed to have an embedded structure using an imprinting process, thus minimizing the separation of the circuit layer and reducing the lead time and the fabrication cost.

    摘要翻译： 公开了一种印刷电路板，其包括具有嵌入其一个表面中的电路图案的绝缘构件，形成在所述绝缘构件的一个表面上并包括积聚绝缘层和形成在所述绝缘构件中的电路层的积聚层 并且具有连接到电路图案的通孔，以及形成在积聚层上的阻焊层。 还提供了制造印刷电路板的方法。 印刷电路板使用积聚工艺制造，并且其最外面的电路层被形成为具有使用压印工艺的嵌入式结构，从而最小化电路层的分离并减少了交货时间和制造成本。

    Method of fabricating a printed circuit board
    8.
    发明授权
    Method of fabricating a printed circuit board 有权
    制造印刷电路板的方法

    公开(公告)号：US08729406B2

    公开(公告)日：2014-05-20

    申请号：US12559449

    申请日：2009-09-14

    申请人： Young Gwan Ko

    发明人： Young Gwan Ko

    IPC分类号： H05K1/11

    CPC分类号： H05K1/114 ,  H05K3/0097 ,  H05K3/107 ,  H05K3/4007 ,  H05K3/4682 ,  H05K2201/0352 ,  H05K2201/0367 ,  H05K2203/1536

    摘要： Disclosed is a printed circuit board, which includes an insulating member having a circuit pattern embedded in one surface thereof, a bump pad formed in the insulating member so as to be connected to the circuit pattern and protruding from an outer surface of the insulating member, a build-up layer formed on one surface of the insulating member and including a build-up insulating layer and a circuit layer formed in the build-up insulating layer and having a via connected to the circuit pattern, and a solder resist layer formed on the build-up layer. A method of fabricating the printed circuit board is also provided. The printed circuit board is fabricated using a build-up process and the outermost circuit layer thereof is formed to have an embedded structure using an imprinting process, thus minimizing the separation of the circuit layer and reducing the lead time and the fabrication cost.

    摘要翻译： 公开了一种印刷电路板，其包括具有嵌入其一个表面中的电路图案的绝缘构件，形成在所述绝缘构件中以与所述电路图案连接并从所述绝缘构件的外表面突出的凸块焊盘， 形成在所述绝缘构件的一个表面上并包括积聚绝缘层和形成在所述积层绝缘层中并且具有连接到所述电路图案的通孔的电路层的堆积层，以及形成在所述绝缘层上的阻焊层 积层。 还提供了制造印刷电路板的方法。 印刷电路板使用积聚工艺制造，并且其最外面的电路层被形成为具有使用压印工艺的嵌入式结构，从而最小化电路层的分离并减少了交货时间和制造成本。

    PRINTED CIRCUIT BOARD AND METHOD OF FABRICATING THE SAME
    10.
    发明申请
    PRINTED CIRCUIT BOARD AND METHOD OF FABRICATING THE SAME 有权
    印刷电路板及其制造方法

    公开(公告)号：US20110024180A1

    公开(公告)日：2011-02-03

    申请号：US12559449

    申请日：2009-09-14

    申请人： Young Gwan Ko

    发明人： Young Gwan Ko

    IPC分类号： H05K1/11 ,  H05K3/10

    CPC分类号： H05K1/114 ,  H05K3/0097 ,  H05K3/107 ,  H05K3/4007 ,  H05K3/4682 ,  H05K2201/0352 ,  H05K2201/0367 ,  H05K2203/1536

    摘要： Disclosed is a printed circuit board, which includes an insulating member having a circuit pattern embedded in one surface thereof, a bump pad formed in the insulating member so as to be connected to the circuit pattern and protruding from an outer surface of the insulating member, a build-up layer formed on one surface of the insulating member and including a build-up insulating layer and a circuit layer formed in the build-up insulating layer and having a via connected to the circuit pattern, and a solder resist layer formed on the build-up layer. A method of fabricating the printed circuit board is also provided. The printed circuit board is fabricated using a build-up process and the outermost circuit layer thereof is formed to have an embedded structure using an imprinting process, thus minimizing the separation of the circuit layer and reducing the lead time and the fabrication cost.

    摘要翻译： 公开了一种印刷电路板，其包括具有嵌入其一个表面中的电路图案的绝缘构件，形成在所述绝缘构件中以与所述电路图案连接并从所述绝缘构件的外表面突出的凸块焊盘， 形成在所述绝缘构件的一个表面上并包括积聚绝缘层和形成在所述积层绝缘层中并且具有连接到所述电路图案的通孔的电路层的堆积层，以及形成在所述绝缘层上的阻焊层 积层。 还提供了制造印刷电路板的方法。 印刷电路板使用积聚工艺制造，并且其最外面的电路层被形成为具有使用压印工艺的嵌入式结构，从而最小化电路层的分离并减少了交货时间和制造成本。