摘要:
Disclosed are devices and methods related to radio-frequency (RF) shielding of RF modules. In some embodiments, tuned shielding can be achieved by utilizing different structures and/or arrangements of shielding- wirebonds to increase shielding in areas where needed, and to decrease shielding where not needed. Such tuning of shielding requirements can be obtained by measuring RF power levels at different locations of a module having a given design. Such tuned RF shielding configurations can improve the overall effectiveness of shielding, and can also be more cost effective to implement.
摘要:
A through via is constructed in a two-stage process. A void in a portion of the depth of the substrate is filled from a first surface of the semiconductor substrate creating an enclosed volume within the substrate. Thereafter, the enclosed volume is exposed and the remaining portion of the void is filled.
摘要:
According to one exemplary embodiment, an overmolded package (100, 300) includes a component (102, 302) situated on a substrate (114, 314). The overmolded package further includes an overmold (116, 316) situated over the component and the substrate. The overmolded package further includes a wirebond cage (106, 306) situated over the substrate and in the overmold, where the wirebond cage surrounds the component, and where the wirebond cage includes a number of wirebonds (110a, 110b, 310a, 310b). The wirebond cage forms an EM1 shield around the component. According to this exemplary embodiment, the overmolded package hrther includes a conductive layer (108, 308) situated on a top surface (118, 318) of the overmold and connected to the wirebond cage, where the conductive layer forms an EM 1 shield over the component.
摘要:
According to one exemplary embodiment, an overmolded package (100,300) includes a component (102,302) situated on a substrate (114,314). The overmolded package further includes an overmold ( 116,316) situated over the component and the substrate. The overmolded package further includes a wirebond cage (106,306) situated over the substrate and in the overmold, where the wirebond cage surrounds the component, and where the wirebond cage includes a number of wirebonds (110a,l 10b,310a,310b). The wirebond cage forms an EMI shield around the component. According to this exemplary embodiment, the overmolded package further includes a conductive layer (108,308) situated on a top surface (118,318) of the overmold and connected to the wirebond cage, where the conductive layer forms an EMI shield over the component.
摘要:
A substrate pad in a semiconductor package having a geometry and structure that facilitates providing a solder joint to the pad that has enhanced structural integrity and resistance to mechanical impact. The pad may include a plated metal stud that anchors the solder to the pad interface, providing a more compliant solder joint, even when lead- free solder is used.
摘要:
A through via is constructed in a two-stage process. A void in a portion of the depth of the substrate is filled from a first surface of the semiconductor substrate creating an enclosed volume within the substrate. Thereafter, the enclosed volume is exposed and the remaining portion of the void is filled.
摘要:
According to an exemplary embodiment, a method for fabricating a wafer level package includes forming a polymer layer on a device wafer, where the device wafer includes at least one device wafer contact pad and a device, and where the at least one device wafer contact pad is electrically connected to the device. The method further includes bonding a protective wafer to the device wafer. The method further includes forming at least one via in the protective wafer, where the at least one via extends through the protective wafer and is situated over the at least one device wafer contact pad. The method further includes forming at least one protective wafer contact pad on the protective wafer, where the at least one protective wafer contact pad is situated over the at least one via and electrically connected to the at least one device wafer contact pad.
摘要:
According to an exemplary embodiment, a method for fabricating a wafer level package includes forming a polymer layer on a device wafer, where the device wafer includes at least one device wafer contact pad and a device, and where the at least one device wafer contact pad is electrically connected to the device. The method further includes bonding a protective wafer to the device wafer. The method further includes forming at least one via in the protective wafer, where the at least one via extends through the protective wafer and is situated over the at least one device wafer contact pad. The method further includes forming at least one protective wafer contact pad on the protective wafer, where the at least one protective wafer contact pad is situated over the at least one via and electrically connected to the at least one device wafer contact pad.
摘要:
Disclosed are devices and methods related to radio-frequency (RF) shielding of RF modules. In some embodiments, tuned shielding can be achieved by utilizing different structures and/or arrangements of shielding- wirebonds to increase shielding in areas where needed, and to decrease shielding where not needed. Such tuning of shielding requirements can be obtained by measuring RF power levels at different locations of a module having a given design. Such tuned RF shielding configurations can improve the overall effectiveness of shielding, and can also be more cost effective to implement.
摘要:
According to an exemplary embodiment, a wafer level package includes a device wafer including at least one device wafer contact pad and a device, and where the at least one device wafer contact pad is electrically connected to the device. The wafer level package includes a first polymer layer situated over the device wafer. The wafer level package includes at least one passive component situated over the first polymer layer and having a first terminal and a second terminal. The first terminal of the at least one passive component is electrically connected to the at least one device wafer contact pad. The wafer level package includes a second polymer layer situated over the at least one passive component. The wafer level package includes at least one polymer layer contact pad situated over the second polymer layer and electrically connected to the second terminal of the at least one passive component.