公开(公告)号：WO2007124050A2

公开(公告)日：2007-11-01

申请号：PCT/US2007/009660

申请日：2007-04-19

Applicant: FORMFACTOR, INC. ,  KHANDROS, Igor, K. ,  GRITTERS, John K.

Inventor： KHANDROS, Igor, K. ,  GRITTERS, John K.

IPC: G01R31/02

CPC classification number: G01R31/312 ,  G01R1/06727 ,  G01R1/06744 ,  G01R1/07342 ,  G01R3/00

Abstract: A probe apparatus can include a substrate, a contact structure attached to the substrate, and an electronic component electrically connected to the contact structure. The electronic component can be attached to the contact structure.

Abstract translation: 探针装置可以包括衬底，附接到衬底的接触结构和电连接到接触结构的电子部件。 电子部件可以附接到接触结构。

公开(公告)号：WO2003007003A1

公开(公告)日：2003-01-23

申请号：PCT/US2002/022303

申请日：2002-07-10

Applicant: FORMFACTOR, INC. ,  GRUBE, Gary, W. ,  KHANDROS, Igor, K. ,  ELDRIDGE, Benjamin, N. ,  MATHIEU, Gaetan, L. ,  LOTFIZADEH, Poya ,  TSENG, Chih-Chiang

Inventor： GRUBE, Gary, W. ,  KHANDROS, Igor, K. ,  ELDRIDGE, Benjamin, N. ,  MATHIEU, Gaetan, L. ,  LOTFIZADEH, Poya ,  TSENG, Chih-Chiang

IPC: G01R1/073

CPC classification number: G01R31/2886 ,  G01R1/07314 ,  G01R1/07342 ,  G01R1/07357 ,  G01R1/07378 ,  G01R3/00 ,  Y10T29/49126

Abstract: A method of designing and manufacturing a probe card assembly includes prefabricating one or more elements of the probe card assembly to one or more predefined designs. Thereafter, design data regarding a newly designed semiconductor device is received along with data describing the tester and testing algorithms to be used to test the semiconductor device. Using the received data, one or more of the prefabricated elements is selected. Again using the received data, one or more of the selected prefabricated elements is customized. The probe card assembly is then built using the selected and customized elements.

Abstract translation: 一种设计和制造探针卡组件的方法包括将探针卡组件的一个或多个元件预制成一个或多个预定的设计。 此后，接收关于新设计的半导体器件的设计数据以及描述用于测试半导体器件的测试器和测试算法的数据。 使用接收到的数据，选择一个或多个预制元素。 再次使用接收的数据，定制一个或多个所选择的预制元素。 然后使用选定和定制的元件构建探针卡组件。

公开(公告)号：WO2004059328A2

公开(公告)日：2004-07-15

申请号：PCT/US2003/040909

申请日：2003-12-18

Applicant: FORMFACTOR, INC.

Inventor： COOPER, Timothy, E. ,  ELDRIDGE, Benjamin, N. ,  KHANDROS, Igor, K. ,  MARTENS, Rod ,  MATHIEU, Gaetan, L.

IPC: G01R1/00

CPC classification number: G01R31/2887 ,  G01R1/06705 ,  G01R31/2886

Abstract: An electronic device is moved into a first position with respect to probes for making electrical contact with the device. The electronic device is then moved into a second position in which the electronic device is pressed against the probes, compressing the probes. The movement into the second position includes two components. One component of the movement tends to press the electronic device against the probes, compressing the probes and inducing a stress in the probes. The second movement tends to reduce that stress. Test data are then communicated to and from the electronic device through the probes.

Abstract translation: 电子设备相对于用于与设备进行电接触的探针移动到第一位置。 然后将电子设备移动到第二位置，在第二位置电子设备被压靠在探针上，从而压缩探针。 进入第二个位置的运动包括两个部分。 运动的一个组成部分倾向于将电子设备压在探针上，压缩探针并在探针中引起应力。 第二乐章往往会减轻压力。 测试数据然后通过探针与电子设备进行通信。

公开(公告)号：WO2008024726A3

公开(公告)日：2008-02-28

申请号：PCT/US2007/076345

申请日：2007-08-21

Applicant: FORMFACTOR, INC. ,  ELDRIDGE, Benjamin, N. ,  GRITTERS, John K. ,  KHANDROS, Igor, K. ,  MARTENS, Rod ,  MATHIEU, Gaetan, L.

Inventor： ELDRIDGE, Benjamin, N. ,  GRITTERS, John K. ,  KHANDROS, Igor, K. ,  MARTENS, Rod ,  MATHIEU, Gaetan, L.

IPC: H01R12/00

Abstract: A carbon nanotube contact structure (1400) can be used for making pressure connections to a DUT The contact structure can be formed using a carbon nanotube film (1100) or with carbon nanotubes in solution The carbon nanotube film can be grown in a trench in a sacrificial substrate in which a contact structure such as a beam or contact element (1403) is then formed by metal plating The film can also be formed on a contact element and have metal posts dispersed therein to provide rigidity and elasticity Contact structures or portions thereof can also be plated with a solution containing carbon nanotubes The resulting contact structure can be tough, and can provide good electrical conductivity.

公开(公告)号：WO2003062322A1

公开(公告)日：2003-07-31

申请号：PCT/US2003/001577

申请日：2003-01-16

Applicant: FORMFACTOR, INC.

Inventor： KHANDROS, Igor, K. ,  ELDRIDGE, Benjamin, N. ,  FANG, Treliant ,  MATHIEU, Gaetan, L. ,  GRUBE, Gary, W. ,  DRUSH, Michael, A. ,  BUCKHOLTZ, Christopher, C.

IPC: C08L83/04

CPC classification number: C08G77/48 ,  B08B1/00 ,  B08B7/0028 ,  G01R1/06711 ,  G01R3/00 ,  Y10T428/24388 ,  Y10T428/31663

Abstract: A probe cleaning apparatus for cleaning a probe tip use to test semiconductors dies having an abrasive substrate layer an a tacky gel layer on top of the abrasive surface of the abrasive substrate layer. The probe tip is cleaned by passing it through the tacky gel layer so that it comes in contact with the abrasive surface of the abrasive substrate, moving the probe tip across the abrasive surface of the substrate layer, and then removing the probe tip from the successive layers of the cleaning apparatus. The probe tip emerges from the cleaning apparatus free from debris associated with testing the semiconductor dies.

Abstract translation: 用于清洁探针头的探针清洁装置用于测试在磨料基底层的研磨表面的顶部上具有磨料基底层和粘性凝胶层的半导体模具。 通过将探针尖端通过粘性凝胶层进行清洁，使其与磨料基材的研磨表面接触，使探针尖端跨过基底层的研磨表面，然后从连续的 层的清洁装置。 探针尖端从清洁设备中出来，没有与测试半导体管芯相关的碎片。

公开(公告)号：WO2005081001A1

公开(公告)日：2005-09-01

申请号：PCT/US2005/005087

申请日：2005-02-15

Applicant: FORMFACTOR, INC. ,  COOPER, Timothy, E. ,  ELDRIDGE, Benjamin, N. ,  KHANDROS, Igor, K. ,  MARTENS, Rod ,  MATHIEU, Gaetan, L.

Inventor： COOPER, Timothy, E. ,  ELDRIDGE, Benjamin, N. ,  KHANDROS, Igor, K. ,  MARTENS, Rod ,  MATHIEU, Gaetan, L.

IPC: G01R31/02

CPC classification number: G01R31/2886 ,  G01R31/2887

Abstract: An electronic device is moved into a first position such that terminals of the electronic device are adjacent probes for making electrical contact with the terminals. The electronic device is then moved horizontally or diagonally such that the terminals contact the probes. Test data are then communicated to and from the electronic device through the probes.

Abstract translation: 电子设备移动到第一位置，使得电子设备的端子是与端子电接触的相邻探头。 然后电子设备水平或对角地移动，使得端子接触探针。 然后通过探头将测试数据传送到电子设备和从电子设备传送。

公开(公告)号：WO2005055369A2

公开(公告)日：2005-06-16

申请号：PCT/US2004/039394

申请日：2004-11-22

Applicant: FORMFACTOR, INC. ,  MATHIEU, Gaetan, L. ,  KHANDROS, Igor, K. ,  REYNOLDS, Carl, V.

Inventor： MATHIEU, Gaetan, L. ,  KHANDROS, Igor, K. ,  REYNOLDS, Carl, V.

IPC: H01R

CPC classification number: H05K3/42 ,  G01R1/06711 ,  G01R1/07307 ,  G01R3/00 ,  H05K3/308 ,  H05K2201/09836 ,  H05K2203/0338

Abstract: Methods are provided for making vertical feed through electrical connection structures in a substrate or tile. The vertical feed throughs can be configured to make plated through holes usable for inserting and attaching connector probes. . Probes may be attached to the plated through holes or attachment wells to create resilient spring contacts to form a wafer probe card assembly. A twisted tube plated through hole structure is formed by supporting twisted sacrificial wires coated with the plating material in a substrate, and later etching away the wires. Vertical feed throughs can also be configured to make tiles attachable and detachable as a layer between other substrates. The vertical feed through paths are formed with one end of each feed through hole permanently encapsulating a first electrical contact, and a second end supporting another pluggable and unpluggable electrical probe contact. Decoupling capacitors can be further plugged into holes formed in close proximity to the vertical feed through holes to increase performance of the decoupling capacitor.

Abstract translation: 提供了用于通过基底或瓦片中的电连接结构进行垂直馈送的方法。 垂直进料通道可以配置为制造可用于插入和连接连接器探头的电镀通孔。 。 探针可以附着到电镀通孔或连接孔，以产生弹性弹簧触点，以形成晶片探针卡组件。 通过将涂覆有电镀材料的扭转牺牲线支撑在基板中，并且随后蚀刻掉线来形成扭曲管镀通孔结构。 垂直进料通道也可以被配置成使得瓦片可附着和分离成其它基底之间的层。 垂直进料通道形成有每个进料通孔的一端，其永久地密封第一电接触，第二端支撑另一可插拔和可拔出的电探针接触。 去耦电容器可以进一步插入靠近垂直馈通孔形成的孔中，以提高去耦电容的性能。

公开(公告)号：WO2004093164A2

公开(公告)日：2004-10-28

申请号：PCT/US2004/011116

申请日：2004-04-12

Applicant: FORMFACTOR, INC.

Inventor： KHANDROS, Igor, K. ,  MILLER, Charles, A. ,  WENZEL, Stuart, W.

IPC: H01L21/00

CPC classification number: H05K3/4007 ,  H01L24/13 ,  H01L24/72 ,  H01L24/81 ,  H01L2224/05001 ,  H01L2224/05027 ,  H01L2224/05548 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/73251 ,  H01L2224/81901 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/351 ,  H01R12/57 ,  H01R43/007 ,  H05K3/326 ,  H05K2201/0133 ,  H05K2201/0367 ,  H05K2201/09909 ,  Y10T29/49147 ,  H01L2924/00 ,  H01L2224/16 ,  H01L2224/72 ,  H01L2224/05599 ,  H01L2224/05099

Abstract: A microelectronic spring contact for making electrical contact between a device and a mating substrate and method of making the same are disclosed. The spring contact has a compliant pad adhered to a substrate of the device and spaced apart from a terminal of the device. The compliant pad has a base adhered to the substrate, and side surfaces extending away from the substrate and tapering to a smaller end area distal from the substrate. A trace extends from the terminal of the device over the compliant pad to its end area. At least a portion of the compliant pad end area is covered by the trace, and a portion of the trace that is over the compliant pad is supported by the compliant pad.

Abstract translation: 公开了一种用于在器件和匹配衬底之间进行电接触的微电子弹簧触点及其制造方法。 弹簧触点具有粘附到装置的基板并与装置的端子间隔开的柔性衬垫。 柔性衬垫具有粘附到衬底的基底，以及远离衬底延伸的侧表面，并且逐渐变细到远离衬底的较小端部区域。 迹线从器件的端子通过柔性焊盘延伸到其端部区域。 柔性焊盘端部区域的至少一部分被迹线覆盖，并且位于柔性焊盘上方的迹线的一部分由柔性焊盘支撑。

公开(公告)号：WO2004055895A1

公开(公告)日：2004-07-01

申请号：PCT/US2003/039537

申请日：2003-12-12

Applicant: FORMFACTOR, INC.

Inventor： KHANDROS, Igor, K. ,  ELDRIDGE, Benjamin, N. ,  MILLER, Charles, A. ,  SPORCK, A., Nicholas ,  GRUBE, Gary, W. ,  MATHIEU, Gaetan, L.

IPC: H01L25/065

CPC classification number: H01L23/13 ,  H01L23/4951 ,  H01L23/5386 ,  H01L23/5387 ,  H01L24/48 ,  H01L24/49 ,  H01L24/50 ,  H01L25/0655 ,  H01L2224/0401 ,  H01L2224/05554 ,  H01L2224/06136 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/4824 ,  H01L2224/49 ,  H01L2224/73215 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/0105 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/19107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00

Abstract: In an integrated circuit assembly, know good die (KGD) are assembled on a substrate. Interconnect elements electrically connect pads on a die attached to the substrate to traces or other electrical conductors on the substrate or to pads on another die attached to the substrate. The substrate may have one or more openings, exposing pads of the die. The assembly may comprise one or more dice.

Abstract translation: 在集成电路组件中，将好的芯片（KGD）组装在基板上。 互连元件将附接到衬底的芯片上的焊盘电连接到衬底上的迹线或其它电导体或连接到衬底的另一芯片上的焊盘。 衬底可以具有一个或多个开口，暴露管芯的焊盘。 组件可以包括一个或多个骰子。

公开(公告)号：WO2004053976A2

公开(公告)日：2004-06-24

申请号：PCT/US2003/038463

申请日：2003-12-02

Applicant: FORMFACTOR, INC.

Inventor： KHANDROS, Igor, K. ,  MATHIEU, Gaetan, L. ,  REYNOLDS, Carl, V.

IPC: H01L21/66

CPC classification number: G01R3/00 ,  G01R1/0433 ,  G01R1/0483 ,  G01R1/07378 ,  G01R31/2863 ,  H01L24/13 ,  H01L2224/131 ,  H01L2924/01046 ,  H01L2924/01055 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  Y10T29/49117 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49149 ,  Y10T29/49169 ,  Y10T29/49179 ,  Y10T29/49197 ,  Y10T29/49204 ,  Y10T29/4921 ,  Y10T29/49211 ,  Y10T29/49224 ,  Y10T29/53217 ,  Y10T29/53265 ,  H01L2924/014

Abstract: A interconnect structure is inexpensively manufactured and easily insertable into a socket. The interconnect structure is manufactured by forming a sacrificial substrate with cavities that is covered by a masking material having openings corresponding to the cavities. A first plating process is performed by depositing conductive material, followed by coupling wires within the openings and performing another plating process by depositing more conductive material. The interconnect structure is completed by first removing the masking material and sacrificial substrate. Ends of the wires are coupled opposite now-formed contact structures to a board. To complete the socket, a support device is coupled to the board to hold a tested integrated circuit.

Abstract translation: 互连结构便宜地制造并且可以容易地插入到插座中。 互连结构通过形成具有空腔的牺牲基板来制造，所述空腔被具有对应于空腔的开口的掩模材料覆盖。 通过沉积导电材料，随后在开口内耦合导线并通过沉积更多导电材料来执行另一电镀工艺来执行第一电镀工艺。 通过首先去除掩模材料和牺牲衬底来完成互连结构。 电线的端部与现在形成的接触结构相对地耦合到电路板。 为了完成插座，支撑装置连接到电路板以保持经测试的集成电路。