公开(公告)号：EP1856723B1

公开(公告)日：2013-05-01

申请号：EP06737501.4

申请日：2006-03-06

Applicant: Sanmina-SCI Corporation

Inventor： DUDNIKOV, George, Jr.

IPC: H05K3/42 ,  H05K1/02 ,  H05K1/16 ,  H05K3/18

CPC classification number: H05K3/429 ,  H05K1/0257 ,  H05K1/0259 ,  H05K1/116 ,  H05K1/167 ,  H05K3/184 ,  H05K3/422 ,  H05K2201/0187 ,  H05K2201/0738 ,  H05K2201/096 ,  H05K2201/09645 ,  H05K2201/09718 ,  H05K2201/09881 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49139 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

公开(公告)号：EP2480057A2

公开(公告)日：2012-07-25

申请号：EP12000870.1

申请日：2004-08-13

Applicant: Intel Corporation

Inventor： McCall, James ,  Shykind, Shawn, W.

IPC: H05K1/03

CPC classification number: H05K3/10 ,  H05K1/0216 ,  H05K1/0245 ,  H05K1/0248 ,  H05K1/0366 ,  H05K3/0052 ,  H05K2201/0187 ,  H05K2201/029 ,  H05K2201/09236 ,  H05K2201/09972 ,  H05K2203/1554 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49798 ,  Y10T428/24058 ,  Y10T428/24917 ,  Y10T428/249935 ,  Y10T428/24994 ,  Y10T428/249943 ,  Y10T428/249946 ,  Y10T442/2926 ,  Y10T442/2992 ,  Y10T442/3065

Abstract: A circuit board comprising: a resin; first and second fiberglass fibers; and first and second signal line traces capable of transmitting electrical signals, wherein: a ratio between fiberglass and resin material near the first signal line trace is similar to a ratio between fiberglass and resin material near the second signal line trace.

Abstract translation: 一种电路板，包括：树脂; 第一和第二玻璃纤维纤维; 以及能够传输电信号的第一和第二信号线迹线，其中：第一信号线迹线附近的玻璃纤维和树脂材料之间的比率类似于第二信号线迹线附近的玻璃纤维和树脂材料之间的比率。

公开(公告)号：EP2480054A2

公开(公告)日：2012-07-25

申请号：EP12000867.7

申请日：2004-08-13

Applicant: Intel Corporation

Inventor： McCall, James ,  Shykind, Shawn, W.

IPC: H05K1/03

CPC classification number: H05K3/10 ,  H05K1/0216 ,  H05K1/0245 ,  H05K1/0248 ,  H05K1/0366 ,  H05K3/0052 ,  H05K2201/0187 ,  H05K2201/029 ,  H05K2201/09236 ,  H05K2201/09972 ,  H05K2203/1554 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49798 ,  Y10T428/24058 ,  Y10T428/24917 ,  Y10T428/249935 ,  Y10T428/24994 ,  Y10T428/249943 ,  Y10T428/249946 ,  Y10T442/2926 ,  Y10T442/2992 ,  Y10T442/3065

Abstract: A circuit board comprising: a resin; first and second fiberglass fibers; and first and second signal line traces capable of transmitting electrical signals, wherein: the first and second fiberglass fibers diagonally cross near the first and second signal line traces.

Abstract translation: 一种电路板，包括：树脂; 第一和第二玻璃纤维纤维; 以及能够传输电信号的第一和第二信号线迹线，其中：第一和第二玻璃纤维光线在第一和第二信号线迹线附近对角交叉。

公开(公告)号：EP2452546A1

公开(公告)日：2012-05-16

申请号：EP10743002.7

申请日：2010-07-09

Applicant: AT & S Austria Technologie & Systemtechnik Aktiengesellschaft

Inventor： PLUDRA, Rainer ,  DROFENIK, Dietmar ,  STAHR, Johannes ,  GÖTZINGER, Siegfried ,  MARELJIC, Ljubomir

IPC: H05K1/14 ,  H05K1/18 ,  H05K3/36 ,  H05K5/00 ,  H05K3/00

CPC classification number: H05K1/142 ,  H05K1/115 ,  H05K1/185 ,  H05K1/189 ,  H05K3/225 ,  H05K3/368 ,  H05K3/4691 ,  H05K3/4694 ,  H05K2201/0187 ,  H05K2201/09163 ,  H05K2201/09845 ,  H05K2203/1461 ,  Y10T29/49155

Abstract: In a method for producing a printed circuit board consisting of at least two printed circuit board regions, wherein the printed circuit board regions each comprise at least one conductive layer and/or at least one device or one conductive component, wherein printed circuit board regions (20, 21, 22) to be connected to one another, in the region of in each case at least one lateral surface directly adjoining one another, are connected to one another by a coupling or connection, and wherein, after a coupling or connection of printed circuit board regions (20, 21, 22) to be connected to one another, at least one additional layer or ply of the printed circuit board is arranged or applied over the printed circuit board regions (20, 21, 22) to be connected to one another, it is provided that the additional layer is embodied as a conductive layer (26), which is contact-connected via plated-through holes (23) to conductive layers or devices or components integrated in the printed circuit board regions (20, 21, 22) to be connected to one another, as a result of which a simple and reliable connection or coupling of printed circuit board regions (20, 21, 22) to be connected to one another can be made available. Furthermore, a printed circuit board consisting of a plurality of printed circuit board regions (20, 21, 22) is made available.

Abstract translation: 在用于制造印刷电路板的至少两个印刷电路区域由......组成，worin印刷电路板区域，每个区域折衷至少一个导电层和/或至少一个设备或一次导电组分，worin印制电路板区域是一个方法 连接到另外一个，在每种情况下的至少一个侧表面直接彼此邻接的区域中，被连接到彼此的耦合或连接，并且worin，耦合或印刷电路板的区域的连接之后，至少一个 在印刷电路板的附加层或帘布层施加在所述印刷电路板的区域，所述另外的层被构造为导电层，所有这些是接触连接通过镀通孔到集成在印刷电路的导电层或器件或组件 基板区域。

公开(公告)号：EP2015623B1

公开(公告)日：2012-03-28

申请号：EP07742023.0

申请日：2007-04-20

Applicant: Ibiden Co., Ltd.

Inventor： KARIYA, Takashi ,  FURUTANI, Toshiki ,  KAWANISHI, Takeshi

IPC: H05K3/46

CPC classification number: H01L21/4857 ,  H01L21/486 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K1/112 ,  H05K3/4602 ,  H05K3/4688 ,  H05K2201/0187 ,  H05K2201/10674 ,  H01L2224/05599

Abstract: [PROBLEMS] To provide a multilayer printed wiring board for obtaining fine pitch. [MEANS FOR SOLVING PROBLEMS] In a build-up wiring layer, a heat resistant substrate (30) is incorporated in a multilayer printed wiring board (10), an interlayer resin insulating layer (50) and a conductor layer (58) are alternately laminated on the heat resistant substrate, and conductor layers are connected by via holes (60). Since the heat resistant substrate composed of a Si substrate (20) is used, a wiring thinner than that formed on an uneven resin substrate can be formed by making via holes (48) on the surface of the mirror-finished Si substrate, and thus, fine pitch is obtained. Furthermore, by forming a wiring on the mirror-finished surface, variance of the wiring is reduced and fluctuation of impedance is reduced.

公开(公告)号：EP1100295B1

公开(公告)日：2012-03-28

申请号：EP00124231.2

申请日：2000-11-09

Applicant: Panasonic Corporation

Inventor： Nakatani, Seiichi ,  Hirano, Koichi ,  Shimada, Mikinari ,  Sugaya, Yasuhiro

IPC: H01G9/26 ,  H01L23/64 ,  H05K1/16

CPC classification number: H01G9/26 ,  H01L23/642 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/162 ,  H05K3/383 ,  H05K3/4614 ,  H05K2201/0187 ,  H05K2201/0355 ,  H05K2203/0315 ,  Y10T29/417 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49146 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/5313 ,  H01L2924/00

公开(公告)号：EP2416630A1

公开(公告)日：2012-02-08

申请号：EP11159293.7

申请日：2011-03-22

Applicant: Unimicron Technology Corp.

Inventor： Tseng, Tzyy-Jang ,  Lee, Chang-Ming ,  Liu, Wen-Fang ,  Yu, Cheng-Po

IPC: H05K1/02 ,  H05K1/05

CPC classification number: H05K1/0204 ,  H05K1/056 ,  H05K3/3436 ,  H05K2201/0187

Abstract: A circuit board includes a metal pattern layer, a thermally conductive plate, an electrically insulating layer, and at least one electrically insulating material. The thermally conductive plate has a plane. The electrically insulating layer is disposed between the metal pattern layer and the plane and partially covers the plane. The electrically insulating material covers the plane where is not covered by the electrically insulating layer and touches the thermally conductive plate. The electrically insulating layer exposes the electrically insulating material, and a thermal conductivity of the electrically insulating material is larger than a thermal conductivity of the electrically insulating layer.

Abstract translation: 电路板包括金属图案层，导热板，电绝缘层和至少一个电绝缘材料。 导热板具有平面。 电绝缘层设置在金属图案层和平面之间并部分地覆盖平面。 电绝缘材料覆盖未被电绝缘层覆盖并接触导热板的平面。 电绝缘层暴露电绝缘材料，并且电绝缘材料的导热率大于电绝缘层的热导率。

公开(公告)号：EP1771050B1

公开(公告)日：2011-06-15

申请号：EP06024023.1

申请日：2000-09-01

Applicant: IBIDEN CO., LTD.

Inventor： Inagaki, Yasushi ,  Asai, Motoo ,  Wang, Dongdong ,  Yabashi, Hideo ,  Shirai, Seiji

IPC: H05K1/18

CPC classification number: H05K1/181 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/642 ,  H01L23/645 ,  H01L24/16 ,  H01L24/17 ,  H01L25/16 ,  H01L25/162 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01043 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01052 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/0231 ,  H05K1/185 ,  H05K1/186 ,  H05K1/187 ,  H05K3/4602 ,  H05K3/4611 ,  H05K2201/0187 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/10636 ,  H05K2201/10674 ,  H05K2203/063 ,  Y02P70/611 ,  Y10T29/435 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49146 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00 ,  H01L2224/05599

Abstract: A chip capacitor 20 is provided in a core substrate 30 of a printed circuit board 10. This makes it possible to shorten a distance between an IC chip 90 and the chip capacitor 20 and to reduce loop inductance. Since the core substrate 30 is constituted by providing a first resin substrate 30a, a second resin substrate 30b and a third resin substrate 30c in a multilayer manner, the core substrate 30 can obtain sufficient strength.

公开(公告)号：EP1445795B1

公开(公告)日：2011-04-27

申请号：EP04001264.3

申请日：2004-01-21

Applicant: FRIWO Gerätebau GmbH

Inventor： Bothe, Michael ,  Mörbe, Stefan

IPC: H05K1/16 ,  H01L21/02

CPC classification number: H01L21/00 ,  H01L27/08 ,  H01L28/40 ,  H05K1/0306 ,  H05K1/092 ,  H05K1/162 ,  H05K1/167 ,  H05K3/06 ,  H05K3/107 ,  H05K3/1258 ,  H05K3/4061 ,  H05K3/4611 ,  H05K3/4629 ,  H05K2201/0187 ,  H05K2201/0347 ,  H05K2201/09036 ,  H05K2201/09672 ,  H05K2201/09763 ,  H05K2203/0369 ,  H05K2203/063 ,  Y10T29/43 ,  Y10T29/435 ,  Y10T29/49126 ,  Y10T29/49128

公开(公告)号：EP2280594A1

公开(公告)日：2011-02-02

申请号：EP08874395.0

申请日：2008-12-22

Applicant: Ibiden Co., Ltd.

Inventor： TAKAHASHI, Michimasa

IPC: H05K3/46

CPC classification number: H05K1/0298 ,  H01L24/24 ,  H01L2224/24227 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/12042 ,  H05K1/141 ,  H05K1/142 ,  H05K1/185 ,  H05K3/4602 ,  H05K3/4694 ,  H05K2201/0187 ,  H05K2201/09536 ,  H05K2201/10484 ,  Y10T29/49126 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A printed wiring board has a first substrate (10) with multiple wiring layers, and a second substrate (20) with wiring layers whose conductor density is set higher than that of the first substrate (10). The first substrate (10) and the second substrate (20) are electrically connected through each wiring layer, and the second substrate (20) is embedded in an accommodation section (100a).

Abstract translation: 印刷线路板具有具有多个布线层的第一基板（10）和具有导体密度被设定为高于第一基板（10）的布线层的第二基板（20）。 第一基板（10）和第二基板（20）通过各布线层电连接，并且第二基板（20）嵌入容纳部（100a）中。