公开(公告)号：EP2959754A1

公开(公告)日：2015-12-30

申请号：EP14754166.8

申请日：2014-02-24

申请人： MC10, INC.

发明人： HSU, Yung-Yu

IPC分类号： H05K1/02 ,  H01L29/06

CPC分类号： H05K1/185 ,  H05K1/0271 ,  H05K1/028 ,  H05K1/0283 ,  H05K1/036 ,  H05K1/0393 ,  H05K1/09 ,  H05K1/118 ,  H05K1/147 ,  H05K1/148 ,  H05K1/189 ,  H05K3/4691 ,  H05K3/4694 ,  H05K2201/0133 ,  H05K2201/0154 ,  H05K2201/0187 ,  H05K2201/09245 ,  H05K2201/1028 ,  H05K2201/10287 ,  H05K2201/2009

摘要： Buffer structures are provided that can be used to reduce a strain in a conformable electronic system that includes compliant components in electrical communication with more rigid device components. The buffer structures are disposed on, or at least partially embedded in, the conformable electronic system such that the buffer structures overlap with at least a portion of a junction region between a compliant component and a more rigid device component. The buffer structure can have a higher value of Young's modulus than an encapsulant of the conformable electronic system.

摘要翻译： 提供相交结构以减小包括可拉伸互连结构的多级布置的可适应电子系统中的应变。 旁路区域形成在可伸缩互连结构的可通常彼此交叉或穿过的区域中。 可拉伸互连的旁路区域相对于彼此设置，使得相交结构包围每个可拉伸互连结构的旁路区域的至少一部分。 交叉结构具有弹性特性，其在拉伸至少一个可拉伸互连结构期间缓解旁路区域上的机械应变。

公开(公告)号：EP2688149A4

公开(公告)日：2015-04-01

申请号：EP11854537

申请日：2011-11-18

申请人： KUANG CHI INNOVATIVE TECH LTD ,  KUANG CHI INST ADVANCED TECH

发明人： LIU RUOPENG ,  XU GUANXIONG ,  LUAN LIN ,  JI CHUNLIN ,  ZHAO ZHIYA ,  LI YUEFENG ,  YUE YUTAO

IPC分类号： H01Q15/00 ,  H05K1/02 ,  H05K3/46

CPC分类号： H05K9/0073 ,  H01Q15/0086 ,  H05K1/0236 ,  H05K1/024 ,  H05K3/4694 ,  H05K2201/09972

摘要： A metamaterial for deflecting an electromagnetic wave is disclosed, which comprises a functional layer. The functional layer comprises a plurality of sheet layers parallel to each other, and each of the sheet layers comprises a sheet-like substrate and a plurality of man-made microstructures arranged in an array on the sheet-like substrate. The sheet-like substrate comprises a plurality of unit blocks, and each of the man-made microstructures and a corresponding one of the unit blocks occupied thereby form a unit cell. Refractive indices of the unit cells arranged in a first direction in each of the sheet layers decrease gradually. Each of the unit cells has an anisotropic electromagnetic parameter. Through use of the metamaterial of the present disclosure, deflection of the electromagnetic wave can be achieved.

公开(公告)号：EP2330877A1

公开(公告)日：2011-06-08

申请号：EP10193174.9

申请日：2010-11-30

申请人： FUJITSU LIMITED

发明人： Taketomi, Nobuo ,  Kikuchi, Shunichi ,  Nakamura, Naoki ,  Hatanaka, Kiyoyuki ,  Sugino, Shigeru ,  Kanai, Ryo

IPC分类号： H05K3/46

CPC分类号： H05K3/4694 ,  H05K1/0269 ,  H05K3/429 ,  H05K3/4602 ,  H05K3/4611 ,  H05K2201/0187 ,  H05K2201/09918 ,  H05K2201/09972 ,  H05K2203/061 ,  H05K2203/063 ,  H05K2203/167

摘要： A method for manufacturing a multilayered circuit board, and a printed circuit board manufactured according to the method, includes laterally-aligning a first inner substrate in which first insulation layers and first conductor layers are alternately laminated and a second inner substrate in which second insulation layers and second conductor layers are alternately laminated. The second inner substrate has a lager number of layers than the first inner substrate. The laterally-aligned first inner substrate and second inner substrate are placed between a pair of third insulation layers in a thickness direction. The pair of the third insulation layer are heated under pressure in the thickness direction. A conductor pattern is formed on surfaces of the pair of the third insulation layers.

摘要翻译： 一种制造多层电路板的方法和根据该方法制造的印刷电路板包括横向对准第一绝缘层和第一导体层交替层叠的第一内部基板和第二内部基板，其中第二绝缘层 并且第二导体层交替层叠。 第二内部衬底具有比第一内部衬底更多的层数。 横向排列的第一内部基板和第二内部基板在厚度方向上放置在一对第三绝缘层之间。 该一对第三绝缘层在厚度方向上被加压。 在一对第三绝缘层的表面上形成导体图案。

公开(公告)号：EP2157838A1

公开(公告)日：2010-02-24

申请号：EP08763923.3

申请日：2008-05-28

申请人： Panasonic Corporation

发明人： NAKAMURA, Tadashi, c/o Panasonic Corporation IPROC, IP devel. Ctr ,  ECHIGO, Funio, c/o Panasonic Corporation IPROC, IP devel. Ctr ,  FUKASAWA, Kota, c/o Panasonic Corporation IPROC, IP devel. Ctr ,  HIRAI, Shogo, c/o Panasonic Corporation IPROC, IP devel. Ctr ,  KITA, Takayuki c/o Panasonic Corporation IPROC, IP devel. Ctr

IPC分类号： H05K1/11 ,  H05K1/14

CPC分类号： H05K3/4697 ,  H05K1/183 ,  H05K1/189 ,  H05K3/28 ,  H05K3/3452 ,  H05K3/4069 ,  H05K3/4614 ,  H05K3/4691 ,  H05K3/4694 ,  H05K2201/09145 ,  H05K2201/09845 ,  H05K2201/09909 ,  H05K2201/09972 ,  H05K2201/10378 ,  H05K2201/10674 ,  H05K2201/2018 ,  H05K2203/061 ,  Y10T29/49124 ,  Y10T29/49155 ,  Y10T29/49165

摘要： A solid printed circuit board is manufactured by bonding upper and lower printed circuit boards having different shapes and provided with wirings formed on surfaces thereof. A bonding layer is made of insulating material containing thermosetting resin and inorganic filler dispersed therein, and has a via-conductor made of conductive paste filling a through-hole perforated in a predetermined position of the bonding layer. This circuit board provides a packaging configuration achieving small size and thickness and three-dimensional mounting suitable for semiconductors of high performance and multiple-pin structure.

摘要翻译： 通过粘接具有不同形状的上下印刷电路板并且在其表面上形成布线来制造实心印刷电路板。 粘合层由含有分散在其中的热固性树脂和无机填料的绝缘材料制成，并且具有填充在接合层的预定位置穿孔的通孔的由导电膏制成的通孔导体。 该电路板提供了实现小尺寸和厚度以及适用于高性能和多引脚结构的半导体的三维安装的封装结构。

公开(公告)号：EP3158835A1

公开(公告)日：2017-04-26

申请号：EP15809672.7

申请日：2015-05-08

申请人： Intel Corporation

发明人： WELLS, Kevin E. ,  STAMEY, Richard C.

IPC分类号： H05K1/02 ,  H05K1/18

CPC分类号： G06F1/16 ,  H01L2924/0002 ,  H05K1/115 ,  H05K1/141 ,  H05K3/3436 ,  H05K3/421 ,  H05K3/4694 ,  H05K2201/041 ,  H05K2201/09972 ,  H05K2201/10159 ,  H05K2201/10719 ,  Y02P70/613 ,  Y10T29/49128 ,  H01L2924/00

摘要： Described are apparatuses for modular printed circuit boards (PCB) and methods for producing modular PCBs. An apparatus may include a first PCB module with a first pattern of routing structures on one or more layers of the first PCB module. The apparatus may further include a second PCB module with a second pattern of routing structures on one or more layers of the second PCB module. The second pattern of routing structures may be aligned with and electrically coupled to the first pattern of routing structures without connectors. Other embodiments may be described and/or claimed.

摘要翻译： 描述了用于模块化印刷电路板（PCB）的设备和用于生产模块化PCB的方法。 一种装置可以包括在第一PCB模块的一个或多个层上具有第一布线结构图案的第一PCB模块。 该设备还可以包括第二PCB模块，该第二PCB模块具有在第二PCB模块的一个或多个层上的第二路线结构图案。 布线结构的第二图案可以与没有连接器的布线结构的第一图案对准并且电耦合至第一图案。 其他实施例可以被描述和/或要求保护。

公开(公告)号：EP2959754A4

公开(公告)日：2016-11-09

申请号：EP14754166

申请日：2014-02-24

申请人： MC10 INC

发明人： HSU YUNG-YU

IPC分类号： H05K1/02

CPC分类号： H05K1/185 ,  H05K1/0271 ,  H05K1/028 ,  H05K1/0283 ,  H05K1/036 ,  H05K1/0393 ,  H05K1/09 ,  H05K1/118 ,  H05K1/147 ,  H05K1/148 ,  H05K1/189 ,  H05K3/4691 ,  H05K3/4694 ,  H05K2201/0133 ,  H05K2201/0154 ,  H05K2201/0187 ,  H05K2201/09245 ,  H05K2201/1028 ,  H05K2201/10287 ,  H05K2201/2009

摘要： Buffer structures are provided that can be used to reduce a strain in a conformable electronic system that includes compliant components in electrical communication with more rigid device components. The buffer structures are disposed on, or at least partially embedded in, the conformable electronic system such that the buffer structures overlap with at least a portion of a junction region between a compliant component and a more rigid device component. The buffer structure can have a higher value of Young's modulus than an encapsulant of the conformable electronic system.

公开(公告)号：EP2798920A1

公开(公告)日：2014-11-05

申请号：EP12816431.6

申请日：2012-12-28

申请人： AT & S Austria Technologie & Systemtechnik Aktiengesellschaft

发明人： KARPOVYCH, Volodymyr ,  STAHR, Johannes

IPC分类号： H05K3/40 ,  H05K3/46

CPC分类号： H05K3/4611 ,  H05K1/11 ,  H05K1/142 ,  H05K1/18 ,  H05K3/368 ,  H05K3/403 ,  H05K3/4694 ,  H05K2201/09045 ,  H05K2201/0919 ,  H05K2201/09572 ,  H05K2201/1059 ,  H05K2201/209 ,  Y10T29/49126

摘要： The invention relates to a method for producing a printed circuit board consisting of at least two printed circuit board regions (1, 2), wherein the printed circuit board regions (1, 2) each comprise at least one conductive layer (31), in particular a structured conductive layer and/or at least one element (32) or one conductive component, wherein printed circuit board regions (1, 2) to be connected to one another, in the region of in each case at least one lateral surface (3) directly adjoining one another, are connected to one another by a mechanical coupling or connection. According to the invention, at least one sub-region or connection port of the at least one conductive layer (31), and/or a conductive element (33) of the device (32) or of the component of the printed circuit board regions (1, 2) mechanically connected or to be connected to one another are electrically conductively connected or coupled to each other at the at least one lateral surface (3) adjoining one another, whereby a simple and reliable lateral electrical coupling or connection between printed circuit board regions (1, 2) to be connected to each other is rendered possible. The invention further relates to such a printed circuit board.

公开(公告)号：EP2141972B1

公开(公告)日：2014-04-02

申请号：EP08740252.5

申请日：2008-04-11

申请人： Murata Manufacturing Co. Ltd.

发明人： YUDA, Kazuyuki ,  IEKI, Tsutomu

IPC分类号： H05K1/02 ,  H05K1/18 ,  H05K3/00 ,  H05K3/20 ,  H05K3/28 ,  H05K3/30 ,  H05K1/14 ,  H05K3/46 ,  H01L23/552

CPC分类号： H05K1/141 ,  H01L23/552 ,  H01L2224/16225 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/19105 ,  H05K1/0218 ,  H05K1/183 ,  H05K1/187 ,  H05K3/007 ,  H05K3/20 ,  H05K3/284 ,  H05K3/303 ,  H05K3/46 ,  H05K3/4694 ,  H05K3/4697 ,  H05K2201/0715 ,  H05K2201/0979 ,  H05K2201/09972 ,  H05K2203/016 ,  H05K2203/167 ,  Y10T29/4913 ,  H01L2224/0401

摘要： [Problem] To provide a reliable component-embedded module that allows a reduction in cost and an increase in yield. [Solving Means] A component-embedded module A includes a module substrate 1 having wiring electrodes 2 on the upper surface thereof, first circuit components 7 mounted on the wiring electrodes 2, a sub-module 10 disposed on an area on which no wiring electrodes 2 are formed, and an insulating resin layer 20 formed on the entire upper surface of the module substrate in such a manner that the insulating resin layer 20 covers at least parts of the first circuit components and sub-module. The second circuit components 15 including an integrated circuit element are mounted on the sub-module 10 or embedded therein. Via conductors 3 are formed through the module substrate 1 from the lower surface thereof and are directly coupled to terminal electrodes 14 on the lower surface of the sub-module 10. By using a substrate having a wiring accuracy higher than that of the module substrate 1, a reliable component-embedded module is obtained.

公开(公告)号：EP2421342A3

公开(公告)日：2012-08-15

申请号：EP11181849.8

申请日：2009-10-15

申请人： FUJITSU LIMITED

发明人： Mizukoshi, Masataka ,  Ishizuki, Yoshikatsu

IPC分类号： H05K3/20 ,  H05K3/46 ,  H05K1/14

CPC分类号： H05K3/20 ,  H01L24/16 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/10175 ,  H01L2224/131 ,  H01L2224/16237 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81001 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/83193 ,  H01L2224/838 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/12042 ,  H01L2924/1517 ,  H01L2924/15788 ,  H01L2924/1579 ,  H05K1/142 ,  H05K3/4658 ,  H05K3/4694 ,  H05K2201/0108 ,  H05K2201/0352 ,  H05K2201/09972 ,  H05K2203/025 ,  H05K2203/1189 ,  Y10T29/49117 ,  Y10T156/1052 ,  Y10T428/24917 ,  H01L2924/00 ,  H01L2924/01047 ,  H01L2924/01083 ,  H01L2924/3512 ,  H01L2924/00014 ,  H01L2224/16225

摘要： [Problems] In an electronic component and a method of manufacturing the same, forming a finer conductive pattern than conventional counterpart.
[Means of Solving] A method of manufacturing an electronic component includes the steps of arranging a plurality of underlying substrates (131,132) each of which includes a recess portion (138a) formed on one major surface thereof; fitting a protrusion (140a) of a pattern formed on one major surface (140x) of a conductor plate (140) into the recess portion of each of the underlying substrates, and connecting the plurality of the underlying substrates through the conductor plate; forming a resin layer (139) on the one major surface of each of a plurality of the underlying substrates; and performing polishing, Chemical Mechanical Polishing, or cutting by the use of a diamond bit on another major surface of the conductor plate until the resin layer appears, and leaving the pattern in the resin layer as a conductor pattern.

公开(公告)号：EP2421341A2

公开(公告)日：2012-02-22

申请号：EP11181847.2

申请日：2009-10-15

申请人： FUJITSU LIMITED

发明人： Mizukoshi, Masataka ,  Ishizuki, Yoshikatsu

IPC分类号： H05K3/20 ,  H05K3/46

CPC分类号： H05K3/20 ,  H01L24/16 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/10175 ,  H01L2224/131 ,  H01L2224/16237 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81001 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/83193 ,  H01L2224/838 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/12042 ,  H01L2924/1517 ,  H01L2924/15788 ,  H01L2924/1579 ,  H05K1/142 ,  H05K3/4658 ,  H05K3/4694 ,  H05K2201/0108 ,  H05K2201/0352 ,  H05K2201/09972 ,  H05K2203/025 ,  H05K2203/1189 ,  Y10T29/49117 ,  Y10T156/1052 ,  Y10T428/24917 ,  H01L2924/00 ,  H01L2924/01047 ,  H01L2924/01083 ,  H01L2924/3512 ,  H01L2924/00014 ,  H01L2224/16225

摘要： [Problems] In an electronic component and a method of manufacturing the same, forming a finer conductive pattern than conventional counterpart.
[Means of Solving] A method of manufacturing an electronic component includes the steps of connecting a pattern (100w) formed on one major surface (100x) of a conductor plate (100) to an electrode pad (98) of an underlying substrate (110); injecting a resin between the conductor plate and the underlying substrate, and forming a resin layer (103); and performing polishing, Chemical Mechanical Polishing, or cutting by the use of a diamond bit on another major surface of the conductor plate until the resin layer appears, and leaving the pattern in the resin layer as a conductor pattern.

摘要翻译： [问题]在电子部件及其制造方法中，形成比常规对应物更细的导电图案。 解决方法制造电子部件的方法包括以下步骤：将形成在导体板（100）的一个主表面（100x）上的图案（100w）连接到下面的基板（110）的电极焊盘（98） ）; 在导体板和下面的基板之间注入树脂，并形成树脂层（103）; 并进行抛光，化学机械抛光，或者通过在导体板的另一个主表面上使用金刚石钻头进行切割，直到出现树脂层，并将图案留在树脂层中作为导体图案。