公开(公告)号：EP2946243A4

公开(公告)日：2017-01-04

申请号：EP13872095

申请日：2013-12-18

申请人： VERILY LIFE SCIENCES LLC

发明人： ETZKORN JAMES ,  AMIRPARVIZ BABAK

IPC分类号： H01L23/31 ,  A61B5/1486 ,  G02C7/02

CPC分类号： A61B5/6821 ,  A61B5/0002 ,  A61B5/0004 ,  A61B5/14507 ,  A61B5/14532 ,  A61B5/1455 ,  A61B5/1468 ,  A61B5/1473 ,  A61B5/1486 ,  A61B5/14865 ,  A61B5/6867 ,  G01N27/3271 ,  G02C7/04 ,  H01L21/568 ,  H01L23/3107 ,  H01L2224/81001 ,  Y10T29/49826

摘要： An eye-mountable device includes an electrochemical sensor embedded in a polymeric material configured for mounting to a surface of an eye. The electrochemical sensor includes a working electrode and a reference electrode that reacts with an analyte to generate a sensor measurement related to a concentration of the analyte in a fluid to which the eye-mountable device is exposed. An example assembly process includes: forming a sacrificial layer on a working substrate; forming a first layer of a bio-compatible material on the sacrificial layer; providing an electronics module on the first layer of the bio-compatible material, forming a second layer of the bio-compatible material to cover the electronics module; and annealing the first and second layers of the bio-compatible material together to form an encapsulated structure having the electronics module fully encapsulated by the bio-compatible material.

摘要翻译： 眼睛安装的装置包括嵌入聚合物材料中的电化学传感器，该聚合材料构造成用于安装到眼睛的表面。 电化学传感器包括工作电极和与分析物反应的参比电极，以产生与可眼睛安装的装置暴露于的流体中的分析物的浓度相关的传感器测量。 示例性组装过程包括：在工作衬底上形成牺牲层; 在所述牺牲层上形成生物相容性材料的第一层; 在所述生物相容材料的第一层上提供电子模块，形成所述生物相容材料的第二层以覆盖所述电子模块; 以及将所述生物相容性材料的所述第一层和第二层退火在一起以形成具有由所述生物相容性材料完全包封的所述电子模块的封装结构。

公开(公告)号：EP2206145A2

公开(公告)日：2010-07-14

申请号：EP08835829.6

申请日：2008-09-26

申请人： Tessera, Inc.

发明人： KWON, Jinsu

IPC分类号： H01L21/60

CPC分类号： H01L24/14 ,  H01L21/4853 ,  H01L21/563 ,  H01L23/3178 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/0558 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/1147 ,  H01L2224/13015 ,  H01L2224/13016 ,  H01L2224/13017 ,  H01L2224/13019 ,  H01L2224/13023 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1412 ,  H01L2224/16 ,  H01L2224/16058 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/73204 ,  H01L2224/81001 ,  H01L2224/81011 ,  H01L2224/81136 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/8183 ,  H01L2224/81894 ,  H01L2224/831 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/1532 ,  H01L2924/19041 ,  H01L2924/2064 ,  H01L2924/3841 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2224/29099

摘要： A packaged microelectronic assembly includes a microelectronic element (104) having a front surface (122) and a plurality of first solid metal posts (110) extending away from the front surface (122). Each of the first posts (110) has a width in a direction of the front surface (122) and a height extending from the front surface (122), wherein the height (H2) is at least half of the width (Wl). There is also a substrate (102) having a top surface (101) and a plurality of second solid metal posts (108) extending from the top surface (102) and joined to the first solid metal posts (110).

公开(公告)号：EP2162927A1

公开(公告)日：2010-03-17

申请号：EP08758035.3

申请日：2008-05-07

申请人： OSRAM Opto Semiconductors GmbH

发明人： FISCHER, Helmut ,  EISSLER, Dieter ,  HEINDL, Alexander

IPC分类号： H01L33/00 ,  H01L21/78 ,  H01L21/68

CPC分类号： H01L25/0753 ,  H01L21/561 ,  H01L21/563 ,  H01L21/6835 ,  H01L23/3114 ,  H01L24/12 ,  H01L24/81 ,  H01L24/83 ,  H01L24/90 ,  H01L24/95 ,  H01L24/97 ,  H01L33/0079 ,  H01L33/22 ,  H01L33/382 ,  H01L33/44 ,  H01L2221/68322 ,  H01L2221/68354 ,  H01L2221/68363 ,  H01L2221/68377 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/13111 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13155 ,  H01L2224/13169 ,  H01L2224/16225 ,  H01L2224/29144 ,  H01L2224/2919 ,  H01L2224/81001 ,  H01L2224/81801 ,  H01L2224/83851 ,  H01L2224/90 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10158 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/181 ,  H01L2924/01032 ,  H01L2924/0105 ,  H01L2224/81 ,  H01L2924/00014 ,  H01L2924/00

摘要： A method for producing optoelectronic components (1) is specified, in which a plurality of semiconductor bodies (2) each having a semiconductor layer sequence are provided. A component carrier assemblage (30) having a plurality of connection pads (35) is also provided. The semiconductor bodies (2) are positioned relative to the component carrier assemblage (30). An electrically conductive connection is produced between the connection pads (35) and the associated semiconductor bodies (2), and the semiconductor bodies are fastened to the component carrier assemblage (30). The optoelectronic components (2) are completed, wherein a component carrier (3) is formed for each optoelectronic component (1) from the component carrier assemblage (30) on which the semiconductor bodies (2) are fastened. An optoelectronic component is also specified.

公开(公告)号：EP1369910B1

公开(公告)日：2009-08-19

申请号：EP03016690.4

申请日：1998-03-20

申请人： FUJITSU LIMITED

发明人： Tsunoi, Kazuhisa ,  Kira, Hidehiko ,  Baba, Shunji ,  Fuji, Akira ,  Kusagaya, Toshihiro ,  Kobae, Kenji ,  Kainuma, Norio ,  Ishikawa, Naoki ,  Emoto, Satoshi

IPC分类号： H01L21/56 ,  H01L21/60 ,  H01L21/603

CPC分类号： H01L24/81 ,  H01L21/563 ,  H01L24/11 ,  H01L24/29 ,  H01L24/75 ,  H01L2224/1134 ,  H01L2224/11822 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/75 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/81001 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2224/83101 ,  H01L2224/83192 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01061 ,  H01L2924/01079 ,  H01L2924/07802 ,  H01L2924/07811 ,  H01L2924/00

公开(公告)号：EP1746651A3

公开(公告)日：2007-04-18

申请号：EP05257725.1

申请日：2005-12-15

申请人： FUJITSU LIMITED ,  Fujitsu Frontech Limited

发明人： Ishikawa, Naoki ,  Kira, Hidehiko ,  Baba, Shunji ,  Kobayashi, Hiroshi ,  Kikuchi, Shunichi ,  Tsuneno, Tatsuro

IPC分类号： H01L23/498 ,  G06K19/077 ,  H01L21/00

CPC分类号： G06K19/07749 ,  H01L21/67132 ,  H01L21/67144 ,  H01L21/6835 ,  H01L21/6836 ,  H01L24/75 ,  H01L24/81 ,  H01L24/97 ,  H01L2221/68327 ,  H01L2221/68354 ,  H01L2223/6677 ,  H01L2224/16 ,  H01L2224/73204 ,  H01L2224/75 ,  H01L2224/75252 ,  H01L2224/75314 ,  H01L2224/7565 ,  H01L2224/75745 ,  H01L2224/7598 ,  H01L2224/81001 ,  H01L2224/81005 ,  H01L2224/81121 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2224/81907 ,  H01L2224/83192 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2224/81

摘要： An IC chip (11) mounting method which mounts two or more IC chips (11) on a base (13), includes: preparing a wafer (10) by mounting a tape (30) on a face thereof, which is the reverse of the wafer (10) having a mounting surface to be attached to the base (13), and by dividing the wafer (10) into IC chips (11) by dicing while leaving the tape (30); positioning the wafer (10) to face the base (13) in such a direction that the mounting surface to be attached to the base (13) faces the base (13); sequentially pressing the IC chips (11) on the wafer (10) against the base (13) and temporarily fixing the IC chips (11) while the base (13) is being fed in a prescribed one-dimensional direction along the wafer (10) and while the wafer (10) is being moved two-dimensionally along the base (13) ; and fixing the IC chips (11) temporarily fixed on the base (13) on the base (13) by heating and pressurizing in a batch manner.

公开(公告)号：EP1403691B1

公开(公告)日：2007-04-18

申请号：EP03255715.9

申请日：2003-09-12

申请人： SEIKO EPSON CORPORATION

发明人： Kimura, Mutsumi c/o Seiko Epson Corporation

IPC分类号： G02F1/1362 ,  G02F1/1345 ,  H01L25/075 ,  H01L29/786 ,  H01L21/336

CPC分类号： H01L27/12 ,  G02F1/1345 ,  G02F1/13624 ,  G02F2001/13613 ,  H01L24/81 ,  H01L24/95 ,  H01L2221/68322 ,  H01L2221/68354 ,  H01L2221/68363 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/81001 ,  H01L2924/00014 ,  H01L2924/01025 ,  H01L2924/01057 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/04941 ,  H01L2924/12041 ,  H01L2224/05599

公开(公告)号：EP1543556A2

公开(公告)日：2005-06-22

申请号：EP03748499.5

申请日：2003-09-22

申请人： Advanced Interconnect Technologies Limited

发明人： ISLAM, Shafidul ,  SAN ANTONIO, Romarico, Santos ,  GULTOM, Lenny, Christina

IPC分类号： H01L23/31 ,  H01L21/68 ,  H01L23/498

CPC分类号： H01L21/568 ,  H01L21/561 ,  H01L23/3107 ,  H01L23/4985 ,  H01L24/17 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/05599 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/81001 ,  H01L2224/83001 ,  H01L2224/85001 ,  H01L2224/85399 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： The invention provides a taped lead frame for use in manufacturing electronic packages. The taped lead frame is composed of a tape and a lead frame formed from a plurality of individual metal features attached to the tape and arranged in a footprint pattern. The method of making the invention enables the thickness of conventional frames to shrink significantly to result in thinner packages for improved heat dissipation and shorter geometries for improved electrical performance. A plurality of such lead frames are arranged in an array on a sheet of tape and each lead frame is separated from surrounding lead frames by street regions on the tape such that no metal feature extends into a street region. Integrated circuit chips are attached and electrically connected to the lead frames and an encapsulant is applied, cured and dried over the lead frames and the street regions. Thereafter, the tape is removed and the lead frames are singulated by cutting through the encapsulant in the street regions to form individual packages. Singulation occurs in the street regions and does not cut into any metal feature forming the lead frame.

公开(公告)号：EP1408365A3

公开(公告)日：2005-02-02

申请号：EP03256317.3

申请日：2003-10-07

申请人： SEIKO EPSON CORPORATION

发明人： Kimura, Mutsumi

IPC分类号： G02F1/1368 ,  H01L25/04

CPC分类号： H01L21/6835 ,  G02F2001/136281 ,  H01L21/6836 ,  H01L23/13 ,  H01L23/49816 ,  H01L24/10 ,  H01L24/29 ,  H01L24/81 ,  H01L24/83 ,  H01L27/3244 ,  H01L27/3297 ,  H01L2221/68322 ,  H01L2221/68327 ,  H01L2221/68354 ,  H01L2221/68363 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29299 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81001 ,  H01L2224/8319 ,  H01L2224/83851 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/0104 ,  H01L2924/0105 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01059 ,  H01L2924/0106 ,  H01L2924/01064 ,  H01L2924/01078 ,  H01L2924/04941 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12044 ,  H05K3/20 ,  H05K3/4614 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/13099 ,  H01L2224/05599

摘要： The invention seeks to provide technology for ensuring satisfactory connections upon establishment of electrical connections between pad electrodes provided on a to-be-transferred piece and pad electrodes provided on a transfer destination substrate. A transfer chip according to the present invention is formed on a first substrate and transferred from the first substrate to a second substrate having wiring. The transfer chip serves as a transfer unit including at least a thin-film electrical circuit formed of stacked films and a plurality of pad electrodes for establishing connections between the thin-film electrical circuit and another circuit. The pad electrodes (56d and 56f) are arranged over the entire one surface of the transfer chip and cover thin-film elements or thin-film wiring included in the thin-film electrical circuit provided below the pad electrodes (56d and 56f). Accordingly, the tops (56d-1, 56d-2, and 56f-1) of rough surface portions of the pad electrodes (56d and 56f) have approximately the same height.

公开(公告)号：EP0880170B1

公开(公告)日：2004-09-08

申请号：EP98302110.6

申请日：1998-03-20

申请人： FUJITSU LIMITED

发明人： Tsunoi, Kazuhisa, c/o Fujitsu Limited ,  Kira, Hidehiko, c/o Fujitsu Limited ,  Baba, Shunji, c/o Fujitsu Limited ,  Fujii, Akira, c/o Fujitsu Limited ,  Kusagaya, Toshihiro, c/o Fujitsu Limited ,  Kobae, Kenji, c/o Fujitsu Limited ,  Kainuma, Norio, c/o Fujitsu Limited ,  Ishikawa, Naoki, c/o Fujitsu Limited ,  Emoto, Satoshi, c/o Fujitsu Limited

IPC分类号： H01L21/56 ,  H01L21/60 ,  H01L21/603

CPC分类号： H01L24/81 ,  H01L21/563 ,  H01L24/11 ,  H01L24/29 ,  H01L24/75 ,  H01L2224/1134 ,  H01L2224/11822 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/75 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/81001 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2224/83101 ,  H01L2224/83192 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01061 ,  H01L2924/01079 ,  H01L2924/07802 ,  H01L2924/07811 ,  H01L2924/00

公开(公告)号：EP1408365A2

公开(公告)日：2004-04-14

申请号：EP03256317.3

申请日：2003-10-07

申请人： SEIKO EPSON CORPORATION

发明人： Kimura, Mutsumi

IPC分类号： G02F1/1368 ,  H01L25/04

CPC分类号： H01L21/6835 ,  G02F2001/136281 ,  H01L21/6836 ,  H01L23/13 ,  H01L23/49816 ,  H01L24/10 ,  H01L24/29 ,  H01L24/81 ,  H01L24/83 ,  H01L27/3244 ,  H01L27/3297 ,  H01L2221/68322 ,  H01L2221/68327 ,  H01L2221/68354 ,  H01L2221/68363 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29299 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81001 ,  H01L2224/8319 ,  H01L2224/83851 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/0104 ,  H01L2924/0105 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01059 ,  H01L2924/0106 ,  H01L2924/01064 ,  H01L2924/01078 ,  H01L2924/04941 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12044 ,  H05K3/20 ,  H05K3/4614 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/13099 ,  H01L2224/05599

摘要： The invention seeks to provide technology for ensuring satisfactory connections upon establishment of electrical connections between pad electrodes provided on a to-be-transferred piece and pad electrodes provided on a transfer destination substrate. A transfer chip according to the present invention is formed on a first substrate and transferred from the first substrate to a second substrate having wiring. The transfer chip serves as a transfer unit including at least a thin-film electrical circuit formed of stacked films and a plurality of pad electrodes for establishing connections between the thin-film electrical circuit and another circuit. The pad electrodes (56d and 56f) are arranged over the entire one surface of the transfer chip and cover thin-film elements or thin-film wiring included in the thin-film electrical circuit provided below the pad electrodes (56d and 56f). Accordingly, the tops (56d-1, 56d-2, and 56f-1) of rough surface portions of the pad electrodes (56d and 56f) have approximately the same height.

摘要翻译： 本发明寻求提供技术，以确保在设置在待传送片上的焊盘电极和设置在转印目的基板上的焊盘电极之间建立电连接时确保令人满意的连接。 根据本发明的转印芯片形成在第一基板上并从第一基板转移到具有布线的第二基板。 转移芯片用作至少包括由堆叠膜形成的薄膜电路和用于建立薄膜电路与另一电路之间的连接的多个焊盘电极的转印单元。 焊盘电极（56d和56f）布置在转印芯片的整个表面上，并且覆盖设置在焊盘电极（56d和56f）下方的薄膜电路中的薄膜元件或薄膜布线。 因此，焊盘电极（56d和56f）的粗糙表面部分的顶部（56d-1,66d-2和56f-1）具有大致相同的高度。