公开(公告)号：EP0717442A1

公开(公告)日：1996-06-19

申请号：EP95402812.2

申请日：1995-12-14

Applicant: BULL S.A.

Inventor： Dehaine, Gérard ,  Stricot, Yves

IPC: H01L23/498

CPC classification number: H01L24/81 ,  H01L23/49816 ,  H01L23/4985 ,  H01L2224/81801 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01058 ,  H01L2924/01061 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H05K3/321 ,  H05K3/3436 ,  H05K3/3457 ,  H05K3/3478 ,  H05K3/363 ,  H05K2201/0394 ,  H05K2201/09036 ,  H05K2201/09472 ,  H05K2201/10568 ,  H05K2201/10681 ,  H05K2201/10992 ,  H05K2203/041 ,  Y02P70/613

Abstract: Dans le boîtier (10), le support de connexion (12) de circuit intégré (11) comprend un film isolant (13), dont une face porte des conducteurs (14) et l'autre face porte des boules (15) reliées aux conducteurs respectifs par l'intermédiaire de traversées (16) et directement fixées dans lesdites traversées, dont le fond est formé par les conducteurs respectifs. Les boules sont de préférence faites en un matériau refusionnable tel que l'étain-plomb et la fixation peut d'abord être faite par une substance adhésive. Le procédé de connexion entre deux supports de connexion (12, 22) par l'intermédiaire de boules (15), l'un des supports comprenant un film (13) dont une face est pourvue de conducteurs (14) et l'autre face est pourvue de traversées (16), consiste à fixer directement les boules aux conducteurs dans les traversées par refusion des boules. Les boules peuvent être soudées ou au préalable fixées par une substance adhésive aux plages de connexion (23) de la carte (22).

Abstract translation: 该方法包括使用在一个表面上承载导体（14）的绝缘膜（13）。 膜的另一个表面承载形成在孔（16）中的液滴（15），其形成到电路的连接。 液滴是首选。 由可以再熔化的材料制成，这种锡铅焊料。 然后通过熔化或使用粘合剂层将液滴连接到相邻电路支架上的接触焊盘（23）。

公开(公告)号：EP0643903A4

公开(公告)日：1995-09-20

申请号：EP94912785

申请日：1994-03-17

Applicant: MOTOROLA INC

Inventor： MELTON CYNTHIA ,  FUERHAUPTER HARRY ,  DEMET GEORGE

IPC: B23K35/00 ,  B23K35/26 ,  H05K3/24 ,  H05K3/34

CPC classification number: H05K3/3484 ,  B23K35/007 ,  B23K35/264 ,  H05K3/243 ,  H05K3/3442 ,  H05K3/3452 ,  H05K3/3463 ,  H05K3/3473 ,  H05K2201/0317 ,  H05K2201/10636 ,  H05K2201/10992 ,  H05K2203/0435 ,  H05K2203/054 ,  Y02P70/611

Abstract: In an electronic package, a solder connection (14) for bonding faying surfaces (31, 40) is formed of tin-bismuth alloy comprising a tertiary metal, preferably gold or silver, in an amount effective to increase the melting temperature of the alloy and enhance mechanical properties of the connection at elevated temperatures typically encountered during operation. A process for forming the solder connection comprises applying a film (36) of the tertiary metal onto at least one faying surface (31) and thereafter applying tin-bismuth solder paste (38) onto the film. Preferably, a plate (26) of tin-bismuth alloy is first electroplated onto the faying surface (31), onto which the tertiary metal is plated. During heating to reflow the solder, the tertiary metal dissolves to produce a uniform liquid that forms the connection.

公开(公告)号：EP0624053A2

公开(公告)日：1994-11-09

申请号：EP94105413.2

申请日：1994-04-07

Applicant: SONY CORPORATION

Inventor： Goodman,Thomas W. c/o Sony Corporation ,  Fujita, Hiroyuki, c/o Sony Corporation ,  Murakami, Yoshikazu, c/o Sony Corporation ,  Murphy, Arthur T.

IPC: H05K3/34

CPC classification number: H05K3/3484 ,  H05K3/303 ,  H05K3/3436 ,  H05K2201/09909 ,  H05K2201/10568 ,  H05K2201/10734 ,  H05K2201/10992 ,  H05K2203/0126 ,  H05K2203/0195 ,  H05K2203/0338 ,  H05K2203/043 ,  H05K2203/044 ,  Y02P70/613 ,  Y10T29/49144

Abstract: A method of mounting an electronic part (10) having a terminal portion (12) on a board (20) on which a circuit including a connection portion (22) is formed. It includes a process of forming a conductive layer (14) on the surface of the terminal portion (12); a process of forming, on the surface of the connection portion (22), a conductive layer (24) having a melting point different from that of the conductive layer (14) formed on the surface of the terminal portion (12); and a process of melting the conductive layer (24) having a low melting point in such a state that the conductive layer (14) of the terminal portion (12) is contacted with the conductive layer (24) of the connection portion (22), thereby fusing the conductive layer (24) having a low melting point onto the conductive layer (14) having a high melting point. Moreover, the method includes a process of forming a projecting portion (16) made of a heat-resisting material on the surface of the electronic part (10) around the terminal portion (12), and forming a conductive layer (14,24) on at least one surface of the connection portion (22) or the terminal portion (12); and a process of electrically connecting the connection portion (22) with the terminal portion (12) and allowing the projecting portion (16) to be contacted with the surface of the board (20).

Abstract translation: 安装在电子部件（10），其具有在其上的电路包括一个连接部分（22）形成在板（20）的终端部分（12）的方法。 它包括形成终端部分的表面上的导电层（14）（12）的过程; 形成，所述连接部分（22），导电层（24）的表面上具有从导电层的事实不同的熔点的过程（14）形成在所述端子部（12）的表面上; 和熔化具有寻求状态DASS低熔点导电层（24）的处理模具的终端部分（12）的导电层（14）与所述连接部分的导电层（24）接触（22） ，从而熔化具有高熔点的导电层（24），其具有低的熔点至导电层（14）。 更上方，该方法包括形成围绕所述端子部的电子部件（10）的表面上制成的耐热材料的一个突出部分（16）（12），并形成导电层的工序（14,24） 连接部（22）或所述端子部的至少一个表面上（12）; 和电的连接过程与终端部分（12）的连接部（22）并允许所述突出部（16）与所述板（20）的表面接触。

公开(公告)号：EP0229850A1

公开(公告)日：1987-07-29

申请号：EP86904381.0

申请日：1986-07-16

Applicant: Nippon Telegraph and Telephone Corporation

Inventor： OSAKI, Takaaki ,  MATSUI, Norio ,  EGAWA, Yutaka ,  SASAKI, Shinichi

IPC: H01L21/60 ,  H01L23/48 ,  H05K1/18 ,  H05K3/34

CPC classification number: H01L24/13 ,  H01L23/5385 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L2224/1134 ,  H01L2224/1308 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2224/81101 ,  H01L2224/81801 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/16195 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3511 ,  H05K1/0306 ,  H05K3/3436 ,  H05K3/4053 ,  H05K2201/0394 ,  H05K2201/10378 ,  H05K2201/10424 ,  H05K2201/10992 ,  Y02P70/613 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49144 ,  H01L2224/13099 ,  H01L2224/29099 ,  H01L2924/00

Abstract: A laminated structure is formed by providing metal layers having wettability relative to solder at least on both sides and by inserting at least one layer of a metal which can control the diffusion of the solder between them. The terminals for connection between the substrates having structure in which a pair of solder bumps are adhered onto both surfaces of the laminated structure, and a method of producing the same are given.

公开(公告)号：EP0177042A2

公开(公告)日：1986-04-09

申请号：EP85112539.3

申请日：1985-10-03

Applicant: HITACHI, LTD.

Inventor： Satoh, Ryohei ,  Oshima, Muneo ,  Tanaka, Minoru ,  Murata, Akira ,  Sakaguchi, Suguru ,  Hirota, Kazuo

IPC: H01L23/48 ,  H01L21/60

CPC classification number: H01L24/10 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13116 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/81801 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15787 ,  H01L2924/16195 ,  H01L2924/19041 ,  H01L2924/19043 ,  H05K3/3436 ,  H05K3/3442 ,  H05K2201/10636 ,  H05K2201/10727 ,  H05K2201/10992 ,  H05K2203/0108 ,  H05K2203/033 ,  H05K2203/0338 ,  H05K2203/0405 ,  H05K2203/0415 ,  Y02P70/611 ,  Y02P70/613 ,  Y10T29/49144 ,  H01L2924/00014 ,  H01L2224/29099 ,  H01L2924/00

Abstract: In connecting an electronic circuit part such as a semiconductor (1) or other part to a substrate (2) for mounting the part with solder (6), the solder is composed of a high-melting-point solder portion which is subjected working such as rolling and heat treatment in order to break the cast structure thereof, and a smaller volume of low-melting-point solder portions. The high-melting-point solder portion is connected to both the electronic circuit substrate and the electronic circuit part through the low-point-melting solder portions.
This method enables interconnection between objects to be connected without impairing the high ductility and toughness of the high-melting-point solder which is subjected to working and heat treatment. This soldering method ensures highly relialable manufacture of miniaturized high density circuits, such as LSI.

公开(公告)号：EP2849216A4

公开(公告)日：2015-07-22

申请号：EP13787864

申请日：2013-04-05

Applicant: PANASONIC IP MAN CO LTD

Inventor： KISHI ARATA ,  MUNAKATA HIRONORI ,  MOTOMURA KOJI ,  MARUO HIROKI

IPC: H01L21/60 ,  H01L23/00 ,  H05K3/34

CPC classification number: H05K1/181 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/10156 ,  H01L2224/16238 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/32052 ,  H01L2224/32057 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/81052 ,  H01L2224/81191 ,  H01L2224/8159 ,  H01L2224/81609 ,  H01L2224/81611 ,  H01L2224/81613 ,  H01L2224/81639 ,  H01L2224/81647 ,  H01L2224/81815 ,  H01L2224/81935 ,  H01L2224/81951 ,  H01L2224/81986 ,  H01L2224/83104 ,  H01L2224/83192 ,  H01L2224/9211 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/384 ,  H05K3/3436 ,  H05K3/3463 ,  H05K3/3484 ,  H05K2201/10734 ,  H05K2201/10977 ,  H05K2201/10992 ,  H05K2201/2009 ,  H05K2201/2036 ,  H05K2201/2045 ,  Y02P70/613 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A mounting structure includes a bonding material (106) that bonds second electrodes (104) of a circuit board (105) and bumps (103) of a semiconductor package (101), the bonding material (106) being surrounded by a first reinforcing resin (107). Moreover, a portion between the outer periphery of the semiconductor package (101) and the circuit board (105) is covered with a second reinforcing resin (108). Even if the bonding material (106) is a solder material having a lower melting point than a conventional bonding material, high drop resistance is obtained.

公开(公告)号：EP2849216A1

公开(公告)日：2015-03-18

申请号：EP13787864.1

申请日：2013-04-05

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： KISHI, Arata ,  MUNAKATA, Hironori ,  MOTOMURA, Koji ,  MARUO, Hiroki

IPC: H01L21/60 ,  H05K3/34

CPC classification number: H05K1/181 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/10156 ,  H01L2224/16238 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/32052 ,  H01L2224/32057 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/81052 ,  H01L2224/81191 ,  H01L2224/8159 ,  H01L2224/81609 ,  H01L2224/81611 ,  H01L2224/81613 ,  H01L2224/81639 ,  H01L2224/81647 ,  H01L2224/81815 ,  H01L2224/81935 ,  H01L2224/81951 ,  H01L2224/81986 ,  H01L2224/83104 ,  H01L2224/83192 ,  H01L2224/9211 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/384 ,  H05K3/3436 ,  H05K3/3463 ,  H05K3/3484 ,  H05K2201/10734 ,  H05K2201/10977 ,  H05K2201/10992 ,  H05K2201/2009 ,  H05K2201/2036 ,  H05K2201/2045 ,  Y02P70/613 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A mounting structure includes a bonding material (106) that bonds second electrodes (104) of a circuit board (105) and bumps (103) of a semiconductor package (101), the bonding material (106) being surrounded by a first reinforcing resin (107). Moreover, a portion between the outer periphery of the semiconductor package (101) and the circuit board (105) is covered with a second reinforcing resin (108). Even if the bonding material (106) is a solder material having a lower melting point than a conventional bonding material, high drop resistance is obtained.

Abstract translation: 安装结构包括接合电路板（105）的第二电极（104）和半导体封装（101）的凸块（103）的接合材料（106），接合材料（106）被第一增强树脂 （107）。 此外，半导体封装（101）的外周与电路板（105）之间的部分被第二增强树脂（108）覆盖。 即使接合材料（106）是具有比常规接合材料更低的熔点的焊接材料，也可获得高的抗跌落性。

公开(公告)号：EP2009971B1

公开(公告)日：2015-01-07

申请号：EP07740178.4

申请日：2007-03-28

Applicant: DOWA Electronics Materials Co., Ltd.

Inventor： OSHIKA, Yoshikazu, c/o DOWA ELECTRONICS MATERILA CO., LTD. ,  HASHIMOTO, Munenori, c/o DOWA ELECTRONCS MATERIALS CO., LTD. ,  NAKANO, Masayuki, c/o DOWA ELECTRONICS MATERIALS CO., LTD.

IPC: H05K3/34 ,  H01L21/52

CPC classification number: H05K3/3463 ,  H01L24/29 ,  H01L24/33 ,  H01L24/45 ,  H01L24/48 ,  H01L24/83 ,  H01L24/85 ,  H01L33/62 ,  H01L2224/29 ,  H01L2224/29101 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29144 ,  H01L2224/2919 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/83192 ,  H01L2224/83801 ,  H01L2224/85 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1301 ,  H01L2924/14 ,  H01L2924/157 ,  H01L2924/15724 ,  H01L2924/15747 ,  H01L2924/15787 ,  H01L2924/351 ,  H05K2201/10992 ,  Y10T29/49144 ,  Y10T29/49179 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/01083 ,  H01L2924/00015 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/2929 ,  H01L2224/29298

公开(公告)号：EP2749374A1

公开(公告)日：2014-07-02

申请号：EP11808554.7

申请日：2011-09-30

Applicant: Senju Metal Industry Co., Ltd

Inventor： ABE Masahiko ,  WATANABE Koji ,  TAKAHASHI Hideaki ,  KANNO Masahiko ,  ITO Masaya

IPC: B23K35/14 ,  B23K35/40 ,  H05K3/34

CPC classification number: B23K35/0222 ,  B23K1/0016 ,  B23K1/008 ,  B23K3/0623 ,  B23K35/02 ,  B23K35/26 ,  B23K35/262 ,  B23K35/286 ,  B23K35/302 ,  B23K35/325 ,  B23K35/40 ,  B23K2201/42 ,  B26F1/02 ,  H05K3/3478 ,  H05K3/3484 ,  H05K2201/10636 ,  H05K2201/10992 ,  H05K2203/0415 ,  H05K2203/082 ,  Y02P70/611 ,  Y10T83/0448 ,  Y10T83/0481

Abstract: To provide a solder piece that prevents its surface on which the shear droop portion generated by the punching process is formed from becoming a sucked surface.
The solder piece 1A is provided with four surfaces, namely, a first surface 11, a second surface 12, a third surface 13 and a fourth surface 14, which can be an sucked surface on the occasion of handling; a fifth surface 15 which is a surface on which a shear droop portion 15a generated by the punching process is formed and a sixth surface 16 that is opposite to the fifth surface 15. The solder piece 1A is punched out in a direction shown in an arrow A with the first surface 11, the second surface 12, the third surface 13 and the fourth surface 14 being shared surfaces. This enables the four surfaces thereof excluding from surfaces thereof the fifth surface 15 on which the shear droop portion 15a is formed and the sixth surface 16 that is opposite to the fifth surface 15 to be formed with desired size and precision. It is configured so that any one of the first surface 11, the second surface 12, the third surface 13 and the fourth surface 14 becomes a sucked surface and the fifth surface 15 on which the shear droop portion 15a is formed is prevented from becoming the sucked surface.

Abstract translation: 为了提供一种防止其形成由冲压加工产生的剪切下垂部分的表面成为吸附表面的焊料。 焊料片1A具有四个表面，即处理时可以是吸表面的第一表面11，第二表面12，第三表面13和第四表面14。 第五表面15，其上形成有通过冲压加工产生的剪切下垂部分15a的表面和与第五表面15相对的第六表面16.焊料片1A沿箭头所示的方向冲压 A，第一表面11，第二表面12，第三表面13和第四表面14是共用表面。 由此，能够形成除了形成有剪切下垂部15a的第五表面15和与第五表面15相对的第六表面16的四个表面，以形成期望的尺寸和精度。 其结构使得第一表面11，第二表面12，第三表面13和第四表面14中的任何一个变成吸入表面，并且防止其上形成有剪切下垂部分15a的第五表面15成为 吸表面。

公开(公告)号：EP2530708A1

公开(公告)日：2012-12-05

申请号：EP11734655.1

申请日：2011-01-19

Applicant: Japan Aviation Electronics Industry, Limited

Inventor： UCHIDA, Daisuke

IPC: H01L21/60 ,  H01L21/607 ,  H05K3/32

CPC classification number: H01L24/11 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05624 ,  H01L2224/1134 ,  H01L2224/1184 ,  H01L2224/13005 ,  H01L2224/13124 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2224/78302 ,  H01L2224/78314 ,  H01L2224/78318 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81205 ,  H01L2224/81444 ,  H01L2224/81801 ,  H01L2224/85909 ,  H01L2224/85947 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/3656 ,  H05K3/328 ,  H05K2201/10674 ,  H05K2201/10992 ,  H01L2224/0558 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2924/00012

Abstract: When a flip-chip mounting component with an Al/Au bonding structure is exposed to high temperature, voids may be caused in the Al electrode. The generation of voids causes failed connection or failed bonding between the Al electrode and the Au bump, thereby significantly degrading the connection reliability and bonding reliability in the flip-chip mounting structure. An object of the preset invention is to provide a flip-chip mounting structure that has high connection reliability and bonding reliability without being degraded even in high temperature. In a flip-chip mounting structure for wirelessly connecting an IC chip 21 having an Al electrode 22 and a substrate 41 having an Au electrode 43, a bump 52 of Al or Al alloy is formed on the Al electrode 22 of the IC chip 21 and, via the bump 52, the Al electrode 22 of the IC chip 21 and the Au electrode 43 of the substrate 41 are bonded to each other.

Abstract translation: 当具有Al / Au键合结构的倒装芯片安装部件暴露于高温时，可能在Al电极中引起空隙。 空隙的产生导致Al电极和Au凸块之间的连接失败或接合不良，从而显着降低了倒装芯片安装结构中的连接可靠性和接合可靠性。 本发明的目的是提供一种倒装芯片安装结构，即使在高温下也不会降低连接可靠性和接合可靠性。 在用于无线连接具有Al电极22的IC芯片21和具有Au电极43的基板41的倒装芯片安装结构中，在IC芯片21的Al电极22上形成Al或Al合金的凸起52， 通过凸块52，IC芯片21的Al电极22和基板41的Au电极43彼此接合。