Abstract:
Products and assemblies are provided for socketably receiving elongate interconnection elements (516), such as spring contact elements, extending from electronic components (518), such as semiconductor devices. Socket substrates (504) are provided with capture pads (506) for receiving ends of elongate interconnection elements (516) extending from electronic components (518). Various capture pad configurations are disclosed. A securing device such as a housing (520) positions the electronic component securely to the socket substrate (504). Connections to external devices are provided via conductive traces (510) adjacent the surface of the socket substrate. The socket substrate (504) may be supported by a support substrate (502). In a particularly preferred embodiment the capture pads are formed directly on a primary substrate such as a printed circuit board.
Abstract:
According to the invention a socket is provided for removably connecting a first electronic component (304) to a second electronic component (302). The socket comprises a plurality of elongate, resilient contact structures (320) extending away from a first surface (310a) of a support substrate (310), contact regions (320b) of said elongate, resilient contact structures (320) deflecting to form pressure connections with terminals (308) of the first electronic component (304); and a plurality of contact structures (314) disposed on the opposing surface (310b) of the support substrate (310), the plurality of contact structures permanently connected to terminals of the second electronic component (302), selected ones of the contact structures (314) are connected through the support substrate (310) to selected ones of the elongate, resilient contact structures (320). Each of the plurality of elongate contact structures of the socket comprises an elongate element (122) of a first material; and a second material (124) deposited on the first material, wherein the second material has a yield strength that is greater than a yield strength of the first material. Further a method for removably connecting a first electronic component (304) to a second electronic component (302) is provided.
Abstract:
Techniques for performing wafer-level burn-in and test of semiconductor devices include a test substrate (106 and 108) having active electronic components (106a, 106b, 106c, 106d) such as ASICs mounted to an interconnection substrate (108) or incorporated therein, metallic spring contact element (110) effecting interconnections between the ASICs and a plurality of devices-under-test (DUTs) (102a, 102b, 102c, 102d) on a wafer-under-test (WUT), all disposed in a vacuum vessel so that the ASICs can be operated at temperatures independent from and significantly lower than the burn-in temperature of the DUTs. The spring contact elements (110) may be mounted to either the DUTs or to the ASICs, and may fan out to relax tolerance constraints on aligning and interconnecting the ASICs and the DUTs. A significant reduction in interconnect count and consequent simplification of the interconnection substrate (108) is realized because the ASICs are capable of receiving a plurality of signals for testing the DUTs over relatively few signal lines from a host controller (116) and promulgating these signals over the relatively many interconnections between the ASICs and the DUTS.
Abstract:
Techniques for performing wafer-level burn-in and test of semiconductor devices include a test substrate (106 and 108) having active electronic components (106a, 106b, 106c, 106d) such as ASICs mounted to an interconnection substrate (108) or incorporated therein, metallic spring contact element (110) effecting interconnections between the ASICs and a plurality of devices-under-test (DUTs) (102a, 102b, 102c, 102d) on a wafer-under-test (WUT), all disposed in a vacuum vessel so that the ASICs can be operated at temperatures independent from and significantly lower than the burn-in temperature of the DUTs. The spring contact elements (110) may be mounted to either the DUTs or to the ASICs, and may fan out to relax tolerance constraints on aligning and interconnecting the ASICs and the DUTs. A significant reduction in interconnect count and consequent simplification of the interconnection substrate (108) is realized because the ASICs are capable of receiving a plurality of signals for testing the DUTs over relatively few signal lines from a host controller (116) and promulgating these signals over the relatively many interconnections between the ASICs and the DUTS.
Abstract:
A method of making a temporary connection between a first electronic component and a second electronic component, and subsequently making a permanent connection between the first electronic component and a third electronic component, comprising permanently mounting a plurality of resilient contact structures to a surface of the first electronic component; urging the first electronic component against the second electronic component to effect a temporary connection between the first electronic component and the second electronic component; removing the second electronic component; and mounting the first electronic component to the third electronic component.
Abstract:
The invention relates to a method of fabricating an interconnection element, comprising fabricating an interconnection component (730), including a connection region; fabricating a cantilever beam structure (720) on a sacrificial substrate; mounting the cantilever beam structure (720) to the connection region of the interconnection component (736); and releasing the mounted cantilever beam structure from the sacrificial substrate by removing at least a portion of the sacrificial substrate, whereby a cantilever beam arrangement (720, 730) is formed.
Abstract:
A method of connecting to a semiconductor device comprises the steps of permanently mounting a plurality of elongate electrical contact structures (1330) to a semiconductor device (1302), the semiconductor device comprising at least one die; urging the semiconductor device against a first electronic component (1310) to effect a temporary connection between the semiconductor device and the first electronic component, with the electrical contact structures serving as electrical interconnects between the semiconductor device and the first electronic component; and using at least a plurality of the same electrical contact structures mounted to the semiconductor device to effect a permanent connection between at least one die of the semiconductor device and a second electronic component.
Abstract:
Products and assemblies are provided for socketably receiving elongate interconnection elements (516), such as spring contact elements, extending from electronic components (518), such as semiconductor devices. Socket substrates (504) are provided with capture pads (506) for receiving ends of elongate interconnection elements (516) extending from electronic components (518). Various capture pad configurations are disclosed. A securing device such as a housing (520) positions the electronic component securely to the socket substrate (504). Connections to external devices are provided via conductive traces (510) adjacent the surface of the socket substrate. The socket substrate (504) may be supported by a support substrate (502). In a particularly preferred embodiment the capture pads are formed directly on a primary substrate such as a printed circuit board.
Abstract:
A method of burning-in semiconductor devices, comprising permanently mounting a plurality of resilient contact structures on a plurality of unsingulated semiconductor devices on a semiconductor wafer; powering up at least a portion of the unsingulated semiconductor devices by making pressure connections to the resilient contact structures on the portion of the unsingulated semiconductor devices; and heating the semiconductor devices to a temperature of at least 150° C for less than 60 minutes.
Abstract:
A method of producing a tested semiconductor device comprising: providing a probe card assembly, said probe card assembly including a probe card having a plurality of electrical contacts, a probe substrate having a plurality of elongate, resilient probe elements, and a compliant interconnection structure electrically connecting ones of said electrical contacts with ones of said probe elements; providing a plurality of semiconductor devices, each of said semiconductor devices including electrical contact pads; bringing said probe elements into contact with said electrical contact pads of said semiconductor device; and testing said semiconductor devices.