TECHNIQUES FOR FORMING INTEGRATED PASSIVE DEVICES
    10.
    发明公开
    TECHNIQUES FOR FORMING INTEGRATED PASSIVE DEVICES 审中-公开
    形成集成无源器件的技术

    公开(公告)号:EP3161840A1

    公开(公告)日:2017-05-03

    申请号:EP14895620.4

    申请日:2014-06-25

    申请人: Intel Corporation

    IPC分类号: H01F17/00 H01G4/32 H01F41/04

    摘要: Techniques are disclosed for forming integrated passive devices, such as inductors and capacitors, using next-generation lithography (NGL) processes, such as electron-beam direct write (EBDW) and extreme ultraviolet lithography (EUVL). The techniques can be used to form various different integrated passive devices, such as inductors (e.g., spiral inductors) and capacitors (e.g., metal finger capacitors), having higher density, precision, and quality factor (Q) values than if such devices were formed using 193 nm photolithography. The high Q and dense passive devices formed can be used in radio frequency (RF) and analog circuits to boost the performance of such circuits. The increased precision may be realized based on an improvement in, for example, line edge roughness (LER), achievable resolution/critical dimensions, sharpness of corners, and/or density of the formed structures.

    摘要翻译: 公开了使用诸如电子束直写(EBDW)和极紫外光刻(EUVL)的下一代光刻(NGL)工艺来形成诸如电感器和电容器的集成无源器件的技术。 这些技术可用于形成各种不同的集成无源器件,例如电感器(例如螺旋电感器)和电容器(例如金属指状电容器),其密度,精度和品质因数(Q)值高于如果这样的器件是 使用193纳米光刻法形成。 所形成的高Q和密集无源器件可用于射频(RF)和模拟电路,以提高此类电路的性能。 可以基于例如线边缘粗糙度(LER),可实现的分辨率/关键尺寸,拐角的锐度和/或所形成的结构的密度的改进来实现提高的精确度。