公开(公告)号：EP2628174A2

公开(公告)日：2013-08-21

申请号：EP11833001.8

申请日：2011-09-26

申请人： Invensas Corporation

发明人： BARRIE, Keith, Lake ,  PANGRLE, Suzette, K. ,  VILLAVICENCIO, Grant ,  LEAL, Jeffrey, S.

IPC分类号： H01L21/60

CPC分类号： H01L24/83 ,  H01L23/293 ,  H01L23/3185 ,  H01L24/05 ,  H01L24/24 ,  H01L24/25 ,  H01L24/82 ,  H01L25/0657 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/038 ,  H01L2224/0381 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05567 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/05664 ,  H01L2224/1131 ,  H01L2224/11848 ,  H01L2224/13017 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/13311 ,  H01L2224/13313 ,  H01L2224/13347 ,  H01L2224/16145 ,  H01L2224/24051 ,  H01L2224/24105 ,  H01L2224/24146 ,  H01L2224/24226 ,  H01L2224/244 ,  H01L2224/245 ,  H01L2224/24992 ,  H01L2224/24997 ,  H01L2224/25175 ,  H01L2224/2919 ,  H01L2224/82009 ,  H01L2224/82039 ,  H01L2224/82101 ,  H01L2224/831 ,  H01L2225/06524 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/0665 ,  H01L2924/00012 ,  H01L2224/05552 ,  H01L2924/00

摘要： A die has interconnect pads on an interconnect side near an interconnect edge and has at least a portion of the interconnect side covered by a conformal dielectric coating, in which an interconnect trace over the dielectric coating forms a high interface angle with the surface of the dielectric coating. Because the traces have a high interface angle, a tendency for the interconnect materials to "bleed" laterally is mitigated and contact or overlap of adjacent traces is avoided. The interconnect trace includes a curable electrically conductive interconnect material; that is, it includes a material that can be applied in a flowable form, and thereafter cured or allowed to cure to form the conductive traces. Also, a method includes, prior to forming the traces, subjecting the surface of the conformal dielectric coating with a CF4 plasma treatment.

公开(公告)号：EP3070739A2

公开(公告)日：2016-09-21

申请号：EP16153575.2

申请日：2016-02-01

申请人： MediaTek, Inc

发明人： SYU, Shih-Yi ,  HSIEH, Tung-Hsien ,  CHOU, Che-Ya

IPC分类号： H01L23/522 ,  H01L23/538 ,  H01L23/485 ,  H01L23/31 ,  H01L23/66

CPC分类号： H01L23/5386 ,  H01L23/291 ,  H01L23/3171 ,  H01L23/3192 ,  H01L23/49811 ,  H01L23/49838 ,  H01L23/5226 ,  H01L23/525 ,  H01L23/53228 ,  H01L23/5384 ,  H01L23/66 ,  H01L24/05 ,  H01L24/09 ,  H01L24/17 ,  H01L24/20 ,  H01L24/24 ,  H01L24/25 ,  H01L24/96 ,  H01L25/0655 ,  H01L2224/02331 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05008 ,  H01L2224/05013 ,  H01L2224/05015 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05553 ,  H01L2224/05555 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/12105 ,  H01L2224/13147 ,  H01L2224/19 ,  H01L2224/24137 ,  H01L2224/244 ,  H01L2224/245 ,  H01L2224/25175 ,  H01L2224/73209 ,  H01L2924/01029 ,  H01L2924/14 ,  H01L2924/18162 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2924/00014

摘要： An RDL structure on a passivation layer includes a first landing pad disposed directly above a first on-chip metal pad; a first via in a passivation layer to electrically connecting the first landing pad with the first on-chip metal pad; a second landing pad disposed directly above the second on-chip metal pad; a second via in the passivation layer to electrically connecting the second landing pad with the second on-chip metal pad; and at least five traces being disposed on the passivation layer and passing through a space between the first landing pad and the second landing pad.

摘要翻译： 钝化层上的RDL结构包括直接设置在第一片上金属焊盘上方的第一着陆焊盘; 钝化层中的第一通孔，用于将第一着陆焊盘与第一片上金属焊盘电连接; 第二着陆焊盘，其设置在所述第二片上金属焊盘的正上方; 在所述钝化层中的第二通孔，用于将所述第二着陆焊盘与所述第二片上金属焊盘电连接; 并且至少五个迹线设置在钝化层上并且穿过第一着陆焊盘和第二着陆焊盘之间的空间。

公开(公告)号：EP3070739A3

公开(公告)日：2016-12-07

申请号：EP16153575.2

申请日：2016-02-01

申请人： MediaTek, Inc

发明人： SYU, Shih-Yi ,  HSIEH, Tung-Hsien ,  CHOU, Che-Ya

IPC分类号： H01L23/522 ,  H01L23/538 ,  H01L23/485 ,  H01L23/31 ,  H01L23/66

CPC分类号： H01L23/5386 ,  H01L23/291 ,  H01L23/3171 ,  H01L23/3192 ,  H01L23/49811 ,  H01L23/49838 ,  H01L23/5226 ,  H01L23/525 ,  H01L23/53228 ,  H01L23/5384 ,  H01L23/66 ,  H01L24/05 ,  H01L24/09 ,  H01L24/17 ,  H01L24/20 ,  H01L24/24 ,  H01L24/25 ,  H01L24/96 ,  H01L25/0655 ,  H01L2224/02331 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05008 ,  H01L2224/05013 ,  H01L2224/05015 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05553 ,  H01L2224/05555 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/12105 ,  H01L2224/13147 ,  H01L2224/19 ,  H01L2224/24137 ,  H01L2224/244 ,  H01L2224/245 ,  H01L2224/25175 ,  H01L2224/73209 ,  H01L2924/01029 ,  H01L2924/14 ,  H01L2924/18162 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2924/00014

摘要： An RDL structure on a passivation layer includes a first landing pad disposed directly above a first on-chip metal pad; a first via in a passivation layer to electrically connecting the first landing pad with the first on-chip metal pad; a second landing pad disposed directly above the second on-chip metal pad; a second via in the passivation layer to electrically connecting the second landing pad with the second on-chip metal pad; and at least five traces being disposed on the passivation layer and passing through a space between the first landing pad and the second landing pad.

摘要翻译： 钝化层上的RDL结构包括直接设置在第一片上金属焊盘上方的第一焊盘; 在钝化层中的第一通孔，以将所述第一连接焊盘与所述第一片上金属焊盘电连接; 直接设置在所述第二片上金属焊盘之上的第二焊盘; 在所述钝化层中的第二通孔，以将所述第二着陆焊盘与所述第二片上金属焊盘电连接; 并且至少五条迹线设置在钝化层上并且穿过第一连接焊盘和第二连接焊盘之间的空间。

公开(公告)号：EP2879175A1

公开(公告)日：2015-06-03

申请号：EP14191965.4

申请日：2014-11-05

申请人： Honeywell International Inc.

发明人： Jensen, Ronald J.

IPC分类号： H01L25/16 ,  H01L25/065 ,  H01L25/10 ,  H01L23/498

CPC分类号： H01L24/64 ,  H01L21/78 ,  H01L24/03 ,  H01L24/24 ,  H01L24/82 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0655 ,  H01L25/105 ,  H01L25/162 ,  H01L29/0657 ,  H01L2224/02371 ,  H01L2224/0345 ,  H01L2224/05009 ,  H01L2224/0557 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/24145 ,  H01L2224/244 ,  H01L2224/245 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29299 ,  H01L2224/293 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/82101 ,  H01L2224/82801 ,  H01L2224/92244 ,  H01L2224/94 ,  H01L2225/06524 ,  H01L2225/06551 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2924/12042 ,  H01L2224/03 ,  H01L2924/00 ,  H01L2924/0665 ,  H01L2924/00014 ,  H01L2924/014

摘要： In some examples, an integrated circuit (IC) includes a semiconductor substrate defining a perimeter of the integrated circuit and a castellation formed at the perimeter. The IC also may include a layer including an electrically conductive material formed on a surface of the castellation. In some examples, the layer including the electrically conductive material is not substantially parallel to adjacent portions of the perimeter of the IC. The integrated circuit may be used in a system, in which the metallized castellation may be used to electrically connect the IC to an external structure, such as another IC or a printed board.

摘要翻译： 在一些示例中，集成电路（IC）包括限定集成电路的周边的半导体衬底和在周边形成的城堡。 该IC还可以包括形成在该座cast的表面上的导电材料的层。 在一些实例中，包括导电材料的层基本上不平行于IC的周边的相邻部分。 集成电路可以用在系统中，其中可以使用金属化的城堡将IC电连接到诸如另一IC或印刷电路板的外部结构。

公开(公告)号：EP3075006A1

公开(公告)日：2016-10-05

申请号：EP14805471.1

申请日：2014-10-09

申请人： AT & S Austria Technologie & Systemtechnik Aktiengesellschaft

发明人： STAHR, Johannes ,  MORIANZ, Mike

IPC分类号： H01L23/538 ,  H05K1/18

CPC分类号： H05K1/185 ,  H01L23/5384 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/25 ,  H01L24/82 ,  H01L24/96 ,  H01L2224/04105 ,  H01L2224/05647 ,  H01L2224/24137 ,  H01L2224/24195 ,  H01L2224/244 ,  H01L2224/2518 ,  H01L2224/8201 ,  H01L2224/82039 ,  H01L2224/82359 ,  H01L2224/82379 ,  H01L2924/1203 ,  H01L2924/13055 ,  H01L2924/13091 ,  H05K1/0298 ,  H05K1/115 ,  H05K1/189 ,  H05K3/0035 ,  H05K3/0038 ,  H05K3/0055 ,  H05K3/108 ,  H05K3/26 ,  H05K3/46 ,  H05K2201/09509 ,  H05K2201/10166 ,  H05K2201/10174 ,  H05K2203/0392 ,  H05K2203/125

摘要： The invention relates to a circuit board structure (21, 22), comprising at least one insulating layer (10), at least one conducting layer (11, 12), and at least one embedded component (1, 23 - 26) having contact pads (5) having an outer barrier layer (4), wherein at least two conducting tracks/conducting layers (19, 20) are connected to at least two connections (8; 8d, 8g, 8s) by means of vias (9; 9d, 9g, 9s) and each via (9; 9d, 9g, 9s) extends from a conducting track/conducting layer (11, 12) directly to the barrier contact layer (4; 4d, 4g, 4s) of the corresponding connection (8; 8d, 8g, 8s) of the component (1, 23 - 26).

摘要翻译： 一种印刷电路板结构，其包括至少一个绝缘层，至少一个导体层和至少一个具有接触焊盘的嵌入部件，所述接触焊盘具有外部阻挡层，其中至少两个导体路径/导体层的结构连接到 至少两个使用通孔的连接，并且每个通孔从导体路径/导体层直接连接到部件的对应连接的阻挡接触层。

公开(公告)号：EP2147463A2

公开(公告)日：2010-01-27

申请号：EP08742558.3

申请日：2008-04-04

申请人： Eastman Kodak Company

发明人： ALI, Mohammad Zaki ,  STOLT, Peter Axel ,  HAWKINS, Gilbert Allen ,  STEPHANY, Thomas Michael

IPC分类号： H01L21/60 ,  H01L23/48 ,  H05K3/10 ,  G01N27/28 ,  H01L21/48

CPC分类号： H01L23/48 ,  B81B2207/098 ,  B81C1/00301 ,  H01L21/4864 ,  H01L24/24 ,  H01L24/32 ,  H01L24/82 ,  H01L24/83 ,  H01L2224/1131 ,  H01L2224/24226 ,  H01L2224/244 ,  H01L2224/24992 ,  H01L2224/27013 ,  H01L2224/73217 ,  H01L2224/82039 ,  H01L2224/82102 ,  H01L2224/83051 ,  H01L2224/838 ,  H01L2224/92144 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/0781 ,  H01L2924/12041 ,  H01L2924/1306 ,  H05K3/0032 ,  H05K3/107 ,  H05K3/125 ,  H05K3/1258 ,  H05K3/321 ,  H05K2201/09472 ,  H05K2201/10674 ,  H05K2203/013 ,  H05K2203/0568 ,  H05K2203/1469 ,  Y10S438/94 ,  H01L2924/00 ,  H01L2224/0401

摘要： A method of providing connectivity to a microsized device, the method includes the steps of providing an ablative base material having at least a top surface; providing a die having a first and second surface and having bonding pads at least upon the first surface; placing the die with the at least first surface of the die contacting the at least first surface of the ablative base material; and ablating a channel in the ablative material proximate to the die.