公开(公告)号：EP2381473B1

公开(公告)日：2018-10-03

申请号：EP11156124.7

申请日：2011-02-28

申请人： Robert Bosch GmbH ,  SEG Automotive Germany GmbH

发明人： Spitz, Richard ,  Jaros, Rolf ,  Goerlach, Alfred ,  Suelzle, Helmut

IPC分类号： H01L23/051 ,  H01L29/861 ,  H01L29/06 ,  H01L29/16 ,  H01L29/20

CPC分类号： H01L23/051 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L29/0615 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/861 ,  H01L2224/26145 ,  H01L2224/27013 ,  H01L2224/29101 ,  H01L2224/29116 ,  H01L2224/2919 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/83051 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01061 ,  H01L2924/01068 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/1033 ,  H01L2924/12032 ,  H01L2924/12036 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012

公开(公告)号：EP2571052A4

公开(公告)日：2017-04-19

申请号：EP10851389

申请日：2010-05-12

申请人： RENESAS ELECTRONICS CORP

发明人： FUJISAWA ATSUSHI

IPC分类号： H01L23/495 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31

CPC分类号： H01L23/49568 ,  H01L23/3107 ,  H01L23/49503 ,  H01L23/49513 ,  H01L23/49541 ,  H01L23/49575 ,  H01L23/49582 ,  H01L23/562 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L2223/54486 ,  H01L2224/05554 ,  H01L2224/27013 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32057 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/83051 ,  H01L2224/83385 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/00012 ,  H01L2924/01014 ,  H01L2924/01083 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/0665 ,  H01L2224/45015 ,  H01L2924/207

公开(公告)号：EP2546869A4

公开(公告)日：2017-01-25

申请号：EP11844936

申请日：2011-09-08

申请人： FUJI ELECTRIC CO LTD

发明人： ONISHI KAZUNAGA ,  TAKAMIYA YOSHIKAZU ,  FUNAKOSHI TAKAAKI ,  KODAIRA YOSHIHIRO

IPC分类号： H01L21/52 ,  H01L21/60 ,  H01L23/12 ,  H01L25/04 ,  H01L25/18 ,  H05K3/34

CPC分类号： H01L24/32 ,  H01L23/3735 ,  H01L23/49811 ,  H01L23/49838 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L25/072 ,  H01L2224/26175 ,  H01L2224/291 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/48647 ,  H01L2224/48747 ,  H01L2224/48847 ,  H01L2224/49111 ,  H01L2224/49113 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/83051 ,  H01L2224/83447 ,  H01L2224/85447 ,  H01L2224/92247 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/1203 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/15787 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2924/3512 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： Reliability is improved while curbing manufacturing cost. A semiconductor device (100) includes a substrate (110), an insulating substrate (141 and 142) mounted on the substrate (110), a metal pattern (152 and 155) formed on the insulating substrate (141 and 142), an electronic part mounted on the metal pattern (152 and 155) across a bond, and a wire member (201 to 206), separate from a wiring wire, which contains a material repellent to the bond and is formed on the metal pattern (152 and 155) and around the electronic part.

公开(公告)号：EP2652782A2

公开(公告)日：2013-10-23

申请号：EP11805336.2

申请日：2011-12-14

申请人： Tessera, Inc.

发明人： OGANESIAN, Vage ,  HABA, Belgacem ,  MOHAMMED, Ilyas ,  SAVALIA, Piyush ,  MITCHELL, Craig

IPC分类号： H01L21/98

CPC分类号： H01L23/562 ,  B81C1/00269 ,  B81C1/00357 ,  H01L21/2007 ,  H01L21/561 ,  H01L21/563 ,  H01L21/568 ,  H01L23/13 ,  H01L24/05 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/50 ,  H01L29/0657 ,  H01L2224/29186 ,  H01L2224/2919 ,  H01L2224/32057 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/83051 ,  H01L2224/83191 ,  H01L2224/83345 ,  H01L2224/83385 ,  H01L2224/83855 ,  H01L2224/83856 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06555 ,  H01L2225/06575 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/10158 ,  H01L2924/10253 ,  H01L2924/1027 ,  H01L2924/1032 ,  H01L2924/1037 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/3511 ,  H01L2224/83 ,  H01L2924/00

摘要： A method of bonding first and second microelectronic elements includes pressing together a first substrate 100 containing active circuit elements 108 therein with a second substrate 112, with a flowable dielectric material 102 between confronting surfaces of the respective substrates, each of the first and second substrates 100,112 having a coefficient of thermal expansion less than 10 parts per million/ °C, at least one of the confronting surfaces having a plurality of channels 118A-118F extending from an edge of such surface, such that the dielectric material 102 between planes defined by the confronting surfaces is at least substantially free of voids and has a thickness over one micron, and at least some of the dielectric material 102 flows into at least some of the channels.

公开(公告)号：EP2571052A1

公开(公告)日：2013-03-20

申请号：EP10851389.6

申请日：2010-05-12

申请人： Renesas Electronics Corporation

发明人： FUJISAWA, Atsushi

IPC分类号： H01L23/50

CPC分类号： H01L23/49568 ,  H01L23/3107 ,  H01L23/49503 ,  H01L23/49513 ,  H01L23/49541 ,  H01L23/49575 ,  H01L23/49582 ,  H01L23/562 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L2223/54486 ,  H01L2224/05554 ,  H01L2224/27013 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32057 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/83051 ,  H01L2224/83385 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/00012 ,  H01L2924/01014 ,  H01L2924/01083 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/0665 ,  H01L2224/45015 ,  H01L2924/207

摘要： A trench portion (trench) is formed at each of four corner portions of a chip bonding region having a quadrangular planar shape smaller than an outer-shape size of a die pad included in a semiconductor device. Each trench is formed along a direction of intersecting with a diagonal line which connects between the corner portions where the trench portions are arranged, and both ends of each trench portion are extended to an outside of the chip bonding region. The semiconductor chip is mounted on the chip bonding region so as to interpose a die-bond material. In this manner, peel-off of the die-bond material in a reflow step upon mounting of the semiconductor device on a mounting substrate can be suppressed. Also, even if the peel-off occurs, expansion of the peel-off can be suppressed.

摘要翻译： 沟槽部分（沟槽）形成在具有比包括在半导体器件中的管芯焊盘的外形尺寸小的四边形平面形状的芯片键合区域的四个角部中的每一个处。 每个沟槽沿与连接排列沟槽部分的角部之间的对角线交叉的方向形成，并且每个沟槽部分的两端延伸到芯片结合区域的外部。 半导体芯片被安装在芯片结合区域上以插入管芯结合材料。 以此方式，可以抑制在将半导体器件安装在安装基板上时在回流步骤中剥离芯片​​接合材料。 而且，即使发生剥离，也可以抑制剥离的扩大。

公开(公告)号：EP2249381A4

公开(公告)日：2012-11-21

申请号：EP09712660

申请日：2009-02-16

申请人： LIQUID DESIGN SYSTEMS INC

发明人： MABUCHI YOSHIHIRO

IPC分类号： H01L23/50 ,  H01L21/60 ,  H01L23/485 ,  H01L25/18

CPC分类号： H01L23/50 ,  H01L24/14 ,  H01L24/32 ,  H01L24/45 ,  H01L25/18 ,  H01L2224/13099 ,  H01L2224/1412 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/26175 ,  H01L2224/27013 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/73204 ,  H01L2224/83051 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01077 ,  H01L2924/01079 ,  H01L2924/01088 ,  H01L2924/01094 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2224/48 ,  H01L2224/0401

摘要： To provide a sem conductor chip whose number of electrodes are minimized while the horizontal position between the semiconductor chip and the mounted substrate is maintained in implementation to avoid any connection problem, as well as to prevent the damage to the semiconductor circuit of such chip. For example, there is a cross-shaped connection bump disposition area 23 which is formed by memory banks 22A-22D which face with each other with a certain distance. And in the area 23A in the cross-shaped connection bump disposition area 23, signal input output connection bumps 21A (the first electrodes) are disposed and form a group. On the other hand, by disposing a group of power/grounding connection bumps 21 B in the area 23B which crosses in the right angle with the area 23A where a group of the signal input output connection bumps 21A is disposed, forming a group, the memory chip 20 is supported by the power/grounding bumps 21B (via soldering) so that it will not tilt when implemented on the wiring chip 10, thus, its horizontal position is maintained by the minimum number of bumps. For example, the memory chip 20 is composed as such.

公开(公告)号：EP2058753B1

公开(公告)日：2011-09-14

申请号：EP08168517.4

申请日：2008-11-06

申请人： Fujitsu Limited

发明人： Kobayashi, Hiroshi ,  Kobae, Kenji

IPC分类号： G06K19/077

CPC分类号： G06K19/07749 ,  G06K19/07728 ,  G06K19/0775 ,  H01L21/56 ,  H01L21/568 ,  H01L24/29 ,  H01L24/32 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/27013 ,  H01L2224/29012 ,  H01L2224/29034 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/75 ,  H01L2224/75252 ,  H01L2224/81005 ,  H01L2224/81191 ,  H01L2224/83051 ,  H01L2224/83192 ,  H01L2224/83194 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01082 ,  Y10T29/49149 ,  H01L2924/00012 ,  H01L2924/00

摘要： An RFID tag (100) manufacturing method is including application process in which a heat-curable adhesive (104) is applied to an area where a circuit chip (103) is placed on a base to which antennae (102) are wired so as to be connected with the circuit chip, placement process in which the circuit chip is placed where the adhesive is applied, and thereby the circuit chip is connected with the antennae, covering process in which the circuit chip placed on the base is covered with a sheet member (105) having an adhesive layer on its surface, such that the adhesive layer faces the base, and heat and pressure applying process in which pressure is applied to the sheet member toward the base, and heat and pressure are applied to the circuit chip from above the sheet member, thereby curing the adhesive and fixing the circuit chip and the sheet member on the base.

公开(公告)号：EP0860871B1

公开(公告)日：2011-05-25

申请号：EP97118056.7

申请日：1997-10-17

申请人： Oki Electric Industry Co., Ltd.

发明人： Egawa, Yoshimi

IPC分类号： H01L21/56

CPC分类号： H01L24/32 ,  H01L21/563 ,  H01L23/49822 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/27013 ,  H01L2224/27334 ,  H01L2224/29007 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83051 ,  H01L2224/83136 ,  H01L2224/83192 ,  H01L2224/83856 ,  H01L2224/83951 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2924/00012

公开(公告)号：EP1854134A2

公开(公告)日：2007-11-14

申请号：EP06710931.4

申请日：2006-02-17

申请人： Assa Abloy Identification Technology Group AB

发明人： MICHALK, Manfred ,  NIELAND, Sabine ,  MICHALK, Martin

IPC分类号： H01L21/60

CPC分类号： H01L21/563 ,  H01L23/13 ,  H01L23/142 ,  H01L24/32 ,  H01L24/81 ,  H01L24/97 ,  H01L2224/13144 ,  H01L2224/16245 ,  H01L2224/27013 ,  H01L2224/40 ,  H01L2224/73203 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/83051 ,  H01L2224/83385 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/0102 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01061 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/01026 ,  H01L2924/01028 ,  H01L2924/01027 ,  H01L2924/3512 ,  H01L2924/00

摘要： The method comprises the following steps: the substrate in the form of a one-piece basic substrate (4) is prepattemed into regions corresponding to future modules, pads of the semiconductor chip (1) are then contact-connected in predetermined regions of a first area of the basic substrate (4) and on the top side (12) of the prepattemed basic substrate (4) and on one area side of the semiconductor chip (1) a first adhesive layer (16) is applied, a second adhesive layer (17) is subsequently applied to the other area side of the semiconductor chip (1), and a curing of the adhesive layers (16, 17) and a final patterning of the metallic basic substrate (4) are then effected.

公开(公告)号：EP0993039B1

公开(公告)日：2006-08-30

申请号：EP98929711.4

申请日：1998-06-26

申请人： Hitachi Chemical Company, Ltd.

发明人： URASAKI, Naoyuki ,  SHIMADA, Yasushi ,  TSURU, Yoshiyuki ,  NAKASO, Akishi ,  WATANABE, Itsuo

IPC分类号： H01L23/12 ,  H01L21/60 ,  H01L23/538 ,  H01L23/498

CPC分类号： H01L24/32 ,  H01L21/563 ,  H01L23/49838 ,  H01L23/49894 ,  H01L23/5386 ,  H01L2224/16225 ,  H01L2224/27013 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83051 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/07811 ,  H01L2924/12042 ,  H01L2924/15192 ,  H05K1/114 ,  H05K1/189 ,  H05K3/28 ,  H05K3/323 ,  H05K2201/09509 ,  H05K2201/10674 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/0401

摘要： A substrate (8) for mounting semiconductor chips on which a semiconductor chip (3) having bumps (4) is mounted with an adhesive. The substrate is improved in reliability for secured connection and availability for mass production by coating the semiconductor chip mounting area of the substrate (8) with an insulating film (6) having an opening so as to prevent the exposure of wiring conductors (2) on the surface of the substrate (8) near the boundary of the semiconductor chip mounting area.