公开(公告)号：EP3017470B1

公开(公告)日：2018-10-24

申请号：EP14735474.0

申请日：2014-07-02

申请人： Rosenberger Hochfrequenztechnik GmbH & Co. KG

发明人： CAHILL, Sean S. ,  SANJUAN, Eric A.

IPC分类号： H01L21/60 ,  H01L23/49 ,  H01L23/66 ,  H01L23/50

CPC分类号： H01L23/49541 ,  H01L21/4821 ,  H01L21/4846 ,  H01L23/49506 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/64 ,  H01L23/645 ,  H01L23/66 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L2223/6611 ,  H01L2224/45541 ,  H01L2224/4555 ,  H01L2224/4556 ,  H01L2224/45565 ,  H01L2224/4569 ,  H01L2224/48011 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/4903 ,  H01L2224/49052 ,  H01L2224/85444 ,  H01L2224/8592 ,  H01L2224/8593 ,  H01L2224/85931 ,  H01L2224/85935 ,  H01L2224/85939 ,  H01L2224/85947 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30111 ,  H01L2924/20654 ,  H01L2224/45099 ,  H01L2924/00

摘要： A die package having a plurality of connection pads, a die substrate supporting a plurality of connection elements, a first lead having a first metal core with a first core diameter, and a dielectric layer surrounding the first metal core, the dielectric layer having a first dielectric thickness that varies along its length and/or the dielectric layer having an outer metal layer at least partially surrounding the dielectric layer, for selectively modifying the electrical characteristics of the lead.

公开(公告)号：EP2461335B1

公开(公告)日：2015-09-23

申请号：EP10194851.1

申请日：2010-12-14

申请人： NXP B.V.

发明人： Calvillo Cortes, David ,  De Vreede, Leo C.N. ,  Van der Heijden, Mark Pieter

IPC分类号： H03F1/02 ,  H03F3/217 ,  H01F19/04 ,  H01F27/28

CPC分类号： H01F27/2823 ,  H01F19/04 ,  H01F27/2828 ,  H01L2224/49052 ,  H01L2224/49175 ,  H01L2924/30107 ,  H01L2924/3011 ,  H03F1/0294 ,  H03F3/2176 ,  H03F2200/537 ,  H03F2200/541 ,  H01L2924/00

公开(公告)号：EP2876679A3

公开(公告)日：2015-08-12

申请号：EP14187829.8

申请日：2014-10-06

申请人： Renesas Electronics Corporation

发明人： Ishii, Yasushi ,  Adachi, Tetsuo

IPC分类号： H01L23/485 ,  H01L21/66 ,  H01L23/58 ,  H01L23/31

CPC分类号： H01L22/32 ,  H01L23/3107 ,  H01L23/562 ,  H01L23/585 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/09 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/02166 ,  H01L2224/0345 ,  H01L2224/0361 ,  H01L2224/03622 ,  H01L2224/03831 ,  H01L2224/0392 ,  H01L2224/04042 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05557 ,  H01L2224/05624 ,  H01L2224/0603 ,  H01L2224/06179 ,  H01L2224/09051 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48463 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/48824 ,  H01L2224/49052 ,  H01L2224/49113 ,  H01L2224/49431 ,  H01L2224/73265 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/10162 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/3512 ,  H01L2924/381 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/20753

摘要： This invention provides a semiconductor device with improved reliability. The semiconductor device (CHP1) comprising:a semiconductor substrate (SS) having an element formation surface;a first insulating film (PVL) that has a first surface (PVb) facing the semiconductor substrate (SS), a second surface (PVt) opposite to the first surface (PVb), and a plurality of openings (PVk) passing therethrough from one of the first surface (PVb) and the second surface (PVt) to the other in the thickness direction, and is formed so as to cover the element formation surface of the semiconductor substrate (SS); anda plurality of electrode pads (PD1, PD2, PD3) that are formed between the first insulating film (PVL) and the semiconductor substrate (SS), and are exposed from the first insulating film (PVL) at positions overlapping the openings (PVk) in the first insulating film (PVL),wherein, the electrode pads include:a plurality of the first-line electrode pads (PD1) formed in a first line along a first chip side (Cs1) of a perimeter of the second surface in plan view;a plurality of second-line electrode pads (PD2) formed in a second line along the first chip side (Cs1), the second line located further than the first line from the first chip side (Cs1) in plan view; anda plurality of third-line electrode pads (PD3) formed in a third line along the first chip side (Cs1), the third line located further than the second line from the first chip side (Cs1) in plan view, and wherein, the areas of the respective first-line electrode pads (PD1) are smaller than the areas of the respective second-line electrode pads (PD2) and the respective third-line electrode pads (PD3).

摘要翻译： 本发明提供具有改进的可靠性的半导体器件。 该半导体装置（CHP1）包括：具有元件形成表面的半导体衬底（SS）;具有面对半导体衬底（SS）的第一表面（PVb），与半导体衬底（SS）相对的第二表面（PVt）的第一绝缘膜 到第一表面（PVb）的多个开口（PVk）以及从第一表面（PVb）和第二表面（PVt）中的一个在厚度方向上穿过其中的多个开口（PVk），并且形成为覆盖 半导体衬底（SS）的元件形成表面; 以及形成在第一绝缘膜（PVL）和半导体衬底（SS）之间并且在与开口（PVk）重叠的位置处从第一绝缘膜（PVL）暴露的多个电极焊盘（PD1，PD2，PD3） 在第一绝缘膜（PVL）中，其中，电极焊盘包括：在平面中沿着第二表面的周边的第一芯片侧（Cs1）形成在第一行中的多个第一线电极焊盘（PD1） ;在平面图中沿着所述第一芯片侧（Cs1）形成在第二行中的多个第二线电极焊盘（PD2），所述第二线位于比所述第一芯片侧（Cs1）更靠近所述第一线的位置; 以及在平面图中沿着第一芯片侧（Cs1）形成在第三线中的多个第三线电极焊盘（PD3），第三线位于比第一芯片侧（Cs1）更靠近第二线的位置，并且其中， 各个第一线电极焊盘（PD1）的面积小于各个第二线电极焊盘（PD2）和各个第三线电极焊盘（PD3）的面积。

公开(公告)号：EP2406823A2

公开(公告)日：2012-01-18

申请号：EP10714122.8

申请日：2010-03-12

申请人： Tessera, Inc.

发明人： HABA, Belgacem ,  MARCUCCI, Brian

IPC分类号： H01L23/49

CPC分类号： H01L23/552 ,  H01L23/3121 ,  H01L23/3192 ,  H01L23/66 ,  H01L24/05 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0657 ,  H01L2223/6611 ,  H01L2223/6622 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/06136 ,  H01L2224/32145 ,  H01L2224/45015 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4556 ,  H01L2224/45565 ,  H01L2224/45599 ,  H01L2224/4809 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48464 ,  H01L2224/48471 ,  H01L2224/48505 ,  H01L2224/48599 ,  H01L2224/48799 ,  H01L2224/49052 ,  H01L2224/49095 ,  H01L2224/49175 ,  H01L2224/49176 ,  H01L2224/85045 ,  H01L2224/8592 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/20752 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2224/4569 ,  H01L2224/05644 ,  H01L2224/45184 ,  H01L2224/05647 ,  H01L2924/00 ,  H01L2924/013 ,  H01L2924/00013 ,  H01L2924/00012 ,  H01L2924/00011 ,  H01L2224/85399 ,  H01L2224/05599

摘要： A microelectronic assembly can include a microelectronic device having device contacts exposed at a surface thereof and an interconnection element having element contacts and having a face adjacent to the microelectronic device. Conductive elements, e.g., wirebonds connect the device contacts with the element contacts and have portions extending in runs above the surface of the microelectronic device. A conductive layer has a conductive surface disposed at at least a substantially uniform distance above or below the plurality of the runs of the conductive elements. In some cases, the conductive material can have first and second dimensions in first and second horizontal directions which are smaller than first and second corresponding dimensions of the microelectronic device. The conductive material is connectable to a source of reference potential so as to achieve a desired impedance for the conductive elements.

摘要翻译： 微电子组件可以包括具有在其表面处暴露的器件触点的微电子器件和具有元件触点并具有与微电子器件相邻的面的互连元件。 导电元件，例如引线将器件触点与元件触点连接，并且具有在微电子器件的表面上方延伸的部分。 导电层具有导电表面，该导电表面设置在导电元件的多个行程之上或之下至少基本均匀的距离处。 在一些情况下，导电材料可以在第一和第二水平方向上具有小于微电子器件的第一和第二对应尺寸的第一和第二尺寸。 导电材料可连接到参考电位源，以便实现导电元件所需的阻抗。

公开(公告)号：EP3066683A4

公开(公告)日：2017-11-15

申请号：EP13896994

申请日：2013-11-07

申请人： NXP USA INC

发明人： VOLOKHINE YOURI

IPC分类号： H01L23/66 ,  H01L23/49

CPC分类号： H03K17/689 ,  H01L23/66 ,  H01L24/05 ,  H01L24/09 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2223/6611 ,  H01L2223/6655 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/09505 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48472 ,  H01L2224/49052 ,  H01L2224/49096 ,  H01L2224/49175 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/13091 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/30111 ,  H03F3/193 ,  H03F3/213 ,  H03F2200/451 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099 ,  H01L2924/00012

摘要： The invention provides a bond wire arrangement comprising a signal bond wire (1) for operably connecting a first electronic device (6) to a second electronic device (8), and a control bond wire (2) being arranged alongside the signal bond wire at a distance so as to have a magnetic coupling with the signal bond wire (1), and having a first end (11) coupled to ground, and a second end (12) coupled to ground via a resistive element (14). The proposed solution allows the control of the Q factor (losses) of wire bond inductors during assembly phase, which will save time and reduce overall design cycle as compared to known methods.

公开(公告)号：EP3188221A1

公开(公告)日：2017-07-05

申请号：EP14902339.2

申请日：2014-09-23

申请人： Huawei Technologies Co., Ltd.

发明人： HUANG, An ,  LIN, Yanhai ,  LIU, Wei

IPC分类号： H01L21/60 ,  H01L23/488

CPC分类号： H01L24/49 ,  H01L23/488 ,  H01L23/66 ,  H01L24/45 ,  H01L24/48 ,  H01L25/0655 ,  H01L2223/6611 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48011 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48195 ,  H01L2224/49052 ,  H01L2224/4909 ,  H01L2224/4912 ,  H01L2224/49175 ,  H01L2225/06506 ,  H01L2924/00014 ,  H01L2224/05599 ,  H01L2924/20657 ,  H01L2224/45099

摘要： The present invention provides a radio frequency power component, including a first section, a second section, and a first bonding wire group, where the first bonding wire group includes at least three first bonding wire units, the first bonding wire unit includes at least one arc-shaped bonding wire, one end and the other end of the first bonding wire unit are electrically connected to electrodes of the first section and the second section, respectively, where arc heights of first bonding wire units located at two sides of the first bonding wire group are higher than an arc height of a first bonding wire unit at another position, and an arc height of a first bonding wire unit located in a central area of the first bonding wire group is lower than an arc height of a first bonding wire unit at another position, so that currents passing through the at least three first bonding wire units are the same, or a phase difference between currents passing through any two first bonding wire units is less than a preset threshold. The present invention significantly reduces an energy loss of the radio frequency power component, avoids damage to a section, and reduces a usage cost.

摘要翻译： 本发明提供一种射频功率器件，包括第一部分，第二部分和第一焊线组，所述第一焊线组包括至少三个第一焊线单元，所述第一焊线单元包括至少一个 所述第一焊线单元的一端和另一端分别与所述第一部分和所述第二部分的电极电连接，所述第一焊线单元位于所述第一焊线两侧的电弧高度 所述第一焊线组的第一焊线单元的弧高高于第一焊线单元在另一位置的弧高，且位于所述第一焊线组的中心区域的第一焊线单元的弧高小于第一焊线的弧高 单元设置在另一位置处，使得流过所述至少三个第一焊线单元的电流相同，或者流过任意两个第一焊线单元的电流之间的相位差 小于预设的阈值。 本发明显着降低了射频功率器件的能量损失，避免了对部分的损坏，降低了使用成本。

公开(公告)号：EP2741325A1

公开(公告)日：2014-06-11

申请号：EP13192667.7

申请日：2013-11-13

申请人： NXP B.V.

发明人： Steeneken, Peter ,  Shrestha, Rameswor ,  Bredius, Martijn

IPC分类号： H01L23/49 ,  H01L23/66 ,  H04L25/02

CPC分类号： H01L24/49 ,  H01L23/66 ,  H01L24/48 ,  H01L2223/6611 ,  H01L2223/6638 ,  H01L2224/05554 ,  H01L2224/48011 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/49052 ,  H01L2224/4909 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/3011 ,  H04L25/0266 ,  H04L25/0272 ,  H04L25/0274 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00

摘要： In one embodiment, a device includes a first IC having a differential signal driver and a first isolation circuit configured to provide differential signals transmitted by the differential signal driver to a first pair of bond pads of the first IC. First and second bond wires are configured to provide differential signals from the first pair of bond pads to a second pair of bond pad included in a second IC. The second IC includes a second isolation circuit configured to provide differential signals from the second pair of bond pads to a differential receiver circuit of the second IC. The bond wires are specifically arranged such that a distance between the first and second bond wires varies by at least 10% as measured at two points along a length of the first bond wire.

摘要翻译： 在一个实施例中，器件包括具有差分信号驱动器的第一IC和被配置为将差分信号驱动器发送的差分信号提供给第一IC的第一对接合焊盘的第一隔离电路。 第一和第二接合线被配置为提供从第一对接合焊盘到包括在第二IC中的第二对接合焊盘的差分信号。 第二IC包括第二隔离电路，其被配置为将来自第二对接合焊盘的差分信号提供给第二IC的差分接收器电路。 接合线被特别布置成使得在沿着第一接合线的长度的两个点处测量的第一和第二接合线之间的距离变化至少10％。

公开(公告)号：EP2362417A3

公开(公告)日：2012-05-23

申请号：EP11004204.1

申请日：2009-09-02

申请人： Linear Technology Corporation

发明人： Pruitt, David, A.

IPC分类号： H01L23/64 ,  H01L23/495 ,  H01F19/08

CPC分类号： H01F19/08 ,  H01F38/14 ,  H01F2019/085 ,  H01F2027/2814 ,  H01L23/48 ,  H01L23/4952 ,  H01L23/642 ,  H01L23/645 ,  H01L24/05 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0655 ,  H01L25/072 ,  H01L2223/6611 ,  H01L2224/04042 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48095 ,  H01L2224/48137 ,  H01L2224/48195 ,  H01L2224/4823 ,  H01L2224/48247 ,  H01L2224/48464 ,  H01L2224/48491 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/49052 ,  H01L2224/4912 ,  H01L2224/49175 ,  H01L2224/49176 ,  H01L2224/4943 ,  H01L2224/85455 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/19107 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2224/48824

摘要： A semiconductor device (200) configured to provide current and voltage isolation inside an integrated circuit package, the semiconductor device comprising:
a lead frame (210) including a first set of leads (220,222,224,226) and a second set of leads (230,232,234,236), the first set of leads being isolated from the second set of leads;
a semiconductor die (240) positioned on the lead frame (210);
an isolating block (250) positioned on the semiconductor die;
a first interconnect coil (202) formed by a first set of wires (260,262,264,266), the semiconductor die, and the first set of leads; and
a second interconnect coil (204) isolated from the first interconnect coil and formed by a second set of wires (280,282,284,286), the isolating block, and the second set of leads.

公开(公告)号：EP2362417A2

公开(公告)日：2011-08-31

申请号：EP11004204.1

申请日：2009-09-02

申请人： Linear Technology Corporation

发明人： Pruitt, David, A.

IPC分类号： H01L25/07 ,  H01L23/64 ,  H01L23/495

CPC分类号： H01F19/08 ,  H01F38/14 ,  H01F2019/085 ,  H01F2027/2814 ,  H01L23/48 ,  H01L23/4952 ,  H01L23/642 ,  H01L23/645 ,  H01L24/05 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0655 ,  H01L25/072 ,  H01L2223/6611 ,  H01L2224/04042 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48095 ,  H01L2224/48137 ,  H01L2224/48195 ,  H01L2224/4823 ,  H01L2224/48247 ,  H01L2224/48464 ,  H01L2224/48491 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/49052 ,  H01L2224/4912 ,  H01L2224/49175 ,  H01L2224/49176 ,  H01L2224/4943 ,  H01L2224/85455 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/19107 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2224/48824

摘要： A semiconductor device configured to provide current and voltage isolation inside an integrated circuit package, the semiconductor device comprising:
a lead frame including a first set of leads and a second set of leads, the first set of leads being isolated from the second set of leads;
a semiconductor die positioned on the lead frame;
an isolating block positioned on the semiconductor die;
a first interconnect coil formed by a first set of wires, the semiconductor die, and the first set of leads; and
a second interconnect coil isolated from the first interconnect coil and formed by a second set of wires, the isolating block, and the second set of leads.

摘要翻译： 一种半导体器件（200），被配置为在集成电路封装内提供电流和电压隔离，所述半导体器件包括：引线框架（210），包括第一组引线（220,222,224,226）和第二组引线（230,232,234,236），所述引线框架 第一组引线与第二组引线隔离; 定位在引线框架（210）上的半导体管芯（240）; 位于所述半导体管芯上的隔离块（250）; 由第一组线（260,262,264,266）形成的第一互连线圈（202），所述半导体管芯和所述第一组引线; 以及与第一互连线圈隔离并由第二组电线（280,282,284,286），隔离块和第二组引线形成的第二互连线圈（204）。

公开(公告)号：EP0126664B1

公开(公告)日：1989-08-02

申请号：EP84400788.0

申请日：1984-04-19

申请人： FUJITSU LIMITED

发明人： Mizukoshi, Masataka ,  Endo, Teiichi

IPC分类号： H01L23/48 ,  H01L21/60

CPC分类号： H01L24/85 ,  H01L23/498 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/78 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/06153 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/4809 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48471 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/49052 ,  H01L2224/49109 ,  H01L2224/49171 ,  H01L2224/49431 ,  H01L2224/4945 ,  H01L2224/78313 ,  H01L2224/85181 ,  H01L2224/85186 ,  H01L2224/85191 ,  H01L2224/85986 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/00 ,  H01L2924/2075 ,  H01L2224/05599 ,  H01L2224/85399