公开(公告)号：US10079203B2

公开(公告)日：2018-09-18

申请号：US15271605

申请日：2016-09-21

申请人： Yong-Hoon Son ,  Cha-Dong Yeo ,  Han-Mei Choi ,  Kyung-Hyun Kim ,  Phil-Ouk Nam ,  Kwang-Chul Park ,  Yeon-Sil Sohn ,  Jin-I Lee ,  Won-Bong Jung

发明人： Yong-Hoon Son ,  Cha-Dong Yeo ,  Han-Mei Choi ,  Kyung-Hyun Kim ,  Phil-Ouk Nam ,  Kwang-Chul Park ,  Yeon-Sil Sohn ,  Jin-I Lee ,  Won-Bong Jung

IPC分类号： H01L23/522 ,  H01L27/11582 ,  H01L21/768 ,  H01L27/11565 ,  H01L27/11575 ,  H01L27/1157

CPC分类号： H01L23/5226 ,  H01L21/76816 ,  H01L21/76877 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11575 ,  H01L27/11582

摘要： A vertical memory device includes a substrate, a plurality of channels on the substrate and extending in a vertical direction with respect to a top surface of the substrate, a plurality of non-metal gate patterns surrounding the channels and being stacked on top of each other and spaced apart from each other along the vertical direction, and a plurality of metal gate patterns stacked on top of each other. The metal gate patterns are spaced apart from each other along the vertical direction. Each of the metal gate patterns surrounds a corresponding one of the non-metal gate patterns.

公开(公告)号：US20170033119A1

公开(公告)日：2017-02-02

申请号：US15165123

申请日：2016-05-26

申请人： Kwang Chul Park ,  Jang Gn YUN ,  Won Bong JUNG

发明人： Kwang Chul Park ,  Jang Gn YUN ,  Won Bong JUNG

IPC分类号： H01L27/115

CPC分类号： H01L27/11582 ,  H01L27/11565 ,  H01L27/1157

摘要： Semiconductor device are provided including a stacked structure having gate electrodes and interlayer insulating layers alternately stacked on a substrate; channel holes extending perpendicular to the substrate through the stacked structure and including channel regions therein; and horizontal parts at lower portions of the stacked structure and including areas in which the channel regions are horizontally elongated from the channel holes. The horizontal parts surround respective channel holes and are connected to each other between at a least portion of the channel holes.

摘要翻译： 提供半导体器件，其包括层叠结构，其具有交替层叠在基板上的栅电极和层间绝缘层; 通孔穿过层叠结构垂直于衬底延伸并且在其中包括沟道区域; 以及层叠结构的下部的水平部分，并且包括沟道区域从通道孔水平伸长的区域。 水平部分围绕相应的通道孔，并且在通道孔的至少部分之间彼此连接。

公开(公告)号：US06529219B1

公开(公告)日：2003-03-04

申请号：US09419776

申请日：1999-10-18

申请人： Sung-Shik Baik ,  Han-Suk Kim ,  Kwang-Chul Park

发明人： Sung-Shik Baik ,  Han-Suk Kim ,  Kwang-Chul Park

IPC分类号： G06F3023

CPC分类号： G06F3/0219 ,  G06F1/1616 ,  G06F1/1671 ,  G06F3/0489

摘要： A computer user interface of this invention is a special interface for executing an application program, and includes a program selection button and a shell program for executing an application program corresponding to a press of the program shell button. A user can select and execute an application program registered in the shell program by means of the program selection button. In particular, the user can register an application program which can be selected by the program selection button in a program shell, thereby enabling a using environment to be fitted for the user. Since an audio player can be easily controlled by the program selection button, the user need not perform vexatious input steps for controlling the audio player using a keyboard device or a mouse.

摘要翻译： 本发明的计算机用户界面是用于执行应用程序的特殊接口，并且包括用于执行与程序外壳按钮的按下相对应的应用程序的程序选择按钮和外壳程序。 用户可以通过程序选择按钮选择并执行在shell程序中注册的应用程序。 特别地，用户可以在程序外壳中注册可由程序选择按钮选择的应用程序，从而使用户能够使用使用环境。 由于可以通过程序选择按钮容易地控制音频播放器，所以用户不需要执行无关紧要的输入步骤来使用键盘装置或鼠标来控制音频播放器。

公开(公告)号：US10008410B2

公开(公告)日：2018-06-26

申请号：US15464532

申请日：2017-03-21

申请人： Kwang Chul Park ,  Ji Woon Im ,  Dai Hong Kim ,  Il Woo Kim ,  Hyun Seok Lim

发明人： Kwang Chul Park ,  Ji Woon Im ,  Dai Hong Kim ,  Il Woo Kim ,  Hyun Seok Lim

IPC分类号： H01L21/768 ,  H01L21/02 ,  H01L21/311 ,  H01L21/28 ,  H01L27/1157 ,  H01L27/11582 ,  C23C16/48 ,  C23C16/50 ,  C23C16/54

CPC分类号： H01L21/76825 ,  C23C16/45523 ,  C23C16/482 ,  C23C16/50 ,  C23C16/54 ,  C23C16/56 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/022 ,  H01L21/02274 ,  H01L21/02348 ,  H01L21/31111 ,  H01L21/76802 ,  H01L21/76877 ,  H01L27/1157 ,  H01L27/11582 ,  H01L29/40117

摘要： A deposition apparatus includes a chamber, a plate in the chamber and configured support a substrate, a deposition unit configured to perform a deposition process in-situ in the chamber, and a UV annealing unit configured to perform a first ultraviolet (UV) and a second ultraviolet (UV) annealing process in-situ in the chamber. The deposition process may include sequentially depositing a first sacrificial layer, a first oxide layer, a second sacrificial layer and a second oxide layer on the substrate. The first UV annealing process may be performed on the first oxide layer after the first oxide layer is deposited. The second UV annealing process may be different from the first UV annealing process and may be performed on the second oxide layer after the second oxide layer is deposited.

公开(公告)号：US20160358927A1

公开(公告)日：2016-12-08

申请号：US15049160

申请日：2016-02-22

申请人： Phil Ouk NAM ,  Yong Hoon SON ,  Kyung Hyun KIM ,  Byeong Ju KIM ,  Kwang Chul PARK ,  Yeon Sil SOHN ,  Jin I LEE ,  Jong Heun LIM ,  Won Bong JUNG

发明人： Phil Ouk NAM ,  Yong Hoon SON ,  Kyung Hyun KIM ,  Byeong Ju KIM ,  Kwang Chul PARK ,  Yeon Sil SOHN ,  Jin I LEE ,  Jong Heun LIM ,  Won Bong JUNG

IPC分类号： H01L27/115 ,  H01L21/02

CPC分类号： H01L27/1157 ,  H01L21/02667 ,  H01L21/02675 ,  H01L27/11573 ,  H01L27/11582

摘要： A memory device, including a first memory region including a first substrate, a plurality of first semiconductor devices on the first substrate, and a first interlayer insulating layer covering the plurality of first semiconductor devices; and a second memory region including a second substrate on the first interlayer insulating layer and a plurality of second semiconductor devices on the second substrate, the second substrate including a first region in a plurality of grooves in the first interlayer insulating layer and a second region including grains extending from the first region, the second region being on an upper surface of the first interlayer insulating layer.

摘要翻译： 一种存储器件，包括第一存储区域，包括第一衬底，第一衬底上的多个第一半导体器件以及覆盖多个第一半导体器件的第一层间绝缘层; 以及第二存储区域，包括在所述第一层间绝缘层上的第二衬底和所述第二衬底上的多个第二半导体器件，所述第二衬底包括在所述第一层间绝缘层中的多个沟槽中的第一区域和包括 晶粒从第一区域延伸，第二区域位于第一层间绝缘层的上表面上。

公开(公告)号：US09997534B2

公开(公告)日：2018-06-12

申请号：US15155732

申请日：2016-05-16

申请人： Yong-Hoon Son ,  Kyung-Hyun Kim ,  Byeong-Ju Kim ,  Phil-Ouk Nam ,  Kwang Chul Park ,  Yeon-Sil Sohn ,  Jin-I Lee ,  Jong-Heun Lim ,  Won-Bong Jung ,  Kohji Kanamori

发明人： Yong-Hoon Son ,  Kyung-Hyun Kim ,  Byeong-Ju Kim ,  Phil-Ouk Nam ,  Kwang Chul Park ,  Yeon-Sil Sohn ,  Jin-I Lee ,  Jong-Heun Lim ,  Won-Bong Jung ,  Kohji Kanamori

IPC分类号： H01L29/792 ,  H01L27/11582 ,  H01L23/528

CPC分类号： H01L27/11582 ,  H01L23/528

摘要： A vertical memory device includes a substrate, a channel on the substrate, extending in a vertical direction with respect to a top surface of the substrate, and including a protrusion at a lower portion of the channel, the protrusion extending in a parallel direction with respect to the top surface of the substrate, a semiconductor pattern connecting the protrusion and the substrate, and gate lines stacked and spaced apart from each other in the vertical direction, the gate lines on the protrusion and the semiconductor pattern and surrounding the channel.

公开(公告)号：US20120140422A1

公开(公告)日：2012-06-07

申请号：US13137795

申请日：2011-09-13

申请人： Kwang-chul Park

发明人： Kwang-chul Park

IPC分类号： H05K5/00

CPC分类号： G06F1/1684 ,  G06F1/1675 ,  G06F1/187

摘要： An interface device for electronic equipment including at least one port electronically connected to an external device; a housing disposed in the electronic equipment and includes an opening through which the port is drawn in and out; a door which accommodates the port and performs a first motion and a second motion, the first motion being rotation between an open position, in which the opening of the housing is open, and a close position, in which the opening is closed, the second motion being sliding between the open position and a projecting position, in which the door projects from the open position in a transverse direction to a rotation axis of the first motion parallel with an installation surface of the electronic equipment; and a driving unit which provides driving force to the door in the close position of the first motion of the door and in the second motion.

摘要翻译： 一种用于电子设备的接口设备，包括电子连接到外部设备的至少一个端口; 设置在所述电子设备中的壳体，并且包括所述端口被拉入和拉出的开口; 容纳所述端口并执行第一运动和第二运动的门，所述第一运动在所述壳体的开口打开的打开位置与所述开口关闭的关闭位置之间旋转，所述第二运动 运动在所述打开位置和突出位置之间滑动，在所述突出位置中，所述门从横向方向从所述打开位置突出到与所述电子设备的安装表面平行的所述第一运动的旋转轴线; 以及驱动单元，其在门的第一运动的关闭位置和第二运动中向门提供驱动力。

公开(公告)号：US6078164A

公开(公告)日：2000-06-20

申请号：US70243

申请日：1998-05-01

申请人： Kwang-Chul Park

发明人： Kwang-Chul Park

IPC分类号： G01R31/36 ,  G06F1/16 ,  H01M2/10 ,  H01M2/20 ,  H01M6/50 ,  H01M10/48 ,  H01R13/703 ,  H01M10/46

CPC分类号： G06F1/1616 ,  G06F1/1635 ,  H01M10/48 ,  H01M2/1066 ,  H01M2/20 ,  H01M6/5044 ,  H01R13/7038 ,  H01R2201/06

摘要： A portable electronic appliance, such as a portable computer, includes a battery receiving room, disposed within the main body, and a switching device for allowing a user to check the battery capacity outside of the appliance without removing the battery from the appliance. The battery, detachably installed in the room, has both a battery checking switch and a capacity display on one surface thereof. The battery checking switch is selectively operated outside of the appliance, while the capacity display is selectively operated in conjunction with the battery checking switch so as to display the battery capacity thereon. A window is formed on the battery receiving room at a position corresponding to the capacity display, thus allowing a user to check the battery capacity outside of the appliance by viewing the capacity display through the window.

摘要翻译： 诸如便携式计算机的便携式电子设备包括设置在主体内的电池接收室，以及用于允许用户在不从设备移除电池的情况下检查电池外部的电池容量的开关装置。 可拆卸地安装在房间中的电池在其一个表面上同时具有电池检查开关和容量显示。 蓄电池检查开关选择性地在设备外部操作，同时电容显示与电池检查开关一起选择性地操作，以便在其上显示电池容量。 在与电容显示相对应的位置处，在电池接收室上形成窗口，从而允许用户通过观看通过窗口的容量显示来检查设备外部的电池容量。

公开(公告)号：US20180114722A1

公开(公告)日：2018-04-26

申请号：US15464532

申请日：2017-03-21

申请人： Kwang Chul PARK ,  Ji Woon Im ,  Dai Hong Kim ,  ll Woo Kim ,  Hyun Seok Lim

发明人： Kwang Chul PARK ,  Ji Woon Im ,  Dai Hong Kim ,  ll Woo Kim ,  Hyun Seok Lim

IPC分类号： H01L21/768 ,  H01L21/02 ,  H01L21/311 ,  H01L21/28 ,  H01L27/1157 ,  H01L27/11582 ,  C23C16/48 ,  C23C16/50 ,  C23C16/54

CPC分类号： H01L21/76825 ,  C23C16/45523 ,  C23C16/482 ,  C23C16/50 ,  C23C16/54 ,  C23C16/56 ,  H01L21/02164 ,  H01L21/02348 ,  H01L21/28282 ,  H01L21/31111 ,  H01L21/76802 ,  H01L21/76877 ,  H01L27/1157 ,  H01L27/11582

摘要： A deposition apparatus includes a chamber, a plate in the chamber and configured support a substrate, a deposition unit configured to perform a deposition process in-situ in the chamber, and a UV annealing unit configured to perform a first ultraviolet (UV) and a second ultraviolet (UV) annealing process in-situ in the chamber. The deposition process may include sequentially depositing a first sacrificial layer, a first oxide layer, a second sacrificial layer and a second oxide layer on the substrate. The first UV annealing process may be performed on the first oxide layer after the first oxide layer is deposited. The second UV annealing process may be different from the first UV annealing process and may be performed on the second oxide layer after the second oxide layer is deposited.

公开(公告)号：US20170069637A1

公开(公告)日：2017-03-09

申请号：US15251580

申请日：2016-08-30

申请人： YONG-HOON SON ,  JONG-WON KIM ,  CHANG-SEOK KANG ,  YOUNG-WOO PARK ,  JAE-DUK LEE ,  KYUNG-HYUN KIM ,  BYEONG-JU KIM ,  PHIL-OUK NAM ,  KWANG-CHUL PARK ,  YEON-SIL SOHN ,  JIN-I LEE ,  WON-BONG JUNG

发明人： YONG-HOON SON ,  JONG-WON KIM ,  CHANG-SEOK KANG ,  YOUNG-WOO PARK ,  JAE-DUK LEE ,  KYUNG-HYUN KIM ,  BYEONG-JU KIM ,  PHIL-OUK NAM ,  KWANG-CHUL PARK ,  YEON-SIL SOHN ,  JIN-I LEE ,  WON-BONG JUNG

IPC分类号： H01L27/115 ,  H01L29/66

CPC分类号： H01L27/1157 ,  H01L27/11565 ,  H01L27/11582 ,  H01L29/66833

摘要： A nonvolatile memory device includes a conductive line disposed on a substrate and vertically extended from the substrate, a first channel layer disposed on the substrate and vertically extended from the substrate, wherein the first channel layer is spaced apart from the conductive line, a second channel layer vertically extended from the substrate, wherein the second channel layer is disposed between the first channel layer and the conductive line, a first gate electrode disposed between the conductive line and the second channel layer, wherein the first gate electrode includes a first portion having a first thickness and a second portion having a second thickness that is different from the first thickness, and a second gate electrode disposed between the first channel layer and the second channel layer, wherein the second gate electrode has the second thickness.

摘要翻译： 非易失性存储器件包括设置在衬底上并从衬底垂直延伸的导线，设置在衬底上并从衬底垂直延伸的第一沟道层，其中第一沟道层与导电线间隔开，第二沟道 层，其中所述第二沟道层设置在所述第一沟道层和所述导电线之间;第一栅极，设置在所述导电线和所述第二沟道层之间，其中所述第一栅电极包括第一部分，所述第一部分具有 第一厚度和具有不同于第一厚度的第二厚度的第二部分，以及设置在第一沟道层和第二沟道层之间的第二栅电极，其中第二栅电极具有第二厚度。