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公开(公告)号:US09872401B2
公开(公告)日:2018-01-16
申请号:US14791641
申请日:2015-07-06
Applicant: IBIDEN CO., LTD.
Inventor: Mitsuhiro Tomikawa , Koji Asano
IPC: H05K1/18 , H05K1/16 , H05K3/46 , H05K1/02 , H01L23/00 , H01L23/373 , H05K1/11 , H01L21/56 , H01L25/10 , H01L23/498
CPC classification number: H05K3/4602 , H01L21/568 , H01L23/3735 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L24/19 , H01L24/25 , H01L24/32 , H01L24/48 , H01L24/73 , H01L25/105 , H01L2224/04105 , H01L2224/12105 , H01L2224/16227 , H01L2224/2518 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2225/1023 , H01L2225/1058 , H01L2225/1094 , H01L2924/00014 , H01L2924/15331 , H01L2924/181 , H01L2924/19105 , H05K1/0204 , H05K1/0298 , H05K1/115 , H05K1/185 , H05K3/30 , H05K3/429 , H05K3/445 , H05K3/4644 , H05K2201/0187 , H05K2201/09536 , H05K2201/09827 , H05K2201/09854 , H05K2201/10416 , H05K2201/10734 , H05K2203/0307 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2224/85399 , H01L2224/05599
Abstract: A circuit substrate includes a core substrate having cavity penetrating through the core substrate, a metal block accommodated in the cavity of the core substrate, a first build-up layer including an insulating layer and laminated on first side of the core substrate such that the first build-up layer is covering the cavity on the first side of the core substrate, and a second build-up layer including an insulating layer and laminated on second side of the core substrate such that the second build-up layer is covering the cavity on the second side of the core substrate, and a filling resin filling gap formed between the cavity and block positioned in the cavity of the core substrate. The block has roughened surfaces such that the roughened surfaces are in contact with the insulating layers in the first and second build-up layers on the first and second sides of the core substrate.
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公开(公告)号:US09831163B2
公开(公告)日:2017-11-28
申请号:US15052314
申请日:2016-02-24
Applicant: IBIDEN CO., LTD.
Inventor: Yukinobu Mikado , Mitsuhiro Tomikawa , Koji Asano , Kotaro Takagi
IPC: H05K1/00 , H05K1/02 , H01L23/498 , H01L23/367 , H01L25/10
CPC classification number: H01L23/49822 , H01L23/3677 , H01L23/49816 , H01L23/49827 , H01L24/19 , H01L24/20 , H01L25/105 , H01L2224/04105 , H01L2224/16225 , H01L2224/16227 , H01L2224/16235 , H01L2224/18 , H01L2224/2518 , H01L2224/48091 , H01L2224/48227 , H01L2924/15311 , H01L2924/181 , H01L2924/00012 , H01L2924/00014
Abstract: A circuit substrate includes a core substrate having a cavity, a metal block accommodated in the cavity of the core substrate, a first build-up layer including an insulating resin layer and laminated on a first surface of the core substrate such that the insulating resin layer is covering a first surface of the metal block in the cavity, and a second build-up layer including an insulating resin layer and laminated on a second surface of the core substrate such that the insulating resin layer is covering a second surface of the metal block in the cavity. The second build-up layer includes via conductors connected to the second surface of the metal block and common lands connecting the via conductors in parallel.
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公开(公告)号:US20160268189A1
公开(公告)日:2016-09-15
申请号:US15052314
申请日:2016-02-24
Applicant: IBIDEN CO., LTD.
Inventor: Yukinobu MIKADO , Mitsuhiro Tomikawa , Koji Asano , Kotaro Takagi
IPC: H01L23/498 , H01L23/367 , H01L21/48
CPC classification number: H01L23/49822 , H01L23/3677 , H01L23/49816 , H01L23/49827 , H01L24/19 , H01L24/20 , H01L25/105 , H01L2224/04105 , H01L2224/16225 , H01L2224/16227 , H01L2224/16235 , H01L2224/18 , H01L2224/2518 , H01L2224/48091 , H01L2224/48227 , H01L2924/15311 , H01L2924/181 , H01L2924/00012 , H01L2924/00014
Abstract: A circuit substrate includes a core substrate having a cavity, a metal block accommodated in the cavity of the core substrate, a first build-up layer including an insulating resin layer and laminated on a first surface of the core substrate such that the insulating resin layer is covering a first surface of the metal block in the cavity, and a second build-up layer including an insulating resin layer and laminated on a second surface of the core substrate such that the insulating resin layer is covering a second surface of the metal block in the cavity. The second build-up layer includes via conductors connected to the second surface of the metal block and common lands connecting the via conductors in parallel.
Abstract translation: 电路基板包括具有空腔的芯基板,容纳在芯基板的空腔中的金属块,第一堆积层,包括绝缘树脂层,层压在芯基板的第一表面上,使得绝缘树脂层 覆盖空腔中的金属块的第一表面,以及第二堆积层,其包括绝缘树脂层,层叠在芯基板的第二表面上,使得绝缘树脂层覆盖金属块的第二表面 在腔里。 第二堆积层包括连接到金属块的第二表面的通孔导体和并联连接通孔导体的公共区域。
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公开(公告)号:US20160242293A1
公开(公告)日:2016-08-18
申请号:US15044295
申请日:2016-02-16
Applicant: IBIDEN CO., LTD.
Inventor: Yukinobu MIKADO , Mitsuhiro Tomikawa , Koji Asano , Kotaro Takagi
CPC classification number: H05K3/4697 , H01L2224/04105 , H01L2224/2518 , H01L2224/48091 , H01L2224/48227 , H01L2924/15311 , H05K1/0204 , H05K1/0206 , H05K1/182 , H05K1/185 , H05K3/3436 , H05K3/4661 , H05K2201/10015 , H05K2201/10416 , H05K2201/10734 , H01L2924/00014
Abstract: A circuit substrate includes a core substrate having a cavity penetrating through the substrate, a metal block accommodated in the cavity of the substrate, a first build-up layer laminated on first side of the substrate and including insulating resin layers such that the first build-up layer is covering first surface of the block from the first side, and a second build-up layer laminated on second side of the substrate and including insulating resin layers such that the second build-up layer is covering second surface of the block from the second side. The first build-up layer includes an electronic component mounting structure formed on outermost portion of the first build-up layer, and the block is formed such that the first and second surfaces have roughened surfaces, respectively, and that the roughened surface of the first surface has surface roughness different from surface roughness of the roughened surface of the second surface.
Abstract translation: 电路基板包括具有穿透基板的空腔的芯基板,容纳在基板的空腔中的金属块,层叠在基板的第一侧上的第一累积层,并且包括绝缘树脂层, 从第一侧覆盖块的第一表面,以及层压在基板的第二侧上的第二堆积层,并且包括绝缘树脂层,使得第二堆积层从块的第二表面覆盖 第二面。 第一堆积层包括形成在第一堆积层的最外部分的电子部件安装结构,并且块被形成为使得第一和第二表面分别具有粗糙表面,并且第一堆积层的粗糙表面 表面具有与第二表面粗糙化表面的表面粗糙度不同的表面粗糙度。
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公开(公告)号:US10143092B2
公开(公告)日:2018-11-27
申请号:US15044295
申请日:2016-02-16
Applicant: IBIDEN CO., LTD.
Inventor: Yukinobu Mikado , Mitsuhiro Tomikawa , Koji Asano , Kotaro Takagi
Abstract: A circuit substrate includes a core substrate having a cavity penetrating through the substrate, a metal block accommodated in the cavity of the substrate, a first build-up layer laminated on first side of the substrate and including insulating resin layers such that the first build-up layer is covering first surface of the block from the first side, and a second build-up layer laminated on second side of the substrate and including insulating resin layers such that the second build-up layer is covering second surface of the block from the second side. The first build-up layer includes an electronic component mounting structure formed on outermost portion of the first build-up layer, and the block is formed such that the first and second surfaces have roughened surfaces, respectively, and that the roughened surface of the first surface has surface roughness different from surface roughness of the roughened surface of the second surface.
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公开(公告)号:US09955591B2
公开(公告)日:2018-04-24
申请号:US14802139
申请日:2015-07-17
Applicant: IBIDEN CO., LTD.
Inventor: Mitsuhiro Tomikawa , Koji Asano
CPC classification number: H05K3/4697 , H01L21/568 , H01L2224/04105 , H01L2224/16227 , H01L2224/32245 , H01L2224/48091 , H01L2224/48227 , H01L2224/73267 , H01L2224/92244 , H01L2225/1023 , H01L2225/1035 , H01L2225/1058 , H01L2225/1094 , H01L2924/15311 , H01L2924/15331 , H05K1/0206 , H05K1/162 , H05K1/185 , H05K3/3436 , H05K3/4644 , H05K2201/10 , H05K2201/10045 , H05K2201/10416 , H01L2924/00014
Abstract: A circuit substrate includes a core substrate having a cavity penetrating through the substrate, a combined component accommodated in the cavity of the substrate, a first build-up layer laminated on first surface of the substrate and including an insulating layer such that the insulating layer is covering the cavity, a second build-up layer laminated on second surface of the substrate and including an insulating layer such that the insulating layer is covering the cavity, and a filling resin filling gap formed between the cavity and combined component accommodated in the cavity of the substrate. The combined component includes an electronic component and a metal block, the electronic component has terminal surface on side facing the first surface of the substrate, and the metal block is superposed to surface of the electronic component on the opposite side of the electronic component with respect to the terminal surface.
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公开(公告)号:US09433097B2
公开(公告)日:2016-08-30
申请号:US14791735
申请日:2015-07-06
Applicant: IBIDEN CO., LTD.
Inventor: Mitsuhiro Tomikawa , Koji Asano
CPC classification number: H05K1/183 , H01L2224/48091 , H01L2224/48227 , H01L2924/181 , H05K1/0204 , H05K1/0206 , H05K1/115 , H05K3/0014 , H05K3/4046 , H05K3/4084 , H05K3/4602 , H05K3/4697 , H05K2201/10416 , H01L2924/00012 , H01L2924/00014
Abstract: A circuit substrate includes a core substrate having cavity, metal blocks in the cavity, first and second build-up layers including insulating layers and laminated on first and second sides of the core substrate such that the insulating layers are covering the cavity, and a filling resin filling gap formed between the cavity and metal blocks in the cavity. The cavity is penetrating through the core substrate, the core substrate has an intracavity projection structure projecting from one or more side surfaces of the cavity such that the projection structure is positioned between the metal blocks and separating the metal blocks from contacting each other in the cavity, the first build-up layer has first conductors connected to the metal blocks such that each first conductor conducts electricity or heat, and the second build-up layer has second conductors connected to the metal blocks such that each second conductor conducts electricity or heat.
Abstract translation: 电路基板包括具有空腔的芯基板,空腔中的金属块,第一和第二堆积层包括绝缘层,并且层叠在芯基板的第一和第二侧上,使得绝缘层覆盖空腔,并且填充 空腔中的空腔和金属块之间形成树脂填充间隙。 空腔穿透芯基板,芯基板具有从空腔的一个或多个侧表面突出的腔内投影结构,使得突出结构位于金属块之间并且分离金属块以在空腔中彼此接触 第一累积层具有连接到金属块的第一导体,使得每个第一导体传导电或热,并且第二堆积层具有连接到金属块的第二导体,使得每个第二导体导电或加热。
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