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公开(公告)号：US20160336261A1
公开(公告)日：2016-11-17
申请号：US14992197
申请日：2016-01-11
Applicant: IBIDEN CO., LTD.
Inventor： Toshiki FURUTANI , Shunsuke SAKAI , Yasushi INAGAKI
IPC: H01L23/498 , H01L25/065 , H01L23/055 , H05K1/03 , H01L23/31
CPC classification number: H01L23/49833 , H01L23/055 , H01L23/3121 , H01L23/3142 , H01L23/498 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49838 , H01L23/49894 , H01L25/0657 , H01L2224/16 , H01L2224/48091 , H01L2224/48227 , H01L2225/0651 , H01L2225/06517 , H01L2225/0652 , H01L2225/06572 , H05K1/0313 , H05K3/007 , H05K3/205 , H01L2924/00014
Abstract: A printed wiring board includes a resin insulating layer, a wiring conductor layer embedded in the insulating layer such that the conductor layer has a first surface exposed on a first surface side of the insulating layer, and a conductor post formed on a second surface of the conductor layer on the opposite side with respect to the first surface such that the conductor post has a side surface covered by the insulating layer. The conductor post has an end surface on the opposite with respect to the conductor layer such that the end surface of the conductor post is exposed on a second surface side of the insulating layer, and the conductor post has an end portion on a wiring conductor layer side such that the side surface in the end portion is a curved side surface which is bending outward increasingly toward from the conductor layer.
Abstract translation: 印刷电路板包括树脂绝缘层，布置在绝缘层中的布线导体层，使得导体层具有暴露在绝缘层的第一表面侧上的第一表面和形成在绝缘层的第二表面上的导体柱 导体层相对于第一表面在相对侧上，使得导体柱具有被绝缘层覆盖的侧表面。 所述导体柱相对于所述导体层具有相对的端面，使得所述导体柱的端面暴露在所述绝缘层的第二表面侧上，并且所述导体柱在布线导体层上具有端部 使得端部的侧面是从导体层向外侧朝外侧弯曲的弯曲侧面。
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公开(公告)号：US20250089167A1
公开(公告)日：2025-03-13
申请号：US18882148
申请日：2024-09-11
Applicant: IBIDEN CO., LTD.
Inventor： Shunsuke SAKAI , Yoshio MIZUTANI
Abstract: A wiring substrate includes an insulating layer having through holes, a first conductor layer, a second conductor layer, interlayer conductors formed in the through holes. The interlayer conductors are connecting the first and second conductor layers and include first interlayer conductors formed in first region of the insulating layer and second interlayer conductors formed in second region of the insulating layer at density higher than density of the first interlayer conductors formed in the first region. A thickness of each first interlayer conductor is larger than a thickness of each second interlayer conductor. The insulating layer is formed such that the through holes includes first through holes having the first interlayer conductors formed therein and second through holes having the second interlayer conductors formed therein and that an inner diameter of each of the first through holes is larger than an inner diameter of each of the second through holes.
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公开(公告)号：US20240206057A1
公开(公告)日：2024-06-20
申请号：US18542813
申请日：2023-12-18
Applicant: IBIDEN CO., LTD.
Inventor： Shunsuke SAKAI , Koji OKABE
CPC classification number: H05K1/0296 , H05K3/067 , H05K3/064
Abstract: A wiring substrate includes a substrate, and a conductor layer formed on the substrate and including copper such that the conductor layer is patterned. The conductor layer is formed such that the upper surface of the conductor layer has a width that is equal to or larger than a width of the lower surface of the conductor layer and that the width of the lower surface is larger than the minimum width of a middle portion of the conductor layer between the upper surface and the lower surface.
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公开(公告)号：US20160043024A1
公开(公告)日：2016-02-11
申请号：US14822069
申请日：2015-08-10
Applicant: IBIDEN CO., LTD.
Inventor： Toshiki FURUTANI , Shunsuke SAKAI , Yasushi INAGAKI
IPC: H01L23/498
CPC classification number: H01L23/49827 , H01L23/145 , H01L23/49811 , H01L23/49833 , H01L23/49894 , H01L23/5385 , H01L23/5389 , H01L2224/16237 , H01L2224/48091 , H01L2224/48227 , H01L2924/15311 , H01L2924/1533
Abstract: A printed wiring board includes a wiring conductor layer having first surface, conductor posts formed on second surface of the wiring layer, and an insulating layer embedding the wiring layer such that the first surface of the wiring layer is exposed on first surface of the insulating layer and covering side surfaces of the posts such that end surface of each conductor post is exposed from second surface of the insulating layer. The first surface of the wiring layer is recessed with respect to the first surface of the insulating layer and the end surface of each conductor post is recessed with respect to the second surface of the insulating layer such that distance between the end surface of each conductor post and the second surface of the insulating layer is greater than distance between the first surface of the wiring layer and the first surface of the insulating layer.
Abstract translation: 印刷电路板包括具有第一表面的布线导体层，形成在布线层的第二表面上的导体柱，以及嵌入布线层的绝缘层，使得布线层的第一表面暴露在绝缘层的第一表面上 并且覆盖柱的侧表面，使得每个导体柱的端表面从绝缘层的第二表面露出。 布线层的第一表面相对于绝缘层的第一表面凹陷，并且每个导体柱的端表面相对于绝缘层的第二表面凹陷，使得每个导体柱的端面之间的距离 并且绝缘层的第二表面大于布线层的第一表面和绝缘层的第一表面之间的距离。
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公开(公告)号：US20230380076A1
公开(公告)日：2023-11-23
申请号：US18307055
申请日：2023-04-26
Applicant: IBIDEN CO., LTD.
Inventor： Masataka KATO , Shunsuke SAKAI , Masahide TAWATARI , Kosuke IKEDA
CPC classification number: H05K3/4644 , H05K1/113
Abstract: A wiring substrate includes a core substrate, a build-up part formed on a surface of the substrate and including insulating layers and conductor layers, and a covering insulating layer formed on the build-up part such that the covering layer is covering the outermost surface of the build-up part. The build-up part is formed such that the insulating layers include a first insulating layer forming the outermost one of the insulating layers, that the conductor layers include a first conductor layer formed on the first insulating layer and including a first conductor pad, and that an elongation rate of the first insulating layer is greater than an elongation rate of each insulating layer other than the first insulating layer in the build-up part, and the covering layer is formed such that the covering layer has an opening entirely exposing an upper surface and a side surface of the first conductor pad.
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Patent Agency Ranking
公开(公告)号：US20160316558A1
公开(公告)日：2016-10-27
申请号：US15084992
申请日：2016-03-30
Applicant: IBIDEN CO., LTD.
Inventor： Shunsuke SAKAI , Toshiki FURUTANI , Kosuke IKEDA , Takema ADACHI , Takayuki KATSUNO
CPC classification number: H05K1/11 , H01L21/486 , H01L23/12 , H01L23/145 , H01L23/49861 , H05K3/205 , H05K3/382 , H05K3/4007 , H05K2201/0367 , H05K2203/0307
Abstract: A printed wiring board includes a resin insulating layer, a wiring conductor layer embedded in the insulating layer such that the wiring layer has first surface exposed from the insulating layer, and a conductor post formed in the insulating layer and on second surface of the wiring layer on the opposite side with respect to the first surface of the wiring layer such that the conductor post has side surface covered by the insulating layer and end surface exposed from the insulating layer on the opposite side with respect to the wiring layer. The conductor post is formed such that the side surface of the conductor post is a roughened side surface having surface roughness of first roughness R1, the end surface of the conductor post is a roughened end surface having surface roughness of second roughness R2, and the first and second roughnesses R1, R2 satisfy R1>R2.
Abstract translation: 印刷布线板包括树脂绝缘层，布置在绝缘层中的布线导体层，使得布线层具有从绝缘层露出的第一表面，以及形成在绝缘层中的导体柱和布线层的第二表面 在相对于布线层的第一表面的相对侧，使得导体柱具有被绝缘层覆盖的侧表面和相对于布线层的相对侧上的绝缘层暴露的端面。 导体柱形成为使得导体柱的侧表面是具有第一粗糙度R1的表面粗糙度的粗糙化侧表面，导体柱的端面是具有第二粗糙度R2的表面粗糙度的粗糙化端面，并且第一 第二粗糙度R1，R2满足R1> R2。
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公开(公告)号：US20220192018A1
公开(公告)日：2022-06-16
申请号：US17456390
申请日：2021-11-24
Applicant: IBIDEN CO., LTD.
Inventor： Shunsuke SAKAI , Shuto IWATA , Ikuya TERAUCHI , Takahiro YAMADA
IPC: H05K1/11
Abstract: A wiring substrate includes an insulating layer, a conductor layer formed on the insulating layer and including a conductor pad having a rectangular planar shape, and a solder resist layer formed on the insulating layer such that the solder resist layer is covering the conductor layer formed on the insulating layer. The solder resist layer has an opening formed such that the opening is exposing 50% or more of an area of a surface of the conductor pad on the opposite side with respect to the insulating layer and exposing a side surface and the surface of the conductor pad at side portions of a peripheral edge of the conductor pad and that the solder resist layer is covering the side surface and the surface of the conductor pad at one or more of corner portions of the peripheral edge of the conductor pad.
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8.发明申请MULTILAYER WIRING BOARD WITH BUILT-IN ELECTRONIC COMPONENT AND METHOD FOR MANUFACTURING THE SAME 有权具有内置电子元件的多层布线器及其制造方法公开(公告)号：US20150282305A1
公开(公告)日：2015-10-01
申请号：US14669329
申请日：2015-03-26
Applicant: IBIDEN CO., LTD.
Inventor： Toyotaka SHIMABE , Shunsuke SAKAI
CPC classification number: H05K1/0284 , H01L21/568 , H01L24/19 , H01L24/25 , H01L2224/04105 , H01L2224/16227 , H01L2224/2518 , H01L2224/82039 , H01L2924/15313 , H05K1/185 , H05K3/4602 , H05K3/4697 , H05K2201/0344 , H05K2201/09036 , H05K2201/09145 , H05K2201/09154 , H05K2201/10015 , H05K2201/10022 , H05K2201/1003 , H05K2201/10522 , H05K2201/10636 , Y02P70/611 , Y10T29/4913
Abstract: A multilayer wiring board with a built-in electronic component includes a substrate, a conductor layer formed on surface of the substrate, one or more electronic components positioned in a cavity formed through the substrate, an insulating layer formed on the substrate such that the insulating layer is formed on the component in the cavity, and a wiring layer formed on the insulating layer. The conductor layer has an opening formed such that the cavity is formed in the opening of the conductor layer and that the conductor layer has a first side in the opening and a second side in the opening on the opposite side across the cavity, and the cavity is formed in the opening of the conductor layer such that width between the cavity and the first side of the conductor layer is greater than width between the cavity and the second side of the conductor layer.
Abstract translation: 具有内置电子部件的多层布线基板包括基板，形成在基板的表面上的导体层，位于通过基板形成的空腔中的一个或多个电子部件，形成在基板上的绝缘层， 在空腔中的部件上形成层，以及形成在绝缘层上的布线层。 导体层具有形成为使得空腔形成在导体层的开口中并且导体层在开口中具有第一侧的开口，并且在开口中的相对于空腔的开口中的第二侧，并且空腔 形成在导体层的开口中，使得空腔和导体层的第一侧之间的宽度大于导体层的空腔和第二侧之间的宽度。
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公开(公告)号：US20230380055A1
公开(公告)日：2023-11-23
申请号：US18307131
申请日：2023-04-26
Applicant: IBIDEN CO., LTD.
Inventor： Masataka KATO , Shunsuke SAKAI , Masahide TAWATARI , Kosuke IKEDA
CPC classification number: H05K1/0271 , H05K1/113 , H05K3/4673 , H05K1/181
Abstract: A wiring substrate includes a core substrate, a build-up part formed on a surface of the substrate and including insulating layers and conductor layers, and a covering insulating layer formed on the build-up part such that the covering layer is covering the outermost surface of the build-up part. The build-up part is formed such that the insulating layers include a first insulating layer forming the outermost one of the insulating layers, that the conductor layers include a first conductor layer formed on the first insulating layer and including a first conductor pad, and that a tensile strength of the first insulating layer is higher than a tensile strength of each insulating layer other than the first insulating layer in the first build-up part, and the covering layer is formed such that the covering layer has opening entirely exposing an upper surface and a side surface of the first conductor pad.
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公开(公告)号：US20160255717A1
公开(公告)日：2016-09-01
申请号：US15052009
申请日：2016-02-24
Applicant: IBIDEN CO., LTD.
Inventor： Toshiki FURUTANI , Yasushi INAGAKI , Shunsuke SAKAI
CPC classification number: H05K1/0271 , H01L21/4857 , H01L23/49822 , H01L23/49838 , H05K1/113 , H05K3/007 , H05K3/4658 , H05K3/4682 , H05K2201/0376 , H05K2201/096 , H05K2201/09609 , H05K2201/10734
Abstract: A multilayer wiring board includes wiring bodies each including an insulating layer, a conductor layer embedded in the insulating layer and having exposed surface on first surface of the insulating layer, and a conductor post formed on embedded surface of the conductor layer on the opposite side and having end surface on second surface of the insulating layer. The bodies include first and second bodies forming outermost layers on the opposite sides, the exposed surface is recessed from the first surface of the insulating layer in the first body, the end surface is recessed from the second surface in the second body in recess amount greater than that of the exposed surface in the first body, the post of the first body has the exposed surface bonded to the conductor layer of an adjacent body, the second body has the conductor layer bonded to the post of an adjacent body.
Abstract translation: 多层布线基板包括布线体，每个布线体包括绝缘层，埋在绝缘层中的导体层，并且在绝缘层的第一表面上具有暴露表面;导体柱，形成在导体层的相对侧的嵌入表面上， 在绝缘层的第二表面上具有端面。 这些主体包括在相对侧上形成最外层的第一和第二主体，暴露的表面从第一主体中的绝缘层的第一表面凹陷，端面从第二主体中的第二表面凹入更大的凹陷量 比第一主体中的暴露表面的第一主体的柱具有暴露的表面结合到相邻体的导体层，第二主体具有结合到相邻体的柱的导体层。
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