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    WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME
    1.
    发明申请
    WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME 有权
    接线板及其制造方法

    公开(公告)号：US20140251656A1

    公开(公告)日：2014-09-11

    申请号：US14202324

    申请日：2014-03-10

    申请人： IBIDEN CO., LTD.

    发明人： Kosuke IKEDA

    IPC分类号： H05K1/02 ,  H05K1/03 ,  H05K3/46

    CPC分类号： H05K1/0298 ,  H05K1/0296 ,  H05K1/0373 ,  H05K3/381 ,  H05K3/4644 ,  H05K3/4676 ,  H05K3/4682 ,  Y10T29/49117

    摘要： A wiring board includes a core structure including a core substrate, and a buildup structure formed on the core structure and including an interlayer insulating layer and a conductive layer. The interlayer insulating layer does not contain inorganic fiber and includes a resin and an inorganic filler, and the conductive layer is formed on the interlayer insulating layer such that the inorganic filler in the interlayer insulating layer is not in contact with the conductive layer.

    摘要翻译： 布线基板包括芯结构，该芯结构包括芯基板和形成在芯结构上并包括层间绝缘层和导电层的堆积结构。 层间绝缘层不含无机纤维，并且包括树脂和无机填料，并且在层间绝缘层上形成导电层，使得层间绝缘层中的无机填料不与导电层接触。

    WIRING SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME
    2.
    发明申请
    WIRING SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME 有权
    配线基板及其制造方法

    公开(公告)号：US20160338195A1

    公开(公告)日：2016-11-17

    申请号：US15153884

    申请日：2016-05-13

    申请人： IBIDEN CO. LTD.

    发明人： Kosuke IKEDA

    IPC分类号： H05K1/02 ,  H05K3/40 ,  H05K3/46 ,  H05K1/11 ,  H05K1/03

    CPC分类号： H05K1/0298 ,  H05K1/0204 ,  H05K1/0373 ,  H05K1/115 ,  H05K1/185 ,  H05K3/4038 ,  H05K3/4652 ,  H05K3/4661 ,  H05K3/4673 ,  H05K3/4697 ,  H05K2201/0183 ,  H05K2201/0195 ,  H05K2201/068 ,  H05K2201/10416

    摘要： A wiring substrate includes a core substrate, and a build-up layer including conductor layers and insulating layers alternately laminated on the substrate and via conductors formed in the insulating layers, each insulating layer having a coating layer and a support layer stacked on the coating layer such that the support layer has surface on which a conductor layer is laminated and the coating layer is covering a conductor layer, each via conductor connecting two conductor layers through an insulating layer. The coating layer has a thickness greater than that of the support layer and includes inorganic filler at content rate of 65 to 85% by mass, and the support layer includes inorganic filler at different content rate such that thermal expansion coefficient of the coating layer is smaller than that of the support layer and the coefficients of the coating and support layers have difference of 30 ppm/° C. or less.

    摘要翻译： 布线基板包括芯基板和包括导体层和绝缘层的堆积层，交替层叠在基板上，并且经由形成在绝缘层中的导体，每个绝缘层具有层叠在涂层上的涂层和支撑层 使得支撑层具有其上层叠导体层的表面，并且涂层覆盖导体层，每个通孔导体通过绝缘层连接两个导体层。 涂层的厚度大于支撑层的厚度，包含含量为65〜85质量％的无机填料，支承层包含不同含量的无机填料，使得涂层的热膨胀系数较小 与支撑层的系数相比，涂层和支撑层的系数差为30ppm /℃或更低。

    WIRING SUBSTRATE
    3.
    发明公开
    WIRING SUBSTRATE 审中-公开

    公开(公告)号：US20230380055A1

    公开(公告)日：2023-11-23

    申请号：US18307131

    申请日：2023-04-26

    申请人： IBIDEN CO., LTD.

    发明人： Masataka KATO ,  Shunsuke SAKAI ,  Masahide TAWATARI ,  Kosuke IKEDA

    IPC分类号： H05K1/02 ,  H05K1/11 ,  H05K3/46

    CPC分类号： H05K1/0271 ,  H05K1/113 ,  H05K3/4673 ,  H05K1/181

    摘要： A wiring substrate includes a core substrate, a build-up part formed on a surface of the substrate and including insulating layers and conductor layers, and a covering insulating layer formed on the build-up part such that the covering layer is covering the outermost surface of the build-up part. The build-up part is formed such that the insulating layers include a first insulating layer forming the outermost one of the insulating layers, that the conductor layers include a first conductor layer formed on the first insulating layer and including a first conductor pad, and that a tensile strength of the first insulating layer is higher than a tensile strength of each insulating layer other than the first insulating layer in the first build-up part, and the covering layer is formed such that the covering layer has opening entirely exposing an upper surface and a side surface of the first conductor pad.

    WIRING SUBSTRATE
    4.
    发明公开
    WIRING SUBSTRATE 审中-公开

    公开(公告)号：US20230180385A1

    公开(公告)日：2023-06-08

    申请号：US18062049

    申请日：2022-12-06

    申请人： IBIDEN CO., LTD.

    发明人： Shogo FUKUI ,  Kosuke IKEDA ,  Kosei ICHIKAWA ,  Ryo ANDO

    IPC分类号： H05K1/03 ,  H05K3/46 ,  H05K1/11

    CPC分类号： H05K1/0373 ,  H05K3/4661 ,  H05K1/112 ,  H05K2201/0209 ,  H05K2201/0263

    摘要： A wiring substrate includes an insulating layer including inorganic filler particles and resin, and a conductor layer including a metal film formed on a surface of the insulating layer and having a conductor pattern. The inorganic filler particles include first inorganic filler particles such that each of the first inorganic filler particles has a portion exposed on the surface of the insulating layer and is at least partially separated from the resin, the conductor layer is formed such that a part of the metal film is between the first inorganic filler particles and the resin from the surface of the insulating layer and that a distance between the surface of the insulating layer and the surface of the insulating layer at a deepest part of the part of the metal film is in the range of 0.1 μm to 0.5 μm.

    WIRING SUBSTRATE
    5.
    发明公开
    WIRING SUBSTRATE 审中-公开

    公开(公告)号：US20230380076A1

    公开(公告)日：2023-11-23

    申请号：US18307055

    申请日：2023-04-26

    申请人： IBIDEN CO., LTD.

    发明人： Masataka KATO ,  Shunsuke SAKAI ,  Masahide TAWATARI ,  Kosuke IKEDA

    IPC分类号： H05K3/46 ,  H05K1/11

    CPC分类号： H05K3/4644 ,  H05K1/113

    摘要： A wiring substrate includes a core substrate, a build-up part formed on a surface of the substrate and including insulating layers and conductor layers, and a covering insulating layer formed on the build-up part such that the covering layer is covering the outermost surface of the build-up part. The build-up part is formed such that the insulating layers include a first insulating layer forming the outermost one of the insulating layers, that the conductor layers include a first conductor layer formed on the first insulating layer and including a first conductor pad, and that an elongation rate of the first insulating layer is greater than an elongation rate of each insulating layer other than the first insulating layer in the build-up part, and the covering layer is formed such that the covering layer has an opening entirely exposing an upper surface and a side surface of the first conductor pad.

    PRINTED WIRING BOARD AND SEMICONDUCTOR PACKAGE
    8.
    发明申请
    PRINTED WIRING BOARD AND SEMICONDUCTOR PACKAGE 审中-公开
    印刷线路板和半导体封装

    公开(公告)号：US20170053878A1

    公开(公告)日：2017-02-23

    申请号：US15239865

    申请日：2016-08-18

    申请人： IBIDEN CO., LTD.

    发明人： Kazuki KAJIHARA ,  Takema ADACHI ,  Teruyuki ISHIHARA ,  Kosuke IKEDA

    IPC分类号： H01L23/00 ,  H01L21/48 ,  H01L25/10 ,  H01L23/498 ,  H01L23/31

    CPC分类号： H01L23/49822 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/145 ,  H01L23/3121 ,  H01L23/49827 ,  H01L23/5389 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2225/1058 ,  H01L2924/00014

    摘要： A printed wiring board includes a build-up layer including insulating and conductor layers, pads formed on surface of the build-up layer and including first pads to connect an electronic component and second pads to connect an external wiring board onto the surface of the build-up layer, a mold resin layer formed on the surface of the build-up layer such that the mold layer is covering the surface of the build-up layer and has a cavity exposing the first pads and openings exposing the second pads, and conductor posts formed in the openings and including plating material such that the posts are connected to the second pads. The plating material of the posts includes electroless plating layer and electrolytic plating layer, and the posts are formed such that each post has an end surface exposed from surface of the mold layer on the opposite side with respect to the second pads.

    摘要翻译： 印刷电路板包括包含绝缘层和导体层的堆积层，形成在堆积层的表面上的焊盘，并且包括用于连接电子部件的第一焊盘和将外部布线板连接到建筑物的表面上的第二焊盘 上层，形成在堆积层的表面上的模制树脂层，使得模制层覆盖积层的表面并且具有暴露第一焊盘和暴露第二焊盘的开口的腔，以及导体 形成在开口中并包括电镀材料的柱，使得柱连接到第二垫。 柱的电镀材料包括无电解镀层和电解镀层，并且柱形成为使得每个柱具有相对于第二焊盘在相对侧的表面暴露于模具层的端面。

    PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME
    9.
    发明申请
    PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME 审中-公开
    印刷线路板及其制造方法

    公开(公告)号：US20160316558A1

    公开(公告)日：2016-10-27

    申请号：US15084992

    申请日：2016-03-30

    申请人： IBIDEN CO., LTD.

    发明人： Shunsuke SAKAI ,  Toshiki FURUTANI ,  Kosuke IKEDA ,  Takema ADACHI ,  Takayuki KATSUNO

    IPC分类号： H05K1/11 ,  H05K3/18 ,  H05K1/09 ,  H05K3/00 ,  H05K1/02 ,  H05K1/03

    CPC分类号： H05K1/11 ,  H01L21/486 ,  H01L23/12 ,  H01L23/145 ,  H01L23/49861 ,  H05K3/205 ,  H05K3/382 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2203/0307

    摘要： A printed wiring board includes a resin insulating layer, a wiring conductor layer embedded in the insulating layer such that the wiring layer has first surface exposed from the insulating layer, and a conductor post formed in the insulating layer and on second surface of the wiring layer on the opposite side with respect to the first surface of the wiring layer such that the conductor post has side surface covered by the insulating layer and end surface exposed from the insulating layer on the opposite side with respect to the wiring layer. The conductor post is formed such that the side surface of the conductor post is a roughened side surface having surface roughness of first roughness R1, the end surface of the conductor post is a roughened end surface having surface roughness of second roughness R2, and the first and second roughnesses R1, R2 satisfy R1>R2.

    摘要翻译： 印刷布线板包括树脂绝缘层，布置在绝缘层中的布线导体层，使得布线层具有从绝缘层露出的第一表面，以及形成在绝缘层中的导体柱和布线层的第二表面 在相对于布线层的第一表面的相对侧，使得导体柱具有被绝缘层覆盖的侧表面和相对于布线层的相对侧上的绝缘层暴露的端面。 导体柱形成为使得导体柱的侧表面是具有第一粗糙度R1的表面粗糙度的粗糙化侧表面，导体柱的端面是具有第二粗糙度R2的表面粗糙度的粗糙化端面，并且第一 第二粗糙度R1，R2满足R1> R2。