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公开(公告)号：US08499444B2
公开(公告)日：2013-08-06
申请号：US12216152
申请日：2008-06-30
申请人： Jin-Yong An , Chang-Sup Ryu , Jong-Kuk Hong
发明人： Jin-Yong An , Chang-Sup Ryu , Jong-Kuk Hong
CPC分类号： H05K1/02 , H01L23/49822 , H01L23/49827 , H01L2924/0002 , H05K3/0097 , H05K3/4007 , H05K3/4644 , H05K2201/0367 , H05K2201/09481 , H05K2201/096 , H05K2203/0384 , H05K2203/0726 , H05K2203/1536 , Y10T29/49126 , Y10T29/49155 , Y10T29/49204 , Y10T428/24851 , Y10T428/24917 , H01L2924/00
摘要： A package substrate and a method of manufacturing the package substrate are disclosed. The method of manufacturing the package substrate may include stacking a second metal layer in which at least one hole is formed over a first metal layer, stacking a barrier layer over the first metal layer exposed in the hole and over the second metal layer, forming at least one bump by filling the hole with a conductive metal, stacking an insulation layer over the bump and forming a circuit pattern over the insulation layer, and removing the first metal layer, the second metal layer, and the barrier layer.
摘要翻译： 公开了封装基板和制造封装基板的方法。 制造封装衬底的方法可以包括堆叠第二金属层，其中在第一金属层上形成至少一个孔，在第一金属层上方在第二金属层上方堆叠阻挡层，形成在第二金属层上 通过用导电金属填充所述孔至少一个凸块，在所述凸块上方堆叠绝缘层并在所述绝缘层上形成电路图案，以及去除所述第一金属层，所述第二金属层和所述阻挡层。
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公开(公告)号：US20090169837A1
公开(公告)日：2009-07-02
申请号：US12216152
申请日：2008-06-30
申请人： Jin-Yong An , Chang-Sup Ryu , Jong-Kuk Hong
发明人： Jin-Yong An , Chang-Sup Ryu , Jong-Kuk Hong
CPC分类号： H05K1/02 , H01L23/49822 , H01L23/49827 , H01L2924/0002 , H05K3/0097 , H05K3/4007 , H05K3/4644 , H05K2201/0367 , H05K2201/09481 , H05K2201/096 , H05K2203/0384 , H05K2203/0726 , H05K2203/1536 , Y10T29/49126 , Y10T29/49155 , Y10T29/49204 , Y10T428/24851 , Y10T428/24917 , H01L2924/00
摘要： A package substrate and a method of manufacturing the package substrate are disclosed. The method of manufacturing the package substrate may include stacking a second metal layer in which at least one hole is formed over a first metal layer, stacking a barrier layer over the first metal layer exposed in the hole and over the second metal layer, forming at least one bump by filling the hole with a conductive metal, stacking an insulation layer over the bump and forming a circuit pattern over the insulation layer, and removing the first metal layer, the second metal layer, and the barrier layer.
摘要翻译： 公开了封装基板和制造封装基板的方法。 制造封装衬底的方法可以包括堆叠第二金属层，其中在第一金属层上形成至少一个孔，在第一金属层上方在第二金属层上方堆叠阻挡层，形成在第二金属层上 通过用导电金属填充所述孔至少一个凸块，在所述凸块上方堆叠绝缘层并在所述绝缘层上形成电路图案，以及去除所述第一金属层，所述第二金属层和所述阻挡层。
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公开(公告)号：US20090084494A1
公开(公告)日：2009-04-02
申请号：US12007475
申请日：2008-01-10
申请人： Jin-Yong An , Joon-Sung Kim , Jong-Kuk Hong , Chang-Sup Ryu
发明人： Jin-Yong An , Joon-Sung Kim , Jong-Kuk Hong , Chang-Sup Ryu
IPC分类号： B29C65/00
CPC分类号： H01L21/6835 , H01L21/4857 , H01L2221/68318 , H01L2221/68345 , H05K3/0052 , H05K3/0058 , H05K3/025 , H05K3/20 , H05K3/4682 , H05K2201/09481 , H05K2201/09563 , H05K2203/0152 , H05K2203/0228 , H05K2203/0384 , Y10T156/1052
摘要： A substrate manufacturing method is disclosed. A substrate manufacturing method, comprising: providing a support body on which a first separation layer is formed; forming a second separation layer on the first separation layer; forming an adhesion layer which covers the first separation layer and the second separation layer; forming a circuit stack body on the adhesion layer; cutting the circuit stack body, the adhesion layer and the second separation layer to a pre-determined shape; and forming a circuit stack unit by separating the second layer from the first layer, provides easy separation of the circuit stack pattern, which formed on the support body, from the support body and reduced manufacturing cost by reducing number of process and required materials for manufacturing coreless thin substrate.
摘要翻译： 公开了一种基板制造方法。 一种基板制造方法，包括：提供其上形成有第一分离层的支撑体; 在所述第一分离层上形成第二分离层; 形成覆盖所述第一分离层和所述第二分离层的粘合层; 在所述粘合层上形成电路堆叠体; 将电路堆叠体，粘合层和第二分离层切割成预定形状; 并且通过将第二层与第一层分开来形成电路堆叠单元，使形成在支撑体上的电路堆叠图形容易地从支撑体分离，并通过减少工艺数量和所需的制造材料来减少制造成本 无芯薄基板。
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公开(公告)号：US20090038837A1
公开(公告)日：2009-02-12
申请号：US12078176
申请日：2008-03-27
申请人： Shuhichi Okabe , Jin-Yong An , Seok-Kyu Lee , Soon-Oh Jung , Jong-Kuk Hong , Hae-Nam Seo
发明人： Shuhichi Okabe , Jin-Yong An , Seok-Kyu Lee , Soon-Oh Jung , Jong-Kuk Hong , Hae-Nam Seo
CPC分类号： H05K3/462 , H05K3/205 , H05K3/243 , H05K3/421 , H05K3/4623 , H05K3/4644 , H05K2201/09527 , H05K2201/09563 , H05K2201/096
摘要： A multilayered printed circuit board is disclosed. A method of manufacturing the multilayered printed circuit board, which includes: forming a metal layer and a lower-circuit-forming pattern in order on a carrier, and forming a lower circuit by filling a conductive material in the lower-circuit-forming pattern; removing the lower-circuit-forming pattern, stacking an insulation resin, and forming at least one via hole connecting with the lower circuit; forming at least one inner circuit and at least one interlayer connector connecting the inner circuit with the lower circuit on the insulation resin, to form a pair of circuit parts; and aligning the pair of circuit parts, attaching the pair of circuit parts to each other, and removing the carrier and the metal layer, allows the forming of fine-lined circuits and provides a thin board, while preventing bending and warpage in the board.
摘要翻译： 公开了一种多层印刷电路板。 一种制造多层印刷电路板的方法，包括：在载体上依次形成金属层和下电路形成图案，并通过在下电路形成图案中填充导电材料形成下层电路; 去除下部电路形成图案，堆叠绝缘树脂，并形成与下部电路连接的至少一个通孔; 在所述绝缘树脂上形成至少一个内部电路和连接所述内部电路与所述下部电路的至少一个层间连接器，以形成一对电路部件; 并且将一对电路部件对准，将一对电路部件彼此连接，并且移除载体和金属层，允许形成精细的电路并提供薄板，同时防止板的弯曲和翘曲。
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公开(公告)号：US07971352B2
公开(公告)日：2011-07-05
申请号：US12213465
申请日：2008-06-19
申请人： Shuhichi Okabe , Jin-Yong An , Seok-Kyu Lee , Soon-Oh Jung , Jong-Kuk Hong , Hae-Nam Seo
发明人： Shuhichi Okabe , Jin-Yong An , Seok-Kyu Lee , Soon-Oh Jung , Jong-Kuk Hong , Hae-Nam Seo
CPC分类号： H05K3/4682 , H05K3/108 , H05K3/205 , H05K3/3473 , H05K2201/0367 , H05K2203/0376 , H05K2203/043 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49144 , Y10T29/49149
摘要： A method of manufacturing a printed circuit board having solder balls. The method may include: stacking a second carrier, in which at least one hole is formed, over one side of a first carrier; forming at least one solder bump by filling the hole with a conductive material; forming a circuit pattern layer, which is electrically connected with the solder bump, on the second carrier; and exposing the solder bump by removing the first carrier and the second carrier. Using this method, uniform hemispherical solder balls with fine pitch can be formed as a part of the manufacturing process, without having to attach the solder balls separately. Carriers may be used to serve as supports during the manufacturing process, whereby deformations can be prevented in the board.
摘要翻译： 一种制造具有焊球的印刷电路板的方法。 该方法可以包括：在第一载体的一侧堆叠形成有至少一个孔的第二载体; 通过用导电材料填充孔而形成至少一个焊料凸块; 在所述第二载体上形成与所述焊料凸块电连接的电路图案层; 以及通过去除所述第一载体和所述第二载体来暴露所述焊料凸块。 使用这种方法，可以形成具有细间距的均匀的半球形焊球作为制造过程的一部分，而不必分别附接焊球。 可以在制造过程中使用载体作为支撑体，从而可以防止板的变形。
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公开(公告)号：US20090151160A1
公开(公告)日：2009-06-18
申请号：US12213465
申请日：2008-06-19
申请人： Shuhichi Okabe , Jin-Yong An , Seok-Kyu Lee , Soon-Oh Jung , Jong-Kuk Hong , Hae-Nam Seo
发明人： Shuhichi Okabe , Jin-Yong An , Seok-Kyu Lee , Soon-Oh Jung , Jong-Kuk Hong , Hae-Nam Seo
CPC分类号： H05K3/4682 , H05K3/108 , H05K3/205 , H05K3/3473 , H05K2201/0367 , H05K2203/0376 , H05K2203/043 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49144 , Y10T29/49149
摘要： A method of manufacturing a printed circuit board having solder balls. The method may include: stacking a second carrier, in which at least one hole is formed, over one side of a first carrier; forming at least one solder bump by filling the hole with a conductive material; forming a circuit pattern layer, which is electrically connected with the solder bump, on the second carrier; and exposing the solder bump by removing the first carrier and the second carrier. Using this method, uniform hemispherical solder balls with fine pitch can be formed as a part of the manufacturing process, without having to attach the solder balls separately. Carriers may be used to serve as supports during the manufacturing process, whereby deformations can be prevented in the board.
摘要翻译： 一种制造具有焊球的印刷电路板的方法。 该方法可以包括：在第一载体的一侧堆叠形成有至少一个孔的第二载体; 通过用导电材料填充孔而形成至少一个焊料凸块; 在所述第二载体上形成与所述焊料凸块电连接的电路图案层; 以及通过去除所述第一载体和所述第二载体来暴露所述焊料凸块。 使用这种方法，可以形成具有细间距的均匀的半球形焊球作为制造过程的一部分，而不必分别附接焊球。 可以在制造过程中使用载体作为支撑体，从而可以防止板的变形。
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公开(公告)号：US08051559B2
公开(公告)日：2011-11-08
申请号：US12232820
申请日：2008-09-24
申请人： Ki-Hwan Kim , Jong-Kuk Hong , Jin-Yong An
发明人： Ki-Hwan Kim , Jong-Kuk Hong , Jin-Yong An
CPC分类号： H05K3/4682 , H05K3/0097 , H05K3/205 , H05K3/28 , H05K2203/0152 , H05K2203/1536 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165
摘要： A method of manufacturing a multi-layer board is disclosed. The method may include forming a detachable separation layer over a support; forming a first solder resist layer over the separation layer; stacking a metal foil over the first solder resist layer; forming a circuit pattern over the metal foil; forming an insulation part over the first solder resist layer such that the circuit pattern is covered; forming a second solder resist layer over the insulation part; and separating a circuit stack unit, which includes the first solder resist layer, the metal foil, the circuit pattern, the insulation part, and the second solder resist layer, from the support by disconnecting the separation layer and the support. This method uses a simple process to reduce manufacture costs and shorten manufacture times.
摘要翻译： 公开了制造多层板的方法。 该方法可以包括在载体上形成可分离的分离层; 在所述分离层上形成第一阻焊层; 在第一阻焊层上堆叠金属箔; 在金属箔上形成电路图案; 在所述第一阻焊层上形成绝缘部分，使得所述电路图案被覆盖; 在所述绝缘部分上形成第二阻焊层; 以及通过断开分离层和支撑体从支撑件分离包括第一阻焊层，金属箔，电路图案，绝缘部分和第二阻焊层的电路堆叠单元。 该方法采用简单的方法降低制造成本，缩短制造时间。
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公开(公告)号：US20090236125A1
公开(公告)日：2009-09-24
申请号：US12232820
申请日：2008-09-24
申请人： Ki-Hwan Kim , Jong-Kuk Hong , Jin-Yong An
发明人： Ki-Hwan Kim , Jong-Kuk Hong , Jin-Yong An
CPC分类号： H05K3/4682 , H05K3/0097 , H05K3/205 , H05K3/28 , H05K2203/0152 , H05K2203/1536 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165
摘要： A method of manufacturing a multi-layer board is disclosed. The method may include forming a detachable separation layer over a support; forming a first solder resist layer over the separation layer; stacking a metal foil over the first solder resist layer; forming a circuit pattern over the metal foil; forming an insulation part over the first solder resist layer such that the circuit pattern is covered; forming a second solder resist layer over the insulation part; and separating a circuit stack unit, which includes the first solder resist layer, the metal foil, the circuit pattern, the insulation part, and the second solder resist layer, from the support by disconnecting the separation layer and the support. This method uses a simple process to reduce manufacture costs and shorten manufacture times.
摘要翻译： 公开了制造多层板的方法。 该方法可以包括在载体上形成可分离的分离层; 在所述分离层上形成第一阻焊层; 在第一阻焊层上堆叠金属箔; 在金属箔上形成电路图案; 在所述第一阻焊层上形成绝缘部分，使得所述电路图案被覆盖; 在所述绝缘部分上形成第二阻焊层; 以及通过断开分离层和支撑体从支撑件分离包括第一阻焊层，金属箔，电路图案，绝缘部分和第二阻焊层的电路堆叠单元。 该方法采用简单的方法降低制造成本，缩短制造时间。
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公开(公告)号：US20090073670A1
公开(公告)日：2009-03-19
申请号：US12076358
申请日：2008-03-17
申请人： Jong-Kuk Hong , Jin-Yong An , Jae-Joon Lee
发明人： Jong-Kuk Hong , Jin-Yong An , Jae-Joon Lee
CPC分类号： H05K1/0271 , H05K1/09 , H05K3/205 , H05K3/207 , H05K3/4602 , H05K3/4644 , H05K2201/0352 , H05K2201/09781 , H05K2203/0152 , Y10T29/49126 , Y10T29/49165
摘要： A multilayered printed circuit board and a fabricating method thereof are disclosed. A method that includes repeating processes of forming at least one circuit pattern, and at least one insulation layer that covers the circuit pattern, over a carrier and interconnecting circuit patterns on different layers with vias; stacking a metal stiffener over the insulation layer; repeating processes of forming at least one insulation layer and at least one circuit pattern over the stiffener and interconnecting circuit patterns on different layers with vias; and removing the carrier, can be used to reduce warpage in the board and improve workability.
摘要翻译： 公开了一种多层印刷电路板及其制造方法。 一种方法，其包括在载体上形成至少一个电路图案的重复处理和覆盖电路图案的至少一个绝缘层，并且在具有通孔的不同层上互连电路图案; 在绝缘层上堆叠金属加强件; 在加强件上形成至少一个绝缘层和至少一个电路图案的重复工艺，并且在具有通孔的不同层上互连电路图案; 并拆卸载体，可用于减少电路板翘曲，提高可加工性。
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公开(公告)号：US20070281390A1
公开(公告)日：2007-12-06
申请号：US11727852
申请日：2007-03-28
申请人： Myung-Sam Kang , Je-Gwang Yoo , Jung-Hyun Park , Ji-Eun Kim , Hoe-Ku Jung , Jin-Yong An
发明人： Myung-Sam Kang , Je-Gwang Yoo , Jung-Hyun Park , Ji-Eun Kim , Hoe-Ku Jung , Jin-Yong An
IPC分类号： H01L21/00
CPC分类号： H01L21/4846 , H01L23/49827 , H01L2924/0002 , H05K3/064 , H05K3/108 , H05K3/242 , H05K3/243 , H05K3/427 , H05K2201/0376 , H05K2203/0361 , H05K2203/1394 , H01L2924/00
摘要： The present invention relates to a manufacturing method of a package substrate. A manufacturing method of a package substrate for mounting an electric component by connecting electrodes of the electric component to bonding pads, includes: manufacturing a buried pattern substrate having a circuit pattern and bonding pads buried in an insulating layer and having a seed layer laminated on the insulating layer, laminating a dry film onto the seed layer and removing the seed layer and the dry film of the upper side of the bonding pads, performing surface-treatment using the remaining seed layer as a plating lead; and removing the remaining seed layer and the dry film such that the circuit pattern is exposed.
摘要翻译： 本发明涉及封装基板的制造方法。 一种用于通过将电气部件的电极连接到接合焊盘来安装电气部件的封装基板的制造方法，包括：制造具有电路图案的掩埋图案基板和埋在绝缘层中并具有层叠在所述绝缘层上的种子层的接合焊盘 绝缘层，将干膜层压到种子层上，去除接合焊盘的上侧的种子层和干膜，使用剩余的种子层作为电镀引线进行表面处理; 并且除去剩余的种子层和干膜，使得电路图案被暴露。
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