公开(公告)号：US20060094136A1

公开(公告)日：2006-05-04

申请号：US10979397

申请日：2004-11-01

申请人： Peter Borden ,  Jiping Li ,  Edgar Genio

发明人： Peter Borden ,  Jiping Li ,  Edgar Genio

IPC分类号： H01L21/66 ,  H01L21/00

CPC分类号： G01N21/171 ,  G01N21/95684 ,  G01N21/95692 ,  H01L22/20

摘要： A patterned dielectric layer is evaluated by measuring reflectance of a region which has openings. A heating beam may be chosen for having reflectance from an underlying conductive layer that is several times greater than absorptance, to provide a heightened sensitivity to presence of residue and/or changes in dimension of the openings. Reflectance may be measured by illuminating the region with a heating beam modulated at a preset frequency, and measuring power of a probe beam that reflects from the region at the preset frequency. Openings of many embodiments have sub-wavelength dimensions (i.e. smaller than the wavelength of the heating beam). The underlying conductive layer may be patterned into links of length smaller than the diameter of heating beam, so that the links float to a temperature higher than a corresponding temperature attained by a continuous trace that transfers heat away from the illuminated region by conduction.

摘要翻译： 通过测量具有开口的区域的反射率来评估图案化的介电层。 加热束可以被选择为具有比吸收率大几倍的下层导电层的反射率，以提供对残留物的存在和/或开口尺寸变化的更高的灵敏度。 反射率可以通过以预设频率调制的加热光束照射该区域并测量从预设频率的区域反射的探测光束的功率来测量。 许多实施例的开口具有亚波长尺寸（即小于加热束的波长）。 底层导电层可以被图案化成长度小于加热束直径的链节，使得链节浮动到高于通过传导将热量从照射区域传递的连续迹线获得的相应温度的温度。

公开(公告)号：US20050214956A1

公开(公告)日：2005-09-29

申请号：US10813407

申请日：2004-03-29

申请人： Jiping Li ,  Peter Borden ,  Edgar Genio

发明人： Jiping Li ,  Peter Borden ,  Edgar Genio

IPC分类号： G01N25/18 ,  G01N25/72 ,  H01L23/544 ,  H01L21/66

CPC分类号： G01N25/18 ,  G01N25/72

摘要： Heat is applied to a conductive structure that includes one or more vias, and the temperature at or near the point of heat application is measured. The measured temperature indicates the integrity or the defectiveness of various features (e.g. vias and/or traces) in the conductive structure, near the point of heat application. Specifically, a higher temperature measurement (as compared to a measurement in a reference structure) indicates a reduced heat transfer from the point of heat application, and therefore indicates a defect. The reference structure can be in the same die as the conductive structure (e.g. to provide a baseline) or outside the die but in the same wafer (e.g. in a test structure) or outside the wafer (e.g. in a reference wafer), depending on the embodiment.

摘要翻译： 将热施加到包括一个或多个通孔的导电结构，并且测量在加热点处或附近的温度。 测量的温度表示导热结构中靠近加热点的各种特征（例如通路和/或迹线）的完整性或缺陷。 具体而言，较高的温度测量（与参考结构中的测量值相比）表示从热施加点减少的热传递，因此表示缺陷。 参考结构可以与导电结构（例如，提供基线）或模具外部在相同的晶片（例如，在测试结构中）或晶片外部（例如，在参考晶片中）处于相同的裸片中，这取决于 该实施例。

公开(公告)号：US20050088188A1

公开(公告)日：2005-04-28

申请号：US10977380

申请日：2004-10-29

申请人： Peter Borden ,  Jiping Li

发明人： Peter Borden ,  Jiping Li

IPC分类号： G01N21/956 ,  G01R31/311 ,  H01L21/66 ,  G01R31/302

CPC分类号： G01R31/311 ,  G01N21/95607 ,  G01N21/95684 ,  H01L22/12

摘要： A structure having a number of traces passing through a region is evaluated by using a beam of electromagnetic radiation to illuminate the region, and generating an electrical signal that indicates an attribute of a portion (also called “reflected portion”) of the beam reflected from the region. The just-described acts of “illuminating” and “generating” are repeated in another region, followed by a comparison of the generated signals to identify variation of a property between the two regions. Such measurements can identify variations in material properties (or dimensions) between different regions in a single semiconductor wafer of the type used in fabrication of integrated circuit dice, or even between multiple such wafers. In one embodiment, the traces are each substantially parallel to and adjacent to the other, and the beam has wavelength greater than or equal to a pitch between at least two of the traces. In one implementation the beam is polarized, and can be used in several ways, including, e.g., orienting the beam so that the beam is polarized in a direction parallel to, perpendicular to, or at 45° to the traces. Energy polarized parallel to the traces is reflected by the traces, whereas energy polarized perpendicular to the traces passes between the traces and is reflected from underneath the traces. Measurements of the reflected light provide an indication of changes in properties of a wafer during a fabrication process.

摘要翻译： 通过使用电磁辐射束照射该区域来评估具有通过区域的迹线数量的结构，并且生成指示从所述区域反射的光束的部分（也称为“反射部分”）的属性的属性的电信号 该区域。 在另一区域重复刚才描述的“照明”和“产生”的动作，随后比较生成的信号以识别两个区域之间的属性的变化。 这种测量可以识别在用于制造集成电路晶片的类型的单个半导体晶片中，或甚至在多个这样的晶片之间的不同区域之间的材料性质（或尺寸）的变化。 在一个实施例中，迹线各自基本上平行于并且彼此相邻，并且光束具有大于或等于至少两个迹线之间的间距的波长。 在一个实施例中，光束是极化的，并且可以以多种方式使用，包括例如使光束定向，使得光束在平行于垂直于或垂直于或相对于迹线成45°的方向上极化。 平行于迹线的能量被迹线反射，而垂直于迹线偏振的能量在迹线之间通过，并从迹线下方反射。 反射光的测量提供了在制造过程中晶片的性质变化的指示。

公开(公告)号：US20050264806A1

公开(公告)日：2005-12-01

申请号：US11173665

申请日：2005-07-02

申请人： Peter Borden ,  Jiping Li ,  Jon Madsen

发明人： Peter Borden ,  Jiping Li ,  Jon Madsen

IPC分类号： G01N21/27 ,  G01N21/55 ,  G01N21/95 ,  G01B9/02

CPC分类号： G01N21/9501 ,  G01N21/274 ,  G01N21/55 ,  G01N21/95607

摘要： A method of fabricating a wafer includes forming a portion of the wafer, making a first measurement in the wafer using a first process, making a second measurement in the wafer using a second process each time the first measurement is made, using one of the first measurement and the second measurement to calibrate the other of the first measurement and the second measurement, and changing a process control parameter used in forming the portion of the wafer depending on the first measurement and on the second measurement.

摘要翻译： 制造晶片的方法包括形成晶片的一部分，使用第一工艺在晶片中进行第一测量，使用第一测量中的第二处理在晶片中进行第二测量，使用第一测量中的一个 测量和第二测量以校准第一测量和第二测量中的另一个，并且根据第一测量和第二测量改变在形成晶片的部分中使用的过程控制参数。

公开(公告)号：US20050099190A1

公开(公告)日：2005-05-12

申请号：US10996194

申请日：2004-11-22

申请人： Jiping Li ,  Peter Borden

发明人： Jiping Li ,  Peter Borden

IPC分类号： G01N21/55 ,  G01R31/307 ,  G01R31/26 ,  G01R31/302 ,  H01L21/66

CPC分类号： G01N21/55 ,  G01R31/307

摘要： A sidewall or other feature in a semiconductor wafer is evaluated by illuminating the wafer with at least one beam of electromagnetic radiation, and measuring intensity of a portion of the beam reflected by the wafer. Change in reflectance between measurements provides a measure of a property of the feature. The change may be either a decrease in reflectance or an increase in reflectance, depending on the embodiment. A single beam may be used if it is polarized in a direction substantially perpendicular to a longitudinal direction of the sidewall. A portion of the energy of the beam is absorbed by the sidewall, thereby to cause a decrease in reflectance when compared to reflectance by a flat region. Alternatively, two beams may be used, of which a first beam applies heat to the feature itself or to a region adjacent to the feature, and a second beam is used to measure an increase in reflectance caused by an elevation in temperature due to heat transfer through the feature. The elevation in temperature that is measured can be either of the feature itself, or of a region adjacent to the feature.

公开(公告)号：US08168462B2

公开(公告)日：2012-05-01

申请号：US12479139

申请日：2009-06-05

申请人： Peter Borden ,  Michael P. Stewart ,  Li Xu ,  Hemant P. Mungekar ,  Christopher S. Olsen

发明人： Peter Borden ,  Michael P. Stewart ,  Li Xu ,  Hemant P. Mungekar ,  Christopher S. Olsen

IPC分类号： H01L21/00 ,  H01L31/0216

CPC分类号： H01L31/1868 ,  H01L31/022425 ,  H01L31/072 ,  Y02E10/50 ,  Y02P70/521

摘要： Embodiments of the invention contemplate the formation of a high efficiency solar cell using a novel plasma oxidation process to form a passivation film stack on a surface of a solar cell substrate. In one embodiment, the methods include providing a substrate having a first type of doping atom on a back surface of the substrate and a second type of doping atom on a front surface of the substrate, plasma oxidizing the back surface of the substrate to form an oxidation layer thereon, and forming a silicon nitride layer on the oxidation layer.

摘要翻译： 本发明的实施例考虑使用新颖的等离子体氧化工艺形成高效太阳能电池，以在太阳能电池基板的表面上形成钝化膜堆叠。 在一个实施方案中，所述方法包括提供在衬底的背面上具有第一类型的掺杂原子的衬底和在衬底的前表面上的第二类型的掺杂原子，等离子体氧化衬底的背表面以形成 氧化层，并在氧化层上形成氮化硅层。

公开(公告)号：US20100275995A1

公开(公告)日：2010-11-04

申请号：US12456398

申请日：2009-06-15

申请人： Martin Kaes ,  Peter Borden ,  Kamel Ounadjela ,  Andreas Kraenzl ,  Alain Blosse ,  Fritz G. Kirscht

发明人： Martin Kaes ,  Peter Borden ,  Kamel Ounadjela ,  Andreas Kraenzl ,  Alain Blosse ,  Fritz G. Kirscht

IPC分类号： H01L31/028 ,  H01L21/22 ,  H01L21/60

CPC分类号： H01L31/18 ,  H01L31/022425 ,  H01L31/068 ,  H01L31/0684 ,  H01L31/1804 ,  Y02E10/547 ,  Y02P70/521

摘要： A simplified manufacturing process and the resultant bifacial solar cell (BSC) are provided, the simplified manufacturing process reducing manufacturing costs. The BSC includes a back surface contact grid and an overlaid blanket metal reflector. A doped amorphous silicon layer is interposed between the contact grid and the blanket layer.

摘要翻译： 提供了简化的制造工艺和所得的双面太阳能电池（BSC），简化的制造工艺降低了制造成本。 BSC包括背面接触网格和覆盖的橡皮布金属反射器。 掺杂的非晶硅层介于接触网格和覆盖层之间。

公开(公告)号：US20100210060A1

公开(公告)日：2010-08-19

申请号：US12371090

申请日：2009-02-13

申请人： Peter Borden ,  Li Xu

发明人： Peter Borden ,  Li Xu

IPC分类号： H01L31/18

CPC分类号： H01L31/1864 ,  Y02E10/50 ,  Y02P70/521

摘要： Embodiments of the invention generally contemplate methods for treating a semiconductor solar cell substrate to reduce the number of undesirable material defects or interface state traps on the surface or within the substrate. These defects can adversely affect the efficiency of the solar cell because electron-hole pairs tend to recombine with the defects and are essentially lost without generating any useful electrical current. In one aspect, a method of forming a solar cell on a semiconductor substrate is provided, comprising doping a front surface of the substrate, applying a passivating layer to the front surface and/or a back surface of the substrate, and annealing the substrate to reduce the interface state trap density (Dit).

摘要翻译： 本发明的实施方案通常考虑用于处理半导体太阳能电池基板以减少在表面上或在基板内的不期望的材料缺陷或界面状态陷阱的数量的方法。 这些缺陷可能不利地影响太阳能电池的效率，因为电子 - 空穴对倾向于与缺陷重新组合并且基本上损失而不产生任何有用的电流。 一方面，提供一种在半导体基板上形成太阳能电池的方法，包括：对所述基板的前表面进行掺杂，向所述基板的前表面和/或后表面施加钝化层，并将所述基板退火至 降低界面态陷阱密度（Dit）。

公开(公告)号：US20070240759A1

公开(公告)日：2007-10-18

申请号：US11403560

申请日：2006-04-13

申请人： Peter Borden

发明人： Peter Borden

IPC分类号： H01L31/00

CPC分类号： H01L31/18 ,  H01L31/02167 ,  H01L31/0322 ,  H01L31/046 ,  H01L31/0463 ,  H01L31/047 ,  Y02E10/541

摘要： In a thin-film photovoltaic (TF PV) module, stacked cells provide efficient conversion of solar energy without being afflicted by conventional problems such as current matching between layers. According to one aspect, the module includes separate terminals for the respective layers in the stack, thus allowing the current in each layer to be different without sacrificing efficiencies gained due to their different bandgaps. According to another aspect of the invention, a processing method according to the invention includes forming interconnects for each layer using etch and deposition processing, including forming separate interconnects for each respective layer, which interconnects can be coupled to respective sets of terminals.

摘要翻译： 在薄膜光伏（TF PV）模块中，堆叠的电池提供太阳能的有效转换，而不受诸如层之间的电流匹配的常规问题的折磨。 根据一个方面，该模块包括用于堆叠中的相应层的单独的端子，从而允许每层中的电流不同，而不会牺牲由于其不同带隙而获得的效率。 根据本发明的另一方面，根据本发明的处理方法包括使用蚀刻和沉积处理为每个层形成互连，包括为每个相应层形成单独的互连，所述互连可以耦合到相应的终端集合。

公开(公告)号：US20050186776A1

公开(公告)日：2005-08-25

申请号：US11114300

申请日：2005-04-25

申请人： Peter Borden ,  Ji-Ping Li

发明人： Peter Borden ,  Ji-Ping Li

IPC分类号： G01N21/00 ,  G01D20060101 ,  G01N21/17 ,  G01N21/21 ,  G01N21/84 ,  G01N21/88 ,  G01N21/95 ,  G01R31/26 ,  G01R31/265 ,  H01L21/265 ,  H01L21/4763 ,  H01L21/66

CPC分类号： G01N21/1717 ,  G01N21/171 ,  G01N21/21 ,  G01N21/211 ,  G01N21/8422 ,  G01N21/9501 ,  G01N21/9505 ,  G01N21/95607 ,  G01N21/95692 ,  G01N2021/1748 ,  G01N2021/216 ,  G01R31/2648 ,  G01R31/2656 ,  H01L22/12

摘要： A method and apparatus measure properties of two layers of a damascene structure (e.g. a silicon wafer during fabrication), and use the two measurements to identify a location as having voids. One of the two measurements is of resistance per unit length. The two measurements may be used in any manner, e.g. compared to one another, and voids are deemed to be present when the two measurements diverge from each other. In response to the detection of voids, a process parameter used in fabrication of the damascene structure may be changed, to reduce or eliminate voids in to-be-formed structures.

摘要翻译： 一种方法和装置测量两层镶嵌结构（例如在制造期间的硅晶片）的性质，并且使用两个测量来将位置识别为具有空隙。 两个测量中的一个是每单位长度的电阻。 这两个测量可以以任何方式使用，例如， 相比之下，当两个测量彼此偏离时，视为存在空白。 响应于空隙的检测，可以改变在镶嵌结构的制造中使用的工艺参数，以减少或消除要形成的结构中的空隙。