中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

16 records (took 0.016 seconds)

    Semiconductor package system
    1.
    发明授权
    Semiconductor package system 有权

    公开(公告)号：US11658090B2

    公开(公告)日：2023-05-23

    申请号：US17232495

    申请日：2021-04-16

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Heungkyu Kwon

    IPC: H01L23/31 ,  H01L23/373 ,  H01L23/367 ,  H01L23/433 ,  H01L23/498 ,  H01L25/16

    CPC classification number: H01L23/3675 ,  H01L23/3128 ,  H01L23/3735 ,  H01L25/16

    Abstract: A semiconductor package system includes a substrate, a first and a second semiconductor package, a first thermal conductive layer, a first passive device, and a heat radiation structure. The first and second semiconductor package and first passive device may be mounted on a top surface of the substrate. The first semiconductor package may include a first semiconductor chip that includes a plurality of logic circuits. The first thermal conductive layer may be on the first semiconductor package. The heat radiation structure may be on the first thermal conductive layer, the second semiconductor package, and the first passive device. The heat radiation structure may include a first bottom surface physically contacting the first thermal conductive layer, and a second bottom surface at a higher level than that of the first bottom surface. The second bottom surface may be on the second semiconductor package and/or the first passive device.

    Semiconductor package system
    2.
    发明授权
    Semiconductor package system 有权

    公开(公告)号：US11075138B2

    公开(公告)日：2021-07-27

    申请号：US16397278

    申请日：2019-04-29

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Heungkyu Kwon

    IPC: H01L23/373 ,  H01L23/31 ,  H01L23/367 ,  H01L23/00

    Abstract: Provided is a semiconductor package system. The system includes a substrate, a first semiconductor package on the substrate, a second semiconductor package on the substrate, a first passive element on the substrate, a heat dissipation structure on the first semiconductor package, the second semiconductor package, and the first passive element, and a first heat conduction layer between the first semiconductor package and the heat dissipation structure. A sum of a height of the first semiconductor package and a thickness of the first heat conduction layer may be greater than a height of the first passive element. The height of the first semiconductor package may be greater than a height of the second semiconductor package.

    Semiconductor module including multiple power management semiconductor packages
    3.
    发明授权
    Semiconductor module including multiple power management semiconductor packages 有权

    公开(公告)号：US11600607B2

    公开(公告)日：2023-03-07

    申请号：US16744437

    申请日：2020-01-16

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Heungkyu Kwon

    IPC: H01L25/16 ,  H01L23/538 ,  H01L23/498 ,  H01L23/367

    Abstract: A semiconductor module may include a system board including a top surface and a bottom surface, a module substrate provided on the top surface of the system board, a system semiconductor package mounted on the module substrate, and first and second power management semiconductor packages mounted on the module substrate. The first and second power management semiconductor packages may be spaced apart from each other in a first direction, which is parallel to a top surface of the module substrate, with the system semiconductor package interposed therebetween.

    Semiconductor package
    4.
    发明授权
    Semiconductor package 有权

    公开(公告)号：US11069623B2

    公开(公告)日：2021-07-20

    申请号：US16385089

    申请日：2019-04-16

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Heungkyu Kwon

    IPC: H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/00 ,  H01L25/10 ,  H01L25/00

    Abstract: Provided is a semiconductor package. The semiconductor package may include a substrate, a semiconductor chip on the substrate, a passive element on the substrate, a conductive structure on the substrate, and an interposer substrate on the semiconductor chip, the passive element, and the conductive structure. The interposer substrate may be electrically connected to the conductive structure. A height of the passive element may be greater than a height of the semiconductor chip.

    Semiconductor package including dual stiffener
    7.
    发明授权
    Semiconductor package including dual stiffener 有权

    公开(公告)号：US11908758B2

    公开(公告)日：2024-02-20

    申请号：US17550284

    申请日：2021-12-14

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Heungkyu Kwon ,  Junso Pak ,  Heeseok Lee

    IPC: H01L23/16 ,  H01L23/053 ,  H01L23/31

    CPC classification number: H01L23/16 ,  H01L23/053 ,  H01L23/31

    Abstract: A semiconductor package includes; a dual stiffener including an upper stiffener and a lower stiffener, an upper package including an upper package substrate, a semiconductor chip centrally mounted on an upper surface of the upper package substrate, and the upper stiffener disposed along an outer edge of the upper package substrate, and a lower package substrate that centrally mounts the upper package and includes the lower stiffener disposed on an upper surface of the lower package substrate to surround the upper package substrate.

    Semiconductor package system
    8.
    发明授权
    Semiconductor package system 有权

    公开(公告)号：US11244885B2

    公开(公告)日：2022-02-08

    申请号：US16573107

    申请日：2019-09-17

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Heungkyu Kwon

    IPC: H01L23/367 ,  H01L21/48 ,  H01L25/18 ,  H01L25/065

    Abstract: Disclosed is a semiconductor package system comprising a substrate, a first semiconductor package on the substrate, and a heat radiation structure on the first semiconductor package. The heat radiation structure includes a first part on a top surface of the first semiconductor package and a second part connected to the first part. The second part has a bottom surface at a level lower than a level of the top surface of the first semiconductor package. A vent hole is provided between an edge region of the substrate and the first part of the heat radiation structure.

    Package-on-package type semiconductor package and method of fabricating the same
    9.
    发明授权
    Package-on-package type semiconductor package and method of fabricating the same 有权

    公开(公告)号：US10068881B2

    公开(公告)日：2018-09-04

    申请号：US15392275

    申请日：2016-12-28

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Heungkyu Kwon

    IPC: H01L23/544 ,  H01L21/00 ,  H01L25/10 ,  H01L25/00

    Abstract: Provided are a package-on-package type semiconductor package and a method of fabricating the same. The semiconductor package includes upper package stacked on a lower package and a via provided between the lower and upper packages to electrically connect the lower and upper packages to each other. The lower package includes a lower package substrate, a lower semiconductor chip mounted on the lower package substrate, and a lower mold layer encapsulating the lower semiconductor chip and including an alignment mark. The lower mold layer includes a marking region, which is provided between the via and the lower semiconductor chip, and on which the alignment mark is provided.

Patent Agency Ranking